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drm/i915: Support flags in whitlist WAs
Newer hardware adds flags to the whitelist work-around register. These allow per access direction privileges and ranges. Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Signed-off-by: Robert M. Fosha <robert.m.fosha@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190618010108.27499-2-John.C.Harrison@Intel.com
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commit
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2 changed files with 15 additions and 1 deletions
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@ -1012,7 +1012,7 @@ bool intel_gt_verify_workarounds(struct drm_i915_private *i915,
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}
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static void
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whitelist_reg(struct i915_wa_list *wal, i915_reg_t reg)
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whitelist_reg_ext(struct i915_wa_list *wal, i915_reg_t reg, u32 flags)
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{
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struct i915_wa wa = {
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.reg = reg
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@ -1021,9 +1021,16 @@ whitelist_reg(struct i915_wa_list *wal, i915_reg_t reg)
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if (GEM_DEBUG_WARN_ON(wal->count >= RING_MAX_NONPRIV_SLOTS))
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return;
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wa.reg.reg |= flags;
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_wa_add(wal, &wa);
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}
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static void
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whitelist_reg(struct i915_wa_list *wal, i915_reg_t reg)
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{
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whitelist_reg_ext(wal, reg, RING_FORCE_TO_NONPRIV_RW);
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}
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static void gen9_whitelist_build(struct i915_wa_list *w)
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{
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/* WaVFEStateAfterPipeControlwithMediaStateClear:skl,bxt,glk,cfl */
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@ -2513,6 +2513,13 @@ enum i915_power_well_id {
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#define RING_WAIT_SEMAPHORE (1 << 10) /* gen6+ */
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#define RING_FORCE_TO_NONPRIV(base, i) _MMIO(((base) + 0x4D0) + (i) * 4)
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#define RING_FORCE_TO_NONPRIV_RW (0 << 28) /* CFL+ & Gen11+ */
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#define RING_FORCE_TO_NONPRIV_RD (1 << 28)
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#define RING_FORCE_TO_NONPRIV_WR (2 << 28)
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#define RING_FORCE_TO_NONPRIV_RANGE_1 (0 << 0) /* CFL+ & Gen11+ */
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#define RING_FORCE_TO_NONPRIV_RANGE_4 (1 << 0)
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#define RING_FORCE_TO_NONPRIV_RANGE_16 (2 << 0)
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#define RING_FORCE_TO_NONPRIV_RANGE_64 (3 << 0)
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#define RING_MAX_NONPRIV_SLOTS 12
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#define GEN7_TLB_RD_ADDR _MMIO(0x4700)
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