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RDMA/hns: Move capability flags of QP and CQ to hns-abi.h
These flags will be returned to the userspace through ABI, so they should be defined in hns-abi.h. Furthermore, there is no need to include hns-abi.h in every source files, it just needs to be included in the common header file. Link: https://lore.kernel.org/r/1606872560-17823-1-git-send-email-liweihang@huawei.com Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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7 changed files with 11 additions and 15 deletions
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@ -36,7 +36,6 @@
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#include "hns_roce_device.h"
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#include "hns_roce_cmd.h"
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#include "hns_roce_hem.h"
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#include <rdma/hns-abi.h>
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#include "hns_roce_common.h"
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static int alloc_cqc(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq)
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@ -34,6 +34,7 @@
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#define _HNS_ROCE_DEVICE_H
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#include <rdma/ib_verbs.h>
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#include <rdma/hns-abi.h>
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#define DRV_NAME "hns_roce"
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@ -131,16 +132,6 @@ enum {
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SERV_TYPE_UD,
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};
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enum hns_roce_qp_caps {
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HNS_ROCE_QP_CAP_RQ_RECORD_DB = BIT(0),
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HNS_ROCE_QP_CAP_SQ_RECORD_DB = BIT(1),
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HNS_ROCE_QP_CAP_OWNER_DB = BIT(2),
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};
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enum hns_roce_cq_flags {
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HNS_ROCE_CQ_FLAG_RECORD_DB = BIT(0),
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};
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enum hns_roce_qp_state {
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HNS_ROCE_QP_STATE_RST,
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HNS_ROCE_QP_STATE_INIT,
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@ -40,7 +40,6 @@
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#include <rdma/ib_cache.h>
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#include "hns_roce_common.h"
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#include "hns_roce_device.h"
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#include <rdma/hns-abi.h>
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#include "hns_roce_hem.h"
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/**
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@ -32,7 +32,6 @@
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#include <linux/platform_device.h>
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#include <linux/pci.h>
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#include <uapi/rdma/hns-abi.h>
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#include "hns_roce_device.h"
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static int hns_roce_pd_alloc(struct hns_roce_dev *hr_dev, unsigned long *pdn)
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@ -39,7 +39,6 @@
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#include "hns_roce_common.h"
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#include "hns_roce_device.h"
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#include "hns_roce_hem.h"
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#include <rdma/hns-abi.h>
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static void flush_work_handle(struct work_struct *work)
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{
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@ -4,7 +4,6 @@
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*/
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#include <rdma/ib_umem.h>
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#include <rdma/hns-abi.h>
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#include "hns_roce_device.h"
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#include "hns_roce_cmd.h"
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#include "hns_roce_hem.h"
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@ -43,6 +43,10 @@ struct hns_roce_ib_create_cq {
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__u32 reserved;
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};
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enum hns_roce_cq_cap_flags {
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HNS_ROCE_CQ_FLAG_RECORD_DB = 1 << 0,
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};
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struct hns_roce_ib_create_cq_resp {
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__aligned_u64 cqn; /* Only 32 bits used, 64 for compat */
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__aligned_u64 cap_flags;
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@ -69,6 +73,12 @@ struct hns_roce_ib_create_qp {
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__aligned_u64 sdb_addr;
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};
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enum hns_roce_qp_cap_flags {
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HNS_ROCE_QP_CAP_RQ_RECORD_DB = 1 << 0,
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HNS_ROCE_QP_CAP_SQ_RECORD_DB = 1 << 1,
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HNS_ROCE_QP_CAP_OWNER_DB = 1 << 2,
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};
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struct hns_roce_ib_create_qp_resp {
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__aligned_u64 cap_flags;
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};
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