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RDMA/hns: Remove redundant 'num_mtt_segs' and 'max_extend_sg'
The num_mtt_segs and max_extend_sg used to be used for HIP06, remove them since the HIP06 code has been removed. Link: https://lore.kernel.org/r/20220922123315.3732205-9-xuhaoyue1@hisilicon.com Signed-off-by: Yangyang Li <liyangyang20@huawei.com> Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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5f652387c5
commit
5436272c8c
3 changed files with 3 additions and 8 deletions
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@ -724,7 +724,7 @@ struct hns_roce_caps {
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u32 max_sq_sg;
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u32 max_sq_inline;
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u32 max_rq_sg;
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u32 max_extend_sg;
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u32 rsv0;
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u32 num_qps;
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u32 num_pi_qps;
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u32 reserved_qps;
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@ -748,7 +748,7 @@ struct hns_roce_caps {
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int num_comp_vectors;
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int num_other_vectors;
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u32 num_mtpts;
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u32 num_mtt_segs;
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u32 rsv1;
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u32 num_srqwqe_segs;
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u32 num_idx_segs;
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int reserved_mrws;
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@ -1966,7 +1966,6 @@ static void set_default_caps(struct hns_roce_dev *hr_dev)
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caps->min_cqes = HNS_ROCE_MIN_CQE_NUM;
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caps->max_cqes = HNS_ROCE_V2_MAX_CQE_NUM;
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caps->max_sq_sg = HNS_ROCE_V2_MAX_SQ_SGE_NUM;
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caps->max_extend_sg = HNS_ROCE_V2_MAX_EXTEND_SGE_NUM;
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caps->max_rq_sg = HNS_ROCE_V2_MAX_RQ_SGE_NUM;
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caps->num_uars = HNS_ROCE_V2_UAR_NUM;
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@ -2185,7 +2184,6 @@ static void apply_func_caps(struct hns_roce_dev *hr_dev)
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caps->num_xrcds = HNS_ROCE_V2_MAX_XRCD_NUM;
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caps->reserved_xrcds = HNS_ROCE_V2_RSV_XRCD_NUM;
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caps->num_mtt_segs = HNS_ROCE_V2_MAX_MTT_SEGS;
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caps->num_srqwqe_segs = HNS_ROCE_V2_MAX_SRQWQE_SEGS;
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caps->num_idx_segs = HNS_ROCE_V2_MAX_IDX_SEGS;
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@ -2272,7 +2270,6 @@ static int hns_roce_query_pf_caps(struct hns_roce_dev *hr_dev)
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caps->max_sq_inline = le16_to_cpu(resp_a->max_sq_inline);
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caps->max_rq_sg = le16_to_cpu(resp_a->max_rq_sg);
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caps->max_rq_sg = roundup_pow_of_two(caps->max_rq_sg);
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caps->max_extend_sg = le32_to_cpu(resp_a->max_extend_sg);
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caps->num_qpc_timer = le16_to_cpu(resp_a->num_qpc_timer);
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caps->max_srq_sges = le16_to_cpu(resp_a->max_srq_sges);
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caps->max_srq_sges = roundup_pow_of_two(caps->max_srq_sges);
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@ -46,7 +46,6 @@
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#define HNS_ROCE_V2_MAX_CQE_NUM 0x400000
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#define HNS_ROCE_V2_MAX_RQ_SGE_NUM 64
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#define HNS_ROCE_V2_MAX_SQ_SGE_NUM 64
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#define HNS_ROCE_V2_MAX_EXTEND_SGE_NUM 0x200000
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#define HNS_ROCE_V2_MAX_SQ_INLINE 0x20
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#define HNS_ROCE_V3_MAX_SQ_INLINE 0x400
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#define HNS_ROCE_V2_MAX_RC_INL_INN_SZ 32
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@ -55,7 +54,6 @@
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#define HNS_ROCE_V2_AEQE_VEC_NUM 1
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#define HNS_ROCE_V2_ABNORMAL_VEC_NUM 1
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#define HNS_ROCE_V2_MAX_MTPT_NUM 0x100000
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#define HNS_ROCE_V2_MAX_MTT_SEGS 0x1000000
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#define HNS_ROCE_V2_MAX_SRQWQE_SEGS 0x1000000
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#define HNS_ROCE_V2_MAX_IDX_SEGS 0x1000000
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#define HNS_ROCE_V2_MAX_PD_NUM 0x1000000
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@ -1175,7 +1173,7 @@ struct hns_roce_query_pf_caps_a {
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__le16 max_sq_sg;
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__le16 max_sq_inline;
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__le16 max_rq_sg;
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__le32 max_extend_sg;
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__le32 rsv0;
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__le16 num_qpc_timer;
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__le16 num_cqc_timer;
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__le16 max_srq_sges;
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