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MIPS: Select R3k-style TLB in Kconfig
Currently areas where we need to determine whether the TLB is R3k-style need to check for either of CONFIG_CPU_R3000 || CONFIG_CPU_TX39XX. Introduce a new CONFIG_CPU_R3K_TLB & select it from both of the above, allowing us to simplify checks for R3k-style TLBs by only checking for this new Kconfig option. Signed-off-by: Paul Burton <paul.burton@mips.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Cc: linux-mips@vger.kernel.org
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813cafc410
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5474682934
5 changed files with 16 additions and 10 deletions
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@ -1575,6 +1575,7 @@ config CPU_R3000
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depends on SYS_HAS_CPU_R3000
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select CPU_HAS_WB
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select CPU_HAS_LOAD_STORE_LR
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select CPU_R3K_TLB
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select CPU_SUPPORTS_32BIT_KERNEL
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select CPU_SUPPORTS_HIGHMEM
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help
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@ -1590,6 +1591,7 @@ config CPU_TX39XX
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depends on SYS_HAS_CPU_TX39XX
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select CPU_SUPPORTS_32BIT_KERNEL
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select CPU_HAS_LOAD_STORE_LR
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select CPU_R3K_TLB
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config CPU_VR41XX
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bool "R41xx"
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@ -2280,6 +2282,9 @@ config CPU_R2300_FPU
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depends on MIPS_FP_SUPPORT
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default y if CPU_R3000 || CPU_TX39XX
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config CPU_R3K_TLB
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bool
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config CPU_R4K_FPU
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bool
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depends on MIPS_FP_SUPPORT
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@ -2287,7 +2292,7 @@ config CPU_R4K_FPU
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config CPU_R4K_CACHE_TLB
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bool
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default y if !(CPU_R3000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
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default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
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config MIPS_MT_SMP
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bool "MIPS MT SMP support (1 TC on each available VPE)"
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@ -221,7 +221,7 @@ static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot)
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((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
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#define pte_unmap(pte) ((void)(pte))
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#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
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#if defined(CONFIG_CPU_R3K_TLB)
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/* Swap entries must have VALID bit cleared. */
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#define __swp_type(x) (((x).val >> 10) & 0x1f)
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@ -266,6 +266,6 @@ static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot)
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#endif /* defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) */
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#endif /* defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) */
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#endif /* defined(CONFIG_CPU_R3K_TLB) */
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#endif /* _ASM_PGTABLE_32_H */
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@ -82,7 +82,7 @@ enum pgtable_bits {
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_PAGE_SPECIAL_SHIFT,
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};
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#elif defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
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#elif defined(CONFIG_CPU_R3K_TLB)
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/* Page table bits used for r3k systems */
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enum pgtable_bits {
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@ -151,7 +151,7 @@ enum pgtable_bits {
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#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
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#define _PAGE_VALID (1 << _PAGE_VALID_SHIFT)
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#define _PAGE_DIRTY (1 << _PAGE_DIRTY_SHIFT)
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#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
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#if defined(CONFIG_CPU_R3K_TLB)
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# define _CACHE_UNCACHED (1 << _CACHE_UNCACHED_SHIFT)
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# define _CACHE_MASK _CACHE_UNCACHED
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# define _PFN_SHIFT PAGE_SHIFT
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@ -209,7 +209,7 @@ static inline uint64_t pte_to_entrylo(unsigned long pte_val)
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/*
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* Cache attributes
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*/
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#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
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#if defined(CONFIG_CPU_R3K_TLB)
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#define _CACHE_CACHABLE_NONCOHERENT 0
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#define _CACHE_UNCACHED_ACCELERATED _CACHE_UNCACHED
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@ -199,7 +199,7 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt
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static inline void set_pte(pte_t *ptep, pte_t pteval)
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{
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*ptep = pteval;
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#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
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#if !defined(CONFIG_CPU_R3K_TLB)
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if (pte_val(pteval) & _PAGE_GLOBAL) {
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pte_t *buddy = ptep_buddy(ptep);
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/*
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@ -218,7 +218,7 @@ static inline void set_pte(pte_t *ptep, pte_t pteval)
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static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
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{
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htw_stop();
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#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
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#if !defined(CONFIG_CPU_R3K_TLB)
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/* Preserve global status for the pair */
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if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
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set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL));
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@ -28,10 +28,11 @@ obj-$(CONFIG_HIGHMEM) += highmem.o
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obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
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obj-$(CONFIG_DMA_NONCOHERENT) += dma-noncoherent.o
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obj-$(CONFIG_CPU_R3K_TLB) += tlb-r3k.o
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obj-$(CONFIG_CPU_R4K_CACHE_TLB) += c-r4k.o cex-gen.o tlb-r4k.o
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obj-$(CONFIG_CPU_R3000) += c-r3k.o tlb-r3k.o
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obj-$(CONFIG_CPU_R3000) += c-r3k.o
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obj-$(CONFIG_CPU_SB1) += c-r4k.o cerr-sb1.o cex-sb1.o tlb-r4k.o
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obj-$(CONFIG_CPU_TX39XX) += c-tx39.o tlb-r3k.o
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obj-$(CONFIG_CPU_TX39XX) += c-tx39.o
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obj-$(CONFIG_CPU_CAVIUM_OCTEON) += c-octeon.o cex-oct.o tlb-r4k.o
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obj-$(CONFIG_IP22_CPU_SCACHE) += sc-ip22.o
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