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staging: rtl8192e: Cleanup checkpatch -f warnings and errors - Part IV
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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2 changed files with 785 additions and 736 deletions
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@ -25,25 +25,25 @@
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#define MAX_RFDEPENDCMD_CNT 16
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#define MAX_POSTCMD_CNT 16
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#define AGCTAB_ArrayLength AGCTAB_ArrayLengthPciE
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#define MACPHY_ArrayLength MACPHY_ArrayLengthPciE
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#define RadioA_ArrayLength RadioA_ArrayLengthPciE
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#define RadioB_ArrayLength RadioB_ArrayLengthPciE
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#define AGCTAB_ArrayLength AGCTAB_ArrayLengthPciE
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#define MACPHY_ArrayLength MACPHY_ArrayLengthPciE
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#define RadioA_ArrayLength RadioA_ArrayLengthPciE
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#define RadioB_ArrayLength RadioB_ArrayLengthPciE
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#define MACPHY_Array_PGLength MACPHY_Array_PGLengthPciE
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#define RadioC_ArrayLength RadioC_ArrayLengthPciE
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#define RadioD_ArrayLength RadioD_ArrayLengthPciE
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#define PHY_REGArrayLength PHY_REGArrayLengthPciE
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#define PHY_REG_1T2RArrayLength PHY_REG_1T2RArrayLengthPciE
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#define RadioC_ArrayLength RadioC_ArrayLengthPciE
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#define RadioD_ArrayLength RadioD_ArrayLengthPciE
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#define PHY_REGArrayLength PHY_REGArrayLengthPciE
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#define PHY_REG_1T2RArrayLength PHY_REG_1T2RArrayLengthPciE
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#define Rtl819XMACPHY_Array_PG Rtl8192PciEMACPHY_Array_PG
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#define Rtl819XMACPHY_Array Rtl8192PciEMACPHY_Array
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#define Rtl819XRadioA_Array Rtl8192PciERadioA_Array
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#define Rtl819XRadioB_Array Rtl8192PciERadioB_Array
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#define Rtl819XRadioC_Array Rtl8192PciERadioC_Array
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#define Rtl819XRadioD_Array Rtl8192PciERadioD_Array
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#define Rtl819XAGCTAB_Array Rtl8192PciEAGCTAB_Array
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#define Rtl819XPHY_REGArray Rtl8192PciEPHY_REGArray
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#define Rtl819XPHY_REG_1T2RArray Rtl8192PciEPHY_REG_1T2RArray
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#define Rtl819XMACPHY_Array Rtl8192PciEMACPHY_Array
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#define Rtl819XRadioA_Array Rtl8192PciERadioA_Array
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#define Rtl819XRadioB_Array Rtl8192PciERadioB_Array
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#define Rtl819XRadioC_Array Rtl8192PciERadioC_Array
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#define Rtl819XRadioD_Array Rtl8192PciERadioD_Array
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#define Rtl819XAGCTAB_Array Rtl8192PciEAGCTAB_Array
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#define Rtl819XPHY_REGArray Rtl8192PciEPHY_REGArray
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#define Rtl819XPHY_REG_1T2RArray Rtl8192PciEPHY_REG_1T2RArray
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@ -57,7 +57,7 @@ enum sw_chnl_cmd_id {
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CmdID_RF_WriteReg,
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};
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/*--------------------------------Define structure--------------------------------*/
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/*--------------------------------Define structure----------------------------*/
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struct sw_chnl_cmd {
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enum sw_chnl_cmd_id CmdID;
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u32 Para1;
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@ -97,23 +97,35 @@ enum rf90_radio_path {
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#define bMaskLWord 0x0000ffff
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#define bMaskDWord 0xffffffff
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extern u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device* dev, u32 eRFPath);
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extern void rtl8192_setBBreg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask, u32 dwData);
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extern u32 rtl8192_QueryBBReg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask);
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extern void rtl8192_phy_SetRFReg(struct net_device* dev, enum rf90_radio_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data);
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extern u32 rtl8192_phy_QueryRFReg(struct net_device* dev, enum rf90_radio_path eRFPath, u32 RegAddr, u32 BitMask);
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extern void rtl8192_phy_configmac(struct net_device* dev);
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extern void rtl8192_phyConfigBB(struct net_device* dev, u8 ConfigType);
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extern bool rtl8192_phy_checkBBAndRF(struct net_device* dev, enum hw90_block CheckBlock, enum rf90_radio_path eRFPath);
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extern bool rtl8192_BBConfig(struct net_device* dev);
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extern void rtl8192_phy_getTxPower(struct net_device* dev);
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extern void rtl8192_phy_setTxPower(struct net_device* dev, u8 channel);
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extern bool rtl8192_phy_RFConfig(struct net_device* dev);
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extern void rtl8192_phy_updateInitGain(struct net_device* dev);
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extern u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device* dev, enum rf90_radio_path eRFPath);
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extern u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device *dev,
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u32 eRFPath);
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extern void rtl8192_setBBreg(struct net_device *dev, u32 dwRegAddr,
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u32 dwBitMask, u32 dwData);
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extern u32 rtl8192_QueryBBReg(struct net_device *dev, u32 dwRegAddr,
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u32 dwBitMask);
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extern void rtl8192_phy_SetRFReg(struct net_device *dev,
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enum rf90_radio_path eRFPath,
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u32 RegAddr, u32 BitMask, u32 Data);
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extern u32 rtl8192_phy_QueryRFReg(struct net_device *dev,
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enum rf90_radio_path eRFPath,
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u32 RegAddr, u32 BitMask);
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extern void rtl8192_phy_configmac(struct net_device *dev);
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extern void rtl8192_phyConfigBB(struct net_device *dev, u8 ConfigType);
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extern bool rtl8192_phy_checkBBAndRF(struct net_device *dev,
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enum hw90_block CheckBlock,
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enum rf90_radio_path eRFPath);
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extern bool rtl8192_BBConfig(struct net_device *dev);
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extern void rtl8192_phy_getTxPower(struct net_device *dev);
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extern void rtl8192_phy_setTxPower(struct net_device *dev, u8 channel);
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extern bool rtl8192_phy_RFConfig(struct net_device *dev);
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extern void rtl8192_phy_updateInitGain(struct net_device *dev);
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extern u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device *dev,
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enum rf90_radio_path eRFPath);
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extern u8 rtl8192_phy_SwChnl(struct net_device* dev, u8 channel);
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extern void rtl8192_SetBWMode(struct net_device *dev, enum ht_channel_width Bandwidth, enum ht_extchnl_offset Offset);
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extern u8 rtl8192_phy_SwChnl(struct net_device *dev, u8 channel);
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extern void rtl8192_SetBWMode(struct net_device *dev,
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enum ht_channel_width Bandwidth,
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enum ht_extchnl_offset Offset);
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extern void rtl8192_SwChnl_WorkItem(struct net_device *dev);
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extern void rtl8192_SetBWModeWorkItem(struct net_device *dev);
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extern void InitialGain819xPci(struct net_device *dev, u8 Operation);
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@ -122,11 +134,11 @@ extern void PHY_SetRtl8192eRfOff(struct net_device *dev);
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bool
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SetRFPowerState(
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struct net_device* dev,
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struct net_device *dev,
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enum rt_rf_power_state eRFPowerState
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);
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#define PHY_SetRFPowerState SetRFPowerState
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extern void PHY_ScanOperationBackup8192(struct net_device* dev,u8 Operation);
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extern void PHY_ScanOperationBackup8192(struct net_device *dev, u8 Operation);
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#endif
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