mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-22 17:01:14 +00:00
RTC for 6.10
New driver: - Epson RX8111 Drivers: - Many Device Tree bindings conversions to dtschema - pcf8563: wakeup-source support -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEBqsFVZXh8s/0O5JiY6TcMGxwOjIFAmZRmpcACgkQY6TcMGxw OjK9rRAAmbqROjGoGnJAwWSKX3qeirgkF+bcujgJXfPKEvFnjYmko/dMXCn7iljP qHIEzxagOKnY9a5hnMt5MPKVjJ+WhcbVgemnXt7UB8jefctlNqkGw2eeJ93B52VR dCwnfDNhnBdREcUqPM6q1FREi7zdbm47Ox9z+ZQdjkwqjMfYrttesXhDOjcsEJiZ 66hCDiNs8WWx0ZveWy3McaPQgukzM6iX0wgRwkl24ydr65+zcBr7FH2bAfZskZML pqJ493vjNdC4z62ZiZjPhtJBGdApF3H1vYCoW7bqNFrvsM8Wj65bfbMOL6ePE8z1 yaYVHCBeT9FdEllLr5r1TIzCIKqQcI5OTvtCa7ESH0Ivft8Q9QBCvij0xXpkd38V ssC81K+aeQ8OzTTw5KlFHYwXJUgTEbq1AiC5eEVTM+axzs/sXqiX2x5HqPhcp5Bm gIqlqE/hQIm7nKNurF2w3aMp7+f1YPpCLzCBIjp8BuNkBCCZ6P8IFXUsGwUQNN0f LKy2ggbO/ArSwxGr8SQNYGF+4ySpnrdfJXRrO/leNlN37lVs40GoNI6GarftMIRr 3N0gRDrs6m2JDoCISb96s47oroyiYx2VhZBKJdZx0pxIrzTnoi31k3Zhj4u+1FKw paExPLoVlU3Re0lVmcjafDc7qOJje2PZMuS4XfPKsZEe7bVAnYU= =Kclo -----END PGP SIGNATURE----- Merge tag 'rtc-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux Pull RTC updates from Alexandre Belloni: "There is one new driver and then most of the changes are the device tree bindings conversions to yaml. New driver: - Epson RX8111 Drivers: - Many Device Tree bindings conversions to dtschema - pcf8563: wakeup-source support" * tag 'rtc-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: pcf8563: add wakeup-source support rtc: rx8111: handle VLOW flag rtc: rx8111: demote warnings to debug level rtc: rx6110: Constify struct regmap_config dt-bindings: rtc: convert trivial devices into dtschema dt-bindings: rtc: stmp3xxx-rtc: convert to dtschema dt-bindings: rtc: pxa-rtc: convert to dtschema rtc: Add driver for Epson RX8111 dt-bindings: rtc: Add Epson RX8111 rtc: mcp795: drop unneeded MODULE_ALIAS rtc: nuvoton: Modify part number value rtc: test: Split rtc unit test into slow and normal speed test dt-bindings: rtc: nxp,lpc1788-rtc: convert to dtschema dt-bindings: rtc: digicolor-rtc: move to trivial-rtc dt-bindings: rtc: alphascale,asm9260-rtc: convert to dtschema dt-bindings: rtc: armada-380-rtc: convert to dtschema rtc: cros-ec: provide ID table for avoiding fallback match
This commit is contained in:
Linus Torvalds
commit
54f71b0369
29 changed files with 702 additions and 250 deletions
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@ -1,19 +0,0 @@
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* Alphascale asm9260 SoC Real Time Clock
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||||
|
||||
Required properties:
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||||
- compatible: Should be "alphascale,asm9260-rtc"
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- reg: Physical base address of the controller and length
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of memory mapped region.
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- interrupts: IRQ line for the RTC.
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- clocks: Reference to the clock entry.
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- clock-names: should contain:
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* "ahb" for the SoC RTC clock
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Example:
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rtc0: rtc@800a0000 {
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compatible = "alphascale,asm9260-rtc";
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reg = <0x800a0000 0x100>;
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clocks = <&acc CLKID_AHB_RTC>;
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clock-names = "ahb";
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interrupts = <2>;
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};
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@ -0,0 +1,50 @@
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/rtc/alphascale,asm9260-rtc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Alphascale asm9260 SoC Real Time Clock
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maintainers:
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- Javier Carrasco <javier.carrasco.cruz@gmail.com>
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allOf:
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- $ref: rtc.yaml#
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properties:
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compatible:
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const: alphascale,asm9260-rtc
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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const: ahb
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interrupts:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- interrupts
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/alphascale,asm9260.h>
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rtc@800a0000 {
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compatible = "alphascale,asm9260-rtc";
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reg = <0x800a0000 0x100>;
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clocks = <&acc CLKID_AHB_RTC>;
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clock-names = "ahb";
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interrupts = <2>;
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};
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@ -1,24 +0,0 @@
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* Real Time Clock of the Armada 38x/7K/8K SoCs
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RTC controller for the Armada 38x, 7K and 8K SoCs
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Required properties:
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- compatible : Should be one of the following:
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"marvell,armada-380-rtc" for Armada 38x SoC
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"marvell,armada-8k-rtc" for Aramda 7K/8K SoCs
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- reg: a list of base address and size pairs, one for each entry in
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reg-names
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- reg names: should contain:
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* "rtc" for the RTC registers
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* "rtc-soc" for the SoC related registers and among them the one
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related to the interrupt.
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- interrupts: IRQ line for the RTC.
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Example:
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rtc@a3800 {
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compatible = "marvell,armada-380-rtc";
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reg = <0xa3800 0x20>, <0x184a0 0x0c>;
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reg-names = "rtc", "rtc-soc";
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interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
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};
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@ -1,17 +0,0 @@
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Conexant Digicolor Real Time Clock controller
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This binding currently supports the CX92755 SoC.
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Required properties:
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- compatible: should be "cnxt,cx92755-rtc"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- interrupts: rtc alarm interrupt
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Example:
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rtc@f0000c30 {
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compatible = "cnxt,cx92755-rtc";
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reg = <0xf0000c30 0x18>;
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interrupts = <25>;
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};
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51
Documentation/devicetree/bindings/rtc/fsl,stmp3xxx-rtc.yaml
Normal file
51
Documentation/devicetree/bindings/rtc/fsl,stmp3xxx-rtc.yaml
Normal file
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@ -0,0 +1,51 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/rtc/fsl,stmp3xxx-rtc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: STMP3xxx/i.MX28 Time Clock Controller
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maintainers:
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- Javier Carrasco <javier.carrasco.cruz@gmail.com>
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allOf:
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- $ref: rtc.yaml#
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- fsl,imx28-rtc
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- fsl,imx23-rtc
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- const: fsl,stmp3xxx-rtc
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- const: fsl,stmp3xxx-rtc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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stmp,crystal-freq:
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description:
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Override crystal frequency as determined from fuse bits.
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Use <0> for "no crystal".
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 32000, 32768]
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required:
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- compatible
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- reg
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- interrupts
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unevaluatedProperties: false
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examples:
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- |
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rtc@80056000 {
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compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
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reg = <0x80056000 2000>;
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interrupts = <29>;
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};
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@ -1,17 +0,0 @@
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Android Goldfish RTC
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Android Goldfish RTC device used by Android emulator.
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Required properties:
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- compatible : should contain "google,goldfish-rtc"
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- reg : <registers mapping>
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- interrupts : <interrupt mapping>
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Example:
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goldfish_timer@9020000 {
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compatible = "google,goldfish-rtc";
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reg = <0x9020000 0x1000>;
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interrupts = <0x3>;
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};
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@ -1,15 +0,0 @@
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* NXP LPC32xx SoC Real Time Clock controller
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Required properties:
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- compatible: must be "nxp,lpc3220-rtc"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- interrupts: The RTC interrupt
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Example:
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rtc@40024000 {
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compatible = "nxp,lpc3220-rtc";
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reg = <0x40024000 0x1000>;
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interrupts = <52 0>;
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};
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@ -0,0 +1,51 @@
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/rtc/marvell,armada-380-rtc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: RTC controller for the Armada 38x, 7K and 8K SoCs
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maintainers:
|
||||
- Javier Carrasco <javier.carrasco.cruz@gmail.com>
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||||
|
||||
allOf:
|
||||
- $ref: rtc.yaml#
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properties:
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compatible:
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enum:
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- marvell,armada-380-rtc
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- marvell,armada-8k-rtc
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reg:
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items:
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- description: RTC base address size
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- description: Base address and size of SoC related registers
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reg-names:
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items:
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- const: rtc
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- const: rtc-soc
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interrupts:
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maxItems: 1
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required:
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||||
- compatible
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- reg
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- reg-names
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- interrupts
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unevaluatedProperties: false
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|
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examples:
|
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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rtc@a3800 {
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compatible = "marvell,armada-380-rtc";
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reg = <0xa3800 0x20>, <0x184a0 0x0c>;
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reg-names = "rtc", "rtc-soc";
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interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
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};
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40
Documentation/devicetree/bindings/rtc/marvell,pxa-rtc.yaml
Normal file
40
Documentation/devicetree/bindings/rtc/marvell,pxa-rtc.yaml
Normal file
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@ -0,0 +1,40 @@
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|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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||||
---
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$id: http://devicetree.org/schemas/rtc/marvell,pxa-rtc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: PXA Real Time Clock
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||||
|
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maintainers:
|
||||
- Javier Carrasco <javier.carrasco.cruz@gmail.com>
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||||
|
||||
allOf:
|
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- $ref: rtc.yaml#
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|
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properties:
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compatible:
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const: marvell,pxa-rtc
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reg:
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maxItems: 1
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interrupts:
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items:
|
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- description: 1 Hz
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- description: Alarm
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||||
|
||||
required:
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||||
- compatible
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||||
- reg
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- interrupts
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||||
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unevaluatedProperties: false
|
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|
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examples:
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- |
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||||
rtc@40900000 {
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compatible = "marvell,pxa-rtc";
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reg = <0x40900000 0x3c>;
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interrupts = <30>, <31>;
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};
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|
|
@ -1,12 +0,0 @@
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* Maxim (Dallas) DS1742/DS1743 Real Time Clock
|
||||
|
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Required properties:
|
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- compatible: Should contain "maxim,ds1742".
|
||||
- reg: Physical base address of the RTC and length of memory
|
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mapped region.
|
||||
|
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Example:
|
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rtc: rtc@10000000 {
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compatible = "maxim,ds1742";
|
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reg = <0x10000000 0x800>;
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};
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|
|
@ -1,21 +0,0 @@
|
|||
NXP LPC1788 real-time clock
|
||||
|
||||
The LPC1788 RTC provides calendar and clock functionality
|
||||
together with periodic tick and alarm interrupt support.
|
||||
|
||||
Required properties:
|
||||
- compatible : must contain "nxp,lpc1788-rtc"
|
||||
- reg : Specifies base physical address and size of the registers.
|
||||
- interrupts : A single interrupt specifier.
|
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- clocks : Must contain clock specifiers for rtc and register clock
|
||||
- clock-names : Must contain "rtc" and "reg"
|
||||
See ../clocks/clock-bindings.txt for details.
|
||||
|
||||
Example:
|
||||
rtc: rtc@40046000 {
|
||||
compatible = "nxp,lpc1788-rtc";
|
||||
reg = <0x40046000 0x1000>;
|
||||
interrupts = <47>;
|
||||
clocks = <&creg_clk 0>, <&ccu1 CLK_CPU_BUS>;
|
||||
clock-names = "rtc", "reg";
|
||||
};
|
||||
58
Documentation/devicetree/bindings/rtc/nxp,lpc1788-rtc.yaml
Normal file
58
Documentation/devicetree/bindings/rtc/nxp,lpc1788-rtc.yaml
Normal file
|
|
@ -0,0 +1,58 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/rtc/nxp,lpc1788-rtc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NXP LPC1788 real-time clock
|
||||
|
||||
description:
|
||||
The LPC1788 RTC provides calendar and clock functionality
|
||||
together with periodic tick and alarm interrupt support.
|
||||
|
||||
maintainers:
|
||||
- Javier Carrasco <javier.carrasco.cruz@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: rtc.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nxp,lpc1788-rtc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: RTC clock
|
||||
- description: Register clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: rtc
|
||||
- const: reg
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- interrupts
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/lpc18xx-ccu.h>
|
||||
|
||||
rtc@40046000 {
|
||||
compatible = "nxp,lpc1788-rtc";
|
||||
reg = <0x40046000 0x1000>;
|
||||
clocks = <&creg_clk 0>, <&ccu1 CLK_CPU_BUS>;
|
||||
clock-names = "rtc", "reg";
|
||||
interrupts = <47>;
|
||||
};
|
||||
|
|
@ -1,18 +0,0 @@
|
|||
* Mvebu Real Time Clock
|
||||
|
||||
RTC controller for the Kirkwood, the Dove, the Armada 370 and the
|
||||
Armada XP SoCs
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "marvell,orion-rtc"
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
- interrupts: IRQ line for the RTC.
|
||||
|
||||
Example:
|
||||
|
||||
rtc@10300 {
|
||||
compatible = "marvell,orion-rtc";
|
||||
reg = <0xd0010300 0x20>;
|
||||
interrupts = <50>;
|
||||
};
|
||||
|
|
@ -1,14 +0,0 @@
|
|||
* PXA RTC
|
||||
|
||||
PXA specific RTC driver.
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "marvell,pxa-rtc"
|
||||
|
||||
Examples:
|
||||
|
||||
rtc@40900000 {
|
||||
compatible = "marvell,pxa-rtc";
|
||||
reg = <0x40900000 0x3c>;
|
||||
interrupts = <30 31>;
|
||||
};
|
||||
|
|
@ -1,22 +0,0 @@
|
|||
ASPEED BMC RTC
|
||||
==============
|
||||
|
||||
Required properties:
|
||||
- compatible: should be one of the following
|
||||
* aspeed,ast2400-rtc for the ast2400
|
||||
* aspeed,ast2500-rtc for the ast2500
|
||||
* aspeed,ast2600-rtc for the ast2600
|
||||
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region
|
||||
|
||||
- interrupts: The interrupt number
|
||||
|
||||
Example:
|
||||
|
||||
rtc@1e781000 {
|
||||
compatible = "aspeed,ast2400-rtc";
|
||||
reg = <0x1e781000 0x18>;
|
||||
interrupts = <22>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -1,15 +0,0 @@
|
|||
* SPEAr RTC
|
||||
|
||||
Required properties:
|
||||
- compatible : "st,spear600-rtc"
|
||||
- reg : Address range of the rtc registers
|
||||
- interrupt: Should contain the rtc interrupt number
|
||||
|
||||
Example:
|
||||
|
||||
rtc@fc000000 {
|
||||
compatible = "st,spear600-rtc";
|
||||
reg = <0xfc000000 0x1000>;
|
||||
interrupt-parent = <&vic1>;
|
||||
interrupts = <12>;
|
||||
};
|
||||
|
|
@ -1,21 +0,0 @@
|
|||
* STMP3xxx/i.MX28 Time Clock controller
|
||||
|
||||
Required properties:
|
||||
- compatible: should be one of the following.
|
||||
* "fsl,stmp3xxx-rtc"
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
- interrupts: rtc alarm interrupt
|
||||
|
||||
Optional properties:
|
||||
- stmp,crystal-freq: override crystal frequency as determined from fuse bits.
|
||||
Only <32000> and <32768> are possible for the hardware. Use <0> for
|
||||
"no crystal".
|
||||
|
||||
Example:
|
||||
|
||||
rtc@80056000 {
|
||||
compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
|
||||
reg = <0x80056000 2000>;
|
||||
interrupts = <29>;
|
||||
};
|
||||
|
|
@ -24,6 +24,14 @@ properties:
|
|||
- abracon,abb5zes3
|
||||
# AB-RTCMC-32.768kHz-EOZ9: Real Time Clock/Calendar Module with I2C Interface
|
||||
- abracon,abeoz9
|
||||
# ASPEED BMC ast2400 Real-time Clock
|
||||
- aspeed,ast2400-rtc
|
||||
# ASPEED BMC ast2500 Real-time Clock
|
||||
- aspeed,ast2500-rtc
|
||||
# ASPEED BMC ast2600 Real-time Clock
|
||||
- aspeed,ast2600-rtc
|
||||
# Conexant Digicolor Real Time Clock Controller
|
||||
- cnxt,cx92755-rtc
|
||||
# I2C, 32-Bit Binary Counter Watchdog RTC with Trickle Charger and Reset Input/Output
|
||||
- dallas,ds1374
|
||||
# Dallas DS1672 Real-time Clock
|
||||
|
|
@ -38,19 +46,28 @@ properties:
|
|||
- epson,rx8025
|
||||
- epson,rx8035
|
||||
# I2C-BUS INTERFACE REAL TIME CLOCK MODULE with Battery Backed RAM
|
||||
- epson,rx8111
|
||||
- epson,rx8571
|
||||
# I2C-BUS INTERFACE REAL TIME CLOCK MODULE
|
||||
- epson,rx8581
|
||||
# Android Goldfish Real-time Clock
|
||||
- google,goldfish-rtc
|
||||
# Intersil ISL1208 Low Power RTC with Battery Backed SRAM
|
||||
- isil,isl1208
|
||||
# Intersil ISL1218 Low Power RTC with Battery Backed SRAM
|
||||
- isil,isl1218
|
||||
# Mvebu Real-time Clock
|
||||
- marvell,orion-rtc
|
||||
# Maxim DS1742/DS1743 Real-time Clock
|
||||
- maxim,ds1742
|
||||
# SPI-BUS INTERFACE REAL TIME CLOCK MODULE
|
||||
- maxim,mcp795
|
||||
# Real Time Clock Module with I2C-Bus
|
||||
- microcrystal,rv3029
|
||||
# Real Time Clock
|
||||
- microcrystal,rv8523
|
||||
# NXP LPC32xx SoC Real-time Clock
|
||||
- nxp,lpc3220-rtc
|
||||
# Real-time Clock Module
|
||||
- pericom,pt7c4338
|
||||
# I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
|
||||
|
|
@ -67,6 +84,10 @@ properties:
|
|||
- ricoh,rv5c387a
|
||||
# 2-wire CMOS real-time clock
|
||||
- sii,s35390a
|
||||
# ST SPEAr Real-time Clock
|
||||
- st,spear600-rtc
|
||||
# VIA/Wondermedia VT8500 Real-time Clock
|
||||
- via,vt8500-rtc
|
||||
# I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
|
||||
- whwave,sd3078
|
||||
# Xircom X1205 I2C RTC
|
||||
|
|
|
|||
|
|
@ -1,15 +0,0 @@
|
|||
VIA/Wondermedia VT8500 Realtime Clock Controller
|
||||
-----------------------------------------------------
|
||||
|
||||
Required properties:
|
||||
- compatible : "via,vt8500-rtc"
|
||||
- reg : Should contain 1 register ranges(address and length)
|
||||
- interrupts : alarm interrupt
|
||||
|
||||
Example:
|
||||
|
||||
rtc@d8100000 {
|
||||
compatible = "via,vt8500-rtc";
|
||||
reg = <0xd8100000 0x10000>;
|
||||
interrupts = <48>;
|
||||
};
|
||||
|
|
@ -1500,7 +1500,6 @@ F: drivers/irqchip/irq-goldfish-pic.c
|
|||
ANDROID GOLDFISH RTC DRIVER
|
||||
M: Jiaxun Yang <jiaxun.yang@flygoat.com>
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/rtc/google,goldfish-rtc.txt
|
||||
F: drivers/rtc/rtc-goldfish.c
|
||||
|
||||
AOA (Apple Onboard Audio) ALSA DRIVER
|
||||
|
|
|
|||
|
|
@ -664,6 +664,16 @@ config RTC_DRV_RX8010
|
|||
This driver can also be built as a module. If so, the module
|
||||
will be called rtc-rx8010.
|
||||
|
||||
config RTC_DRV_RX8111
|
||||
tristate "Epson RX8111"
|
||||
select REGMAP_I2C
|
||||
depends on I2C
|
||||
help
|
||||
If you say yes here you will get support for the Epson RX8111 RTC.
|
||||
|
||||
This driver can also be built as a module. If so, the module will be
|
||||
called rtc-rx8111.
|
||||
|
||||
config RTC_DRV_RX8581
|
||||
tristate "Epson RX-8571/RX-8581"
|
||||
select REGMAP_I2C
|
||||
|
|
|
|||
|
|
@ -154,6 +154,7 @@ obj-$(CONFIG_RTC_DRV_RX4581) += rtc-rx4581.o
|
|||
obj-$(CONFIG_RTC_DRV_RX6110) += rtc-rx6110.o
|
||||
obj-$(CONFIG_RTC_DRV_RX8010) += rtc-rx8010.o
|
||||
obj-$(CONFIG_RTC_DRV_RX8025) += rtc-rx8025.o
|
||||
obj-$(CONFIG_RTC_DRV_RX8111) += rtc-rx8111.o
|
||||
obj-$(CONFIG_RTC_DRV_RX8581) += rtc-rx8581.o
|
||||
obj-$(CONFIG_RTC_DRV_RZN1) += rtc-rzn1.o
|
||||
obj-$(CONFIG_RTC_DRV_S35390A) += rtc-s35390a.o
|
||||
|
|
|
|||
|
|
@ -27,17 +27,17 @@ static void advance_date(int *year, int *month, int *mday, int *yday)
|
|||
}
|
||||
|
||||
/*
|
||||
* Checks every day in a 160000 years interval starting on 1970-01-01
|
||||
* Check every day in specified number of years interval starting on 1970-01-01
|
||||
* against the expected result.
|
||||
*/
|
||||
static void rtc_time64_to_tm_test_date_range(struct kunit *test)
|
||||
static void rtc_time64_to_tm_test_date_range(struct kunit *test, int years)
|
||||
{
|
||||
/*
|
||||
* 160000 years = (160000 / 400) * 400 years
|
||||
* = (160000 / 400) * 146097 days
|
||||
* = (160000 / 400) * 146097 * 86400 seconds
|
||||
* years = (years / 400) * 400 years
|
||||
* = (years / 400) * 146097 days
|
||||
* = (years / 400) * 146097 * 86400 seconds
|
||||
*/
|
||||
time64_t total_secs = ((time64_t) 160000) / 400 * 146097 * 86400;
|
||||
time64_t total_secs = ((time64_t)years) / 400 * 146097 * 86400;
|
||||
|
||||
int year = 1970;
|
||||
int month = 1;
|
||||
|
|
@ -66,8 +66,27 @@ static void rtc_time64_to_tm_test_date_range(struct kunit *test)
|
|||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Checks every day in a 160000 years interval starting on 1970-01-01
|
||||
* against the expected result.
|
||||
*/
|
||||
static void rtc_time64_to_tm_test_date_range_160000(struct kunit *test)
|
||||
{
|
||||
rtc_time64_to_tm_test_date_range(test, 160000);
|
||||
}
|
||||
|
||||
/*
|
||||
* Checks every day in a 1000 years interval starting on 1970-01-01
|
||||
* against the expected result.
|
||||
*/
|
||||
static void rtc_time64_to_tm_test_date_range_1000(struct kunit *test)
|
||||
{
|
||||
rtc_time64_to_tm_test_date_range(test, 1000);
|
||||
}
|
||||
|
||||
static struct kunit_case rtc_lib_test_cases[] = {
|
||||
KUNIT_CASE(rtc_time64_to_tm_test_date_range),
|
||||
KUNIT_CASE(rtc_time64_to_tm_test_date_range_1000),
|
||||
KUNIT_CASE_SLOW(rtc_time64_to_tm_test_date_range_160000),
|
||||
{}
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -5,6 +5,7 @@
|
|||
// Author: Stephen Barber <smbarber@chromium.org>
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_data/cros_ec_commands.h>
|
||||
#include <linux/platform_data/cros_ec_proto.h>
|
||||
|
|
@ -392,6 +393,12 @@ static void cros_ec_rtc_remove(struct platform_device *pdev)
|
|||
dev_err(dev, "failed to unregister notifier\n");
|
||||
}
|
||||
|
||||
static const struct platform_device_id cros_ec_rtc_id[] = {
|
||||
{ DRV_NAME, 0 },
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(platform, cros_ec_rtc_id);
|
||||
|
||||
static struct platform_driver cros_ec_rtc_driver = {
|
||||
.probe = cros_ec_rtc_probe,
|
||||
.remove_new = cros_ec_rtc_remove,
|
||||
|
|
@ -399,6 +406,7 @@ static struct platform_driver cros_ec_rtc_driver = {
|
|||
.name = DRV_NAME,
|
||||
.pm = &cros_ec_rtc_pm_ops,
|
||||
},
|
||||
.id_table = cros_ec_rtc_id,
|
||||
};
|
||||
|
||||
module_platform_driver(cros_ec_rtc_driver);
|
||||
|
|
@ -406,4 +414,3 @@ module_platform_driver(cros_ec_rtc_driver);
|
|||
MODULE_DESCRIPTION("RTC driver for Chrome OS ECs");
|
||||
MODULE_AUTHOR("Stephen Barber <smbarber@chromium.org>");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_ALIAS("platform:" DRV_NAME);
|
||||
|
|
|
|||
|
|
@ -450,4 +450,3 @@ module_spi_driver(mcp795_driver);
|
|||
MODULE_DESCRIPTION("MCP795 RTC SPI Driver");
|
||||
MODULE_AUTHOR("Josef Gajdusek <atx@atx.name>");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS("spi:mcp795");
|
||||
|
|
|
|||
|
|
@ -517,12 +517,15 @@ static int nct3018y_probe(struct i2c_client *client)
|
|||
if (nct3018y->part_num < 0) {
|
||||
dev_dbg(&client->dev, "Failed to read NCT3018Y_REG_PART.\n");
|
||||
return nct3018y->part_num;
|
||||
} else if (nct3018y->part_num == NCT3018Y_REG_PART_NCT3018Y) {
|
||||
flags = NCT3018Y_BIT_HF;
|
||||
err = i2c_smbus_write_byte_data(client, NCT3018Y_REG_CTRL, flags);
|
||||
if (err < 0) {
|
||||
dev_dbg(&client->dev, "Unable to write NCT3018Y_REG_CTRL.\n");
|
||||
return err;
|
||||
} else {
|
||||
nct3018y->part_num &= 0x03; /* Part number is corresponding to bit 0 and 1 */
|
||||
if (nct3018y->part_num == NCT3018Y_REG_PART_NCT3018Y) {
|
||||
flags = NCT3018Y_BIT_HF;
|
||||
err = i2c_smbus_write_byte_data(client, NCT3018Y_REG_CTRL, flags);
|
||||
if (err < 0) {
|
||||
dev_dbg(&client->dev, "Unable to write NCT3018Y_REG_CTRL.\n");
|
||||
return err;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -527,7 +527,6 @@ static int pcf8563_probe(struct i2c_client *client)
|
|||
|
||||
i2c_set_clientdata(client, pcf8563);
|
||||
pcf8563->client = client;
|
||||
device_set_wakeup_capable(&client->dev, 1);
|
||||
|
||||
/* Set timer to lowest frequency to save power (ref Haoyu datasheet) */
|
||||
buf = PCF8563_TMRC_1_60;
|
||||
|
|
@ -553,6 +552,7 @@ static int pcf8563_probe(struct i2c_client *client)
|
|||
/* the pcf8563 alarm only supports a minute accuracy */
|
||||
set_bit(RTC_FEATURE_ALARM_RES_MINUTE, pcf8563->rtc->features);
|
||||
clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, pcf8563->rtc->features);
|
||||
clear_bit(RTC_FEATURE_ALARM, pcf8563->rtc->features);
|
||||
pcf8563->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
|
||||
pcf8563->rtc->range_max = RTC_TIMESTAMP_END_2099;
|
||||
pcf8563->rtc->set_start_time = true;
|
||||
|
|
@ -573,7 +573,12 @@ static int pcf8563_probe(struct i2c_client *client)
|
|||
return err;
|
||||
}
|
||||
} else {
|
||||
clear_bit(RTC_FEATURE_ALARM, pcf8563->rtc->features);
|
||||
client->irq = 0;
|
||||
}
|
||||
|
||||
if (client->irq > 0 || device_property_read_bool(&client->dev, "wakeup-source")) {
|
||||
device_init_wakeup(&client->dev, true);
|
||||
set_bit(RTC_FEATURE_ALARM, pcf8563->rtc->features);
|
||||
}
|
||||
|
||||
err = devm_rtc_register_device(pcf8563->rtc);
|
||||
|
|
|
|||
|
|
@ -330,7 +330,7 @@ static int rx6110_probe(struct rx6110_data *rx6110, struct device *dev)
|
|||
}
|
||||
|
||||
#if IS_ENABLED(CONFIG_SPI_MASTER)
|
||||
static struct regmap_config regmap_spi_config = {
|
||||
static const struct regmap_config regmap_spi_config = {
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
.max_register = RX6110_REG_IRQ,
|
||||
|
|
@ -410,7 +410,7 @@ static void rx6110_spi_unregister(void)
|
|||
#endif /* CONFIG_SPI_MASTER */
|
||||
|
||||
#if IS_ENABLED(CONFIG_I2C)
|
||||
static struct regmap_config regmap_i2c_config = {
|
||||
static const struct regmap_config regmap_i2c_config = {
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
.max_register = RX6110_REG_IRQ,
|
||||
|
|
|
|||
368
drivers/rtc/rtc-rx8111.c
Normal file
368
drivers/rtc/rtc-rx8111.c
Normal file
|
|
@ -0,0 +1,368 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Driver for Epson RX8111 RTC.
|
||||
*
|
||||
* Copyright (C) 2023 Axis Communications AB
|
||||
*/
|
||||
|
||||
#include <linux/bcd.h>
|
||||
#include <linux/bitfield.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/regmap.h>
|
||||
|
||||
#include <linux/rtc.h>
|
||||
|
||||
#define RX8111_REG_SEC 0x10 /* Second counter. */
|
||||
#define RX8111_REG_MIN 0x11 /* Minute counter */
|
||||
#define RX8111_REG_HOUR 0x12 /* Hour counter. */
|
||||
#define RX8111_REG_WEEK 0x13 /* Week day counter. */
|
||||
#define RX8111_REG_DAY 0x14 /* Month day counter. */
|
||||
#define RX8111_REG_MONTH 0x15 /* Month counter. */
|
||||
#define RX8111_REG_YEAR 0x16 /* Year counter. */
|
||||
|
||||
#define RX8111_REG_ALARM_MIN 0x17 /* Alarm minute. */
|
||||
#define RX8111_REG_ALARM_HOUR 0x18 /* Alarm hour. */
|
||||
#define RX8111_REG_ALARM_WEEK_DAY 0x19 /* Alarm week or month day. */
|
||||
|
||||
#define RX8111_REG_TIMER_COUNTER0 0x1a /* Timer counter LSB. */
|
||||
#define RX8111_REG_TIMER_COUNTER1 0x1b /* Timer counter. */
|
||||
#define RX8111_REG_TIMER_COUNTER2 0x1c /* Timer counter MSB. */
|
||||
|
||||
#define RX8111_REG_EXT 0x1d /* Extension register. */
|
||||
#define RX8111_REG_FLAG 0x1e /* Flag register. */
|
||||
#define RX8111_REG_CTRL 0x1f /* Control register. */
|
||||
|
||||
#define RX8111_REG_TS_1_1000_SEC 0x20 /* Timestamp 256 or 512 Hz . */
|
||||
#define RX8111_REG_TS_1_100_SEC 0x21 /* Timestamp 1 - 128 Hz. */
|
||||
#define RX8111_REG_TS_SEC 0x22 /* Timestamp second. */
|
||||
#define RX8111_REG_TS_MIN 0x23 /* Timestamp minute. */
|
||||
#define RX8111_REG_TS_HOUR 0x24 /* Timestamp hour. */
|
||||
#define RX8111_REG_TS_WEEK 0x25 /* Timestamp week day. */
|
||||
#define RX8111_REG_TS_DAY 0x26 /* Timestamp month day. */
|
||||
#define RX8111_REG_TS_MONTH 0x27 /* Timestamp month. */
|
||||
#define RX8111_REG_TS_YEAR 0x28 /* Timestamp year. */
|
||||
#define RX8111_REG_TS_STATUS 0x29 /* Timestamp status. */
|
||||
|
||||
#define RX8111_REG_EVIN_SETTING 0x2b /* Timestamp trigger setting. */
|
||||
#define RX8111_REG_ALARM_SEC 0x2c /* Alarm second. */
|
||||
#define RX8111_REG_TIMER_CTRL 0x2d /* Timer control. */
|
||||
#define RX8111_REG_TS_CTRL0 0x2e /* Timestamp control 0. */
|
||||
#define RX8111_REG_CMD_TRIGGER 0x2f /* Timestamp trigger. */
|
||||
#define RX8111_REG_PWR_SWITCH_CTRL 0x32 /* Power switch control. */
|
||||
#define RX8111_REG_STATUS_MON 0x33 /* Status monitor. */
|
||||
#define RX8111_REG_TS_CTRL1 0x34 /* Timestamp control 1. */
|
||||
#define RX8111_REG_TS_CTRL2 0x35 /* Timestamp control 2. */
|
||||
#define RX8111_REG_TS_CTRL3 0x36 /* Timestamp control 3. */
|
||||
|
||||
#define RX8111_FLAG_XST_BIT BIT(0)
|
||||
#define RX8111_FLAG_VLF_BIT BIT(1)
|
||||
|
||||
#define RX8111_TIME_BUF_SZ (RX8111_REG_YEAR - RX8111_REG_SEC + 1)
|
||||
|
||||
enum rx8111_regfield {
|
||||
/* RX8111_REG_EXT. */
|
||||
RX8111_REGF_TSEL0,
|
||||
RX8111_REGF_TSEL1,
|
||||
RX8111_REGF_ETS,
|
||||
RX8111_REGF_WADA,
|
||||
RX8111_REGF_TE,
|
||||
RX8111_REGF_USEL,
|
||||
RX8111_REGF_FSEL0,
|
||||
RX8111_REGF_FSEL1,
|
||||
|
||||
/* RX8111_REG_FLAG. */
|
||||
RX8111_REGF_XST,
|
||||
RX8111_REGF_VLF,
|
||||
RX8111_REGF_EVF,
|
||||
RX8111_REGF_AF,
|
||||
RX8111_REGF_TF,
|
||||
RX8111_REGF_UF,
|
||||
RX8111_REGF_POR,
|
||||
|
||||
/* RX8111_REG_CTRL. */
|
||||
RX8111_REGF_STOP,
|
||||
RX8111_REGF_EIE,
|
||||
RX8111_REGF_AIE,
|
||||
RX8111_REGF_TIE,
|
||||
RX8111_REGF_UIE,
|
||||
|
||||
/* RX8111_REG_PWR_SWITCH_CTRL. */
|
||||
RX8111_REGF_SMPT0,
|
||||
RX8111_REGF_SMPT1,
|
||||
RX8111_REGF_SWSEL0,
|
||||
RX8111_REGF_SWSEL1,
|
||||
RX8111_REGF_INIEN,
|
||||
RX8111_REGF_CHGEN,
|
||||
|
||||
/* RX8111_REG_STATUS_MON. */
|
||||
RX8111_REGF_VLOW,
|
||||
|
||||
/* Sentinel value. */
|
||||
RX8111_REGF_MAX
|
||||
};
|
||||
|
||||
static const struct reg_field rx8111_regfields[] = {
|
||||
[RX8111_REGF_TSEL0] = REG_FIELD(RX8111_REG_EXT, 0, 0),
|
||||
[RX8111_REGF_TSEL1] = REG_FIELD(RX8111_REG_EXT, 1, 1),
|
||||
[RX8111_REGF_ETS] = REG_FIELD(RX8111_REG_EXT, 2, 2),
|
||||
[RX8111_REGF_WADA] = REG_FIELD(RX8111_REG_EXT, 3, 3),
|
||||
[RX8111_REGF_TE] = REG_FIELD(RX8111_REG_EXT, 4, 4),
|
||||
[RX8111_REGF_USEL] = REG_FIELD(RX8111_REG_EXT, 5, 5),
|
||||
[RX8111_REGF_FSEL0] = REG_FIELD(RX8111_REG_EXT, 6, 6),
|
||||
[RX8111_REGF_FSEL1] = REG_FIELD(RX8111_REG_EXT, 7, 7),
|
||||
|
||||
[RX8111_REGF_XST] = REG_FIELD(RX8111_REG_FLAG, 0, 0),
|
||||
[RX8111_REGF_VLF] = REG_FIELD(RX8111_REG_FLAG, 1, 1),
|
||||
[RX8111_REGF_EVF] = REG_FIELD(RX8111_REG_FLAG, 2, 2),
|
||||
[RX8111_REGF_AF] = REG_FIELD(RX8111_REG_FLAG, 3, 3),
|
||||
[RX8111_REGF_TF] = REG_FIELD(RX8111_REG_FLAG, 4, 4),
|
||||
[RX8111_REGF_UF] = REG_FIELD(RX8111_REG_FLAG, 5, 5),
|
||||
[RX8111_REGF_POR] = REG_FIELD(RX8111_REG_FLAG, 7, 7),
|
||||
|
||||
[RX8111_REGF_STOP] = REG_FIELD(RX8111_REG_CTRL, 0, 0),
|
||||
[RX8111_REGF_EIE] = REG_FIELD(RX8111_REG_CTRL, 2, 2),
|
||||
[RX8111_REGF_AIE] = REG_FIELD(RX8111_REG_CTRL, 3, 3),
|
||||
[RX8111_REGF_TIE] = REG_FIELD(RX8111_REG_CTRL, 4, 4),
|
||||
[RX8111_REGF_UIE] = REG_FIELD(RX8111_REG_CTRL, 5, 5),
|
||||
|
||||
[RX8111_REGF_SMPT0] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 0, 0),
|
||||
[RX8111_REGF_SMPT1] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 1, 1),
|
||||
[RX8111_REGF_SWSEL0] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 2, 2),
|
||||
[RX8111_REGF_SWSEL1] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 3, 3),
|
||||
[RX8111_REGF_INIEN] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 6, 6),
|
||||
[RX8111_REGF_CHGEN] = REG_FIELD(RX8111_REG_PWR_SWITCH_CTRL, 7, 7),
|
||||
|
||||
[RX8111_REGF_VLOW] = REG_FIELD(RX8111_REG_STATUS_MON, 1, 1),
|
||||
};
|
||||
|
||||
static const struct regmap_config rx8111_regmap_config = {
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
.max_register = RX8111_REG_TS_CTRL3,
|
||||
};
|
||||
|
||||
struct rx8111_data {
|
||||
struct regmap *regmap;
|
||||
struct regmap_field *regfields[RX8111_REGF_MAX];
|
||||
struct device *dev;
|
||||
struct rtc_device *rtc;
|
||||
};
|
||||
|
||||
static int rx8111_read_vl_flag(struct rx8111_data *data, unsigned int *vlval)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = regmap_field_read(data->regfields[RX8111_REGF_VLF], vlval);
|
||||
if (ret)
|
||||
dev_dbg(data->dev, "Could not read VL flag (%d)", ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int rx8111_read_time(struct device *dev, struct rtc_time *tm)
|
||||
{
|
||||
struct rx8111_data *data = dev_get_drvdata(dev);
|
||||
u8 buf[RX8111_TIME_BUF_SZ];
|
||||
unsigned int regval;
|
||||
int ret;
|
||||
|
||||
/* Check status. */
|
||||
ret = regmap_read(data->regmap, RX8111_REG_FLAG, ®val);
|
||||
if (ret) {
|
||||
dev_dbg(data->dev, "Could not read flag register (%d)\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (FIELD_GET(RX8111_FLAG_XST_BIT, regval)) {
|
||||
dev_dbg(data->dev,
|
||||
"Crystal oscillation stopped, time is not reliable\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (FIELD_GET(RX8111_FLAG_VLF_BIT, regval)) {
|
||||
dev_dbg(data->dev,
|
||||
"Low voltage detected, time is not reliable\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = regmap_field_read(data->regfields[RX8111_REGF_STOP], ®val);
|
||||
if (ret) {
|
||||
dev_dbg(data->dev, "Could not read clock status (%d)\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (regval) {
|
||||
dev_dbg(data->dev, "Clock stopped, time is not reliable\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Read time. */
|
||||
ret = regmap_bulk_read(data->regmap, RX8111_REG_SEC, buf,
|
||||
ARRAY_SIZE(buf));
|
||||
if (ret) {
|
||||
dev_dbg(data->dev, "Could not bulk read time (%d)\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
tm->tm_sec = bcd2bin(buf[0]);
|
||||
tm->tm_min = bcd2bin(buf[1]);
|
||||
tm->tm_hour = bcd2bin(buf[2]);
|
||||
tm->tm_wday = ffs(buf[3]) - 1;
|
||||
tm->tm_mday = bcd2bin(buf[4]);
|
||||
tm->tm_mon = bcd2bin(buf[5]) - 1;
|
||||
tm->tm_year = bcd2bin(buf[6]) + 100;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rx8111_set_time(struct device *dev, struct rtc_time *tm)
|
||||
{
|
||||
struct rx8111_data *data = dev_get_drvdata(dev);
|
||||
u8 buf[RX8111_TIME_BUF_SZ];
|
||||
int ret;
|
||||
|
||||
buf[0] = bin2bcd(tm->tm_sec);
|
||||
buf[1] = bin2bcd(tm->tm_min);
|
||||
buf[2] = bin2bcd(tm->tm_hour);
|
||||
buf[3] = BIT(tm->tm_wday);
|
||||
buf[4] = bin2bcd(tm->tm_mday);
|
||||
buf[5] = bin2bcd(tm->tm_mon + 1);
|
||||
buf[6] = bin2bcd(tm->tm_year - 100);
|
||||
|
||||
ret = regmap_clear_bits(data->regmap, RX8111_REG_FLAG,
|
||||
RX8111_FLAG_XST_BIT | RX8111_FLAG_VLF_BIT);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* Stop the clock. */
|
||||
ret = regmap_field_write(data->regfields[RX8111_REGF_STOP], 1);
|
||||
if (ret) {
|
||||
dev_dbg(data->dev, "Could not stop the clock (%d)\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Set the time. */
|
||||
ret = regmap_bulk_write(data->regmap, RX8111_REG_SEC, buf,
|
||||
ARRAY_SIZE(buf));
|
||||
if (ret) {
|
||||
dev_dbg(data->dev, "Could not bulk write time (%d)\n", ret);
|
||||
|
||||
/*
|
||||
* We don't bother with trying to start the clock again. We
|
||||
* check for this in rx8111_read_time() (and thus force user to
|
||||
* call rx8111_set_time() to try again).
|
||||
*/
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Start the clock. */
|
||||
ret = regmap_field_write(data->regfields[RX8111_REGF_STOP], 0);
|
||||
if (ret) {
|
||||
dev_dbg(data->dev, "Could not start the clock (%d)\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rx8111_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
|
||||
{
|
||||
struct rx8111_data *data = dev_get_drvdata(dev);
|
||||
unsigned int regval;
|
||||
unsigned int vlval;
|
||||
int ret;
|
||||
|
||||
switch (cmd) {
|
||||
case RTC_VL_READ:
|
||||
ret = rx8111_read_vl_flag(data, ®val);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
vlval = regval ? RTC_VL_DATA_INVALID : 0;
|
||||
|
||||
ret = regmap_field_read(data->regfields[RX8111_REGF_VLOW],
|
||||
®val);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
vlval |= regval ? RTC_VL_BACKUP_LOW : 0;
|
||||
|
||||
return put_user(vlval, (typeof(vlval) __user *)arg);
|
||||
default:
|
||||
return -ENOIOCTLCMD;
|
||||
}
|
||||
}
|
||||
|
||||
static const struct rtc_class_ops rx8111_rtc_ops = {
|
||||
.read_time = rx8111_read_time,
|
||||
.set_time = rx8111_set_time,
|
||||
.ioctl = rx8111_ioctl,
|
||||
};
|
||||
|
||||
static int rx8111_probe(struct i2c_client *client)
|
||||
{
|
||||
struct rx8111_data *data;
|
||||
struct rtc_device *rtc;
|
||||
size_t i;
|
||||
|
||||
data = devm_kmalloc(&client->dev, sizeof(*data), GFP_KERNEL);
|
||||
if (!data) {
|
||||
dev_dbg(&client->dev, "Could not allocate device data\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
data->dev = &client->dev;
|
||||
dev_set_drvdata(data->dev, data);
|
||||
|
||||
data->regmap = devm_regmap_init_i2c(client, &rx8111_regmap_config);
|
||||
if (IS_ERR(data->regmap)) {
|
||||
dev_dbg(data->dev, "Could not initialize regmap\n");
|
||||
return PTR_ERR(data->regmap);
|
||||
}
|
||||
|
||||
for (i = 0; i < RX8111_REGF_MAX; ++i) {
|
||||
data->regfields[i] = devm_regmap_field_alloc(
|
||||
data->dev, data->regmap, rx8111_regfields[i]);
|
||||
if (IS_ERR(data->regfields[i])) {
|
||||
dev_dbg(data->dev,
|
||||
"Could not allocate register field %zu\n", i);
|
||||
return PTR_ERR(data->regfields[i]);
|
||||
}
|
||||
}
|
||||
|
||||
rtc = devm_rtc_allocate_device(data->dev);
|
||||
if (IS_ERR(rtc)) {
|
||||
dev_dbg(data->dev, "Could not allocate rtc device\n");
|
||||
return PTR_ERR(rtc);
|
||||
}
|
||||
|
||||
rtc->ops = &rx8111_rtc_ops;
|
||||
rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
|
||||
rtc->range_max = RTC_TIMESTAMP_END_2099;
|
||||
|
||||
clear_bit(RTC_FEATURE_ALARM, rtc->features);
|
||||
|
||||
return devm_rtc_register_device(rtc);
|
||||
}
|
||||
|
||||
static const struct of_device_id rx8111_of_match[] = {
|
||||
{
|
||||
.compatible = "epson,rx8111",
|
||||
},
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, rx8111_of_match);
|
||||
|
||||
static struct i2c_driver rx8111_driver = {
|
||||
.driver = {
|
||||
.name = "rtc-rx8111",
|
||||
.of_match_table = rx8111_of_match,
|
||||
},
|
||||
.probe = rx8111_probe,
|
||||
};
|
||||
module_i2c_driver(rx8111_driver);
|
||||
|
||||
MODULE_AUTHOR("Waqar Hameed <waqar.hameed@axis.com>");
|
||||
MODULE_DESCRIPTION("Epson RX8111 RTC driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Reference in a new issue