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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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Merge branch 'pci/enumeration'
- Add and use pci_get_base_class() to search for all PCI_BASE_CLASS_DISPLAY devices (Sui Jingfeng) - Fix a vmd check for multi-function devices (Ilpo Järvinen) - Add PCI_HEADER_TYPE_MFD and use it to replace literals (Ilpo Järvinen) - Use acpi_evaluate_dsm_typed() instead of open-coding it (Andy Shevchenko) - Keep .remove() and .probe() callbacks (previously marked __init) in case they're used via sysfs (Uwe Kleine-König) * pci/enumeration: PCI: keystone: Don't discard .probe() callback PCI: keystone: Don't discard .remove() callback PCI: kirin: Don't discard .remove() callback PCI: exynos: Don't discard .remove() callback PCI/ACPI: Use acpi_evaluate_dsm_typed() PCI: Use PCI_HEADER_TYPE_* instead of literals PCI: Add PCI_HEADER_TYPE_MFD definition PCI: vmd: Correct PCI Header Type Register's multi-function check drm/radeon: Use pci_get_base_class() to reduce duplicated code drm/amdgpu: Use pci_get_base_class() to reduce duplicated code drm/nouveau: Use pci_get_base_class() to reduce duplicated code ALSA: hda: Use pci_get_base_class() to reduce duplicated code PCI: Add pci_get_base_class() helper
This commit is contained in:
commit
553b84bf46
24 changed files with 104 additions and 98 deletions
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@ -1389,14 +1389,11 @@ void amdgpu_acpi_detect(void)
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struct pci_dev *pdev = NULL;
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int ret;
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while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
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if (!atif->handle)
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amdgpu_atif_pci_probe_handle(pdev);
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if (!atcs->handle)
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amdgpu_atcs_pci_probe_handle(pdev);
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}
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while ((pdev = pci_get_base_class(PCI_BASE_CLASS_DISPLAY, pdev))) {
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if ((pdev->class != PCI_CLASS_DISPLAY_VGA << 8) &&
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(pdev->class != PCI_CLASS_DISPLAY_OTHER << 8))
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continue;
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while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) {
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if (!atif->handle)
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amdgpu_atif_pci_probe_handle(pdev);
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if (!atcs->handle)
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@ -287,7 +287,11 @@ static bool amdgpu_atrm_get_bios(struct amdgpu_device *adev)
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if (adev->flags & AMD_IS_APU)
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return false;
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while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
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while ((pdev = pci_get_base_class(PCI_BASE_CLASS_DISPLAY, pdev))) {
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if ((pdev->class != PCI_CLASS_DISPLAY_VGA << 8) &&
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(pdev->class != PCI_CLASS_DISPLAY_OTHER << 8))
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continue;
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dhandle = ACPI_HANDLE(&pdev->dev);
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if (!dhandle)
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continue;
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@ -299,20 +303,6 @@ static bool amdgpu_atrm_get_bios(struct amdgpu_device *adev)
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}
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}
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if (!found) {
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while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) {
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dhandle = ACPI_HANDLE(&pdev->dev);
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if (!dhandle)
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continue;
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status = acpi_get_handle(dhandle, "ATRM", &atrm_handle);
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if (ACPI_SUCCESS(status)) {
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found = true;
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break;
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}
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}
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}
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if (!found)
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return false;
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pci_dev_put(pdev);
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@ -284,14 +284,11 @@ static bool nouveau_dsm_detect(void)
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printk("MXM: GUID detected in BIOS\n");
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/* now do DSM detection */
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while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
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vga_count++;
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while ((pdev = pci_get_base_class(PCI_BASE_CLASS_DISPLAY, pdev))) {
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if ((pdev->class != PCI_CLASS_DISPLAY_VGA << 8) &&
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(pdev->class != PCI_CLASS_DISPLAY_3D << 8))
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continue;
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nouveau_dsm_pci_probe(pdev, &dhandle, &has_mux, &has_optimus,
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&has_optimus_flags, &has_power_resources);
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}
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while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_3D << 8, pdev)) != NULL) {
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vga_count++;
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nouveau_dsm_pci_probe(pdev, &dhandle, &has_mux, &has_optimus,
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@ -199,7 +199,11 @@ static bool radeon_atrm_get_bios(struct radeon_device *rdev)
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if (rdev->flags & RADEON_IS_IGP)
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return false;
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while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
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while ((pdev = pci_get_base_class(PCI_BASE_CLASS_DISPLAY, pdev))) {
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if ((pdev->class != PCI_CLASS_DISPLAY_VGA << 8) &&
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(pdev->class != PCI_CLASS_DISPLAY_OTHER << 8))
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continue;
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dhandle = ACPI_HANDLE(&pdev->dev);
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if (!dhandle)
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continue;
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@ -211,20 +215,6 @@ static bool radeon_atrm_get_bios(struct radeon_device *rdev)
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}
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}
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if (!found) {
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while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) {
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dhandle = ACPI_HANDLE(&pdev->dev);
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if (!dhandle)
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continue;
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status = acpi_get_handle(dhandle, "ATRM", &atrm_handle);
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if (ACPI_SUCCESS(status)) {
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found = true;
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break;
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}
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}
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}
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if (!found)
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return false;
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pci_dev_put(pdev);
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@ -375,7 +375,7 @@ static int exynos_pcie_probe(struct platform_device *pdev)
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return ret;
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}
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static int __exit exynos_pcie_remove(struct platform_device *pdev)
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static int exynos_pcie_remove(struct platform_device *pdev)
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{
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struct exynos_pcie *ep = platform_get_drvdata(pdev);
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@ -431,7 +431,7 @@ static const struct of_device_id exynos_pcie_of_match[] = {
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static struct platform_driver exynos_pcie_driver = {
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.probe = exynos_pcie_probe,
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.remove = __exit_p(exynos_pcie_remove),
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.remove = exynos_pcie_remove,
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.driver = {
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.name = "exynos-pcie",
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.of_match_table = exynos_pcie_of_match,
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@ -1100,7 +1100,7 @@ static const struct of_device_id ks_pcie_of_match[] = {
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{ },
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};
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static int __init ks_pcie_probe(struct platform_device *pdev)
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static int ks_pcie_probe(struct platform_device *pdev)
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{
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const struct dw_pcie_host_ops *host_ops;
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const struct dw_pcie_ep_ops *ep_ops;
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@ -1302,7 +1302,7 @@ static int __init ks_pcie_probe(struct platform_device *pdev)
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return ret;
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}
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static int __exit ks_pcie_remove(struct platform_device *pdev)
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static int ks_pcie_remove(struct platform_device *pdev)
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{
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struct keystone_pcie *ks_pcie = platform_get_drvdata(pdev);
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struct device_link **link = ks_pcie->link;
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@ -1318,9 +1318,9 @@ static int __exit ks_pcie_remove(struct platform_device *pdev)
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return 0;
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}
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static struct platform_driver ks_pcie_driver __refdata = {
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static struct platform_driver ks_pcie_driver = {
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.probe = ks_pcie_probe,
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.remove = __exit_p(ks_pcie_remove),
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.remove = ks_pcie_remove,
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.driver = {
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.name = "keystone-pcie",
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.of_match_table = ks_pcie_of_match,
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@ -58,7 +58,7 @@ static bool ls_pcie_is_bridge(struct ls_pcie *pcie)
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u32 header_type;
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header_type = ioread8(pci->dbi_base + PCI_HEADER_TYPE);
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header_type &= 0x7f;
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header_type &= PCI_HEADER_TYPE_MASK;
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return header_type == PCI_HEADER_TYPE_BRIDGE;
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}
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@ -741,7 +741,7 @@ static int kirin_pcie_power_on(struct platform_device *pdev,
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return ret;
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}
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static int __exit kirin_pcie_remove(struct platform_device *pdev)
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static int kirin_pcie_remove(struct platform_device *pdev)
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{
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struct kirin_pcie *kirin_pcie = platform_get_drvdata(pdev);
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@ -818,7 +818,7 @@ static int kirin_pcie_probe(struct platform_device *pdev)
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static struct platform_driver kirin_pcie_driver = {
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.probe = kirin_pcie_probe,
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.remove = __exit_p(kirin_pcie_remove),
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.remove = kirin_pcie_remove,
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.driver = {
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.name = "kirin-pcie",
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.of_match_table = kirin_pcie_match,
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@ -539,7 +539,7 @@ static bool mobiveil_pcie_is_bridge(struct mobiveil_pcie *pcie)
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u32 header_type;
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header_type = mobiveil_csr_readb(pcie, PCI_HEADER_TYPE);
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header_type &= 0x7f;
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header_type &= PCI_HEADER_TYPE_MASK;
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return header_type == PCI_HEADER_TYPE_BRIDGE;
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}
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@ -783,7 +783,7 @@ static int iproc_pcie_check_link(struct iproc_pcie *pcie)
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/* make sure we are not in EP mode */
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iproc_pci_raw_config_read32(pcie, 0, PCI_HEADER_TYPE, 1, &hdr_type);
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if ((hdr_type & 0x7f) != PCI_HEADER_TYPE_BRIDGE) {
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if ((hdr_type & PCI_HEADER_TYPE_MASK) != PCI_HEADER_TYPE_BRIDGE) {
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dev_err(dev, "in EP mode, hdr=%#02x\n", hdr_type);
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return -EFAULT;
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}
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@ -43,7 +43,7 @@ static void rcar_pcie_ep_hw_init(struct rcar_pcie *pcie)
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rcar_rmw32(pcie, REXPCAP(0), 0xff, PCI_CAP_ID_EXP);
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rcar_rmw32(pcie, REXPCAP(PCI_EXP_FLAGS),
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PCI_EXP_FLAGS_TYPE, PCI_EXP_TYPE_ENDPOINT << 4);
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rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), 0x7f,
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rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), PCI_HEADER_TYPE_MASK,
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PCI_HEADER_TYPE_NORMAL);
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/* Write out the physical slot number = 0 */
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@ -460,7 +460,7 @@ static int rcar_pcie_hw_init(struct rcar_pcie *pcie)
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rcar_rmw32(pcie, REXPCAP(0), 0xff, PCI_CAP_ID_EXP);
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rcar_rmw32(pcie, REXPCAP(PCI_EXP_FLAGS),
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PCI_EXP_FLAGS_TYPE, PCI_EXP_TYPE_ROOT_PORT << 4);
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rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), 0x7f,
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rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), PCI_HEADER_TYPE_MASK,
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PCI_HEADER_TYPE_BRIDGE);
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/* Enable data link layer active state reporting */
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@ -525,10 +525,9 @@ static void vmd_domain_reset(struct vmd_dev *vmd)
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base = vmd->cfgbar + PCIE_ECAM_OFFSET(bus,
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PCI_DEVFN(dev, 0), 0);
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hdr_type = readb(base + PCI_HEADER_TYPE) &
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PCI_HEADER_TYPE_MASK;
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hdr_type = readb(base + PCI_HEADER_TYPE);
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functions = (hdr_type & 0x80) ? 8 : 1;
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functions = (hdr_type & PCI_HEADER_TYPE_MFD) ? 8 : 1;
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for (fn = 0; fn < functions; fn++) {
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base = vmd->cfgbar + PCIE_ECAM_OFFSET(bus,
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PCI_DEVFN(dev, fn), 0);
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@ -2059,7 +2059,7 @@ int cpqhp_process_SS(struct controller *ctrl, struct pci_func *func)
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return rc;
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/* If it's a bridge, check the VGA Enable bit */
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if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
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if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) {
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rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_BRIDGE_CONTROL, &BCR);
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if (rc)
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return rc;
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@ -2342,7 +2342,7 @@ static int configure_new_function(struct controller *ctrl, struct pci_func *func
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if (rc)
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return rc;
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if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
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if ((temp_byte & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) {
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/* set Primary bus */
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dbg("set Primary bus = %d\n", func->bus);
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rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_PRIMARY_BUS, func->bus);
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@ -2739,7 +2739,7 @@ static int configure_new_function(struct controller *ctrl, struct pci_func *func
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* PCI_BRIDGE_CTL_SERR |
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* PCI_BRIDGE_CTL_NO_ISA */
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rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
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} else if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
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} else if ((temp_byte & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_NORMAL) {
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/* Standard device */
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rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, &class_code);
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|
|
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@ -363,7 +363,7 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
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return rc;
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/* If multi-function device, set max_functions to 8 */
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if (header_type & 0x80)
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if (header_type & PCI_HEADER_TYPE_MFD)
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max_functions = 8;
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else
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max_functions = 1;
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@ -372,7 +372,7 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
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do {
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DevError = 0;
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if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
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if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) {
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/* Recurse the subordinate bus
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* get the subordinate bus number
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*/
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@ -487,13 +487,13 @@ int cpqhp_save_slot_config(struct controller *ctrl, struct pci_func *new_slot)
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pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), 0x0B, &class_code);
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pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_HEADER_TYPE, &header_type);
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if (header_type & 0x80) /* Multi-function device */
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if (header_type & PCI_HEADER_TYPE_MFD)
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max_functions = 8;
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else
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max_functions = 1;
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|
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while (function < max_functions) {
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if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
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if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) {
|
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/* Recurse the subordinate bus */
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pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_SECONDARY_BUS, &secondary_bus);
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|
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|
@ -571,7 +571,7 @@ int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func *func)
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/* Check for Bridge */
|
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pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
|
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|
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if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
|
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if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) {
|
||||
pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
|
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|
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sub_bus = (int) secondary_bus;
|
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|
@ -625,7 +625,7 @@ int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func *func)
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|||
|
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} /* End of base register loop */
|
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|
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} else if ((header_type & 0x7F) == 0x00) {
|
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} else if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_NORMAL) {
|
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/* Figure out IO and memory base lengths */
|
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for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
|
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temp_register = 0xFFFFFFFF;
|
||||
|
@ -723,7 +723,7 @@ int cpqhp_save_used_resources(struct controller *ctrl, struct pci_func *func)
|
|||
/* Check for Bridge */
|
||||
pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
|
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|
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if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
|
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if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) {
|
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/* Clear Bridge Control Register */
|
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command = 0x00;
|
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pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
|
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|
@ -858,7 +858,7 @@ int cpqhp_save_used_resources(struct controller *ctrl, struct pci_func *func)
|
|||
}
|
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} /* End of base register loop */
|
||||
/* Standard header */
|
||||
} else if ((header_type & 0x7F) == 0x00) {
|
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} else if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_NORMAL) {
|
||||
/* Figure out IO and memory base lengths */
|
||||
for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
|
||||
pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base);
|
||||
|
@ -975,7 +975,7 @@ int cpqhp_configure_board(struct controller *ctrl, struct pci_func *func)
|
|||
pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
|
||||
|
||||
/* If this is a bridge device, restore subordinate devices */
|
||||
if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
|
||||
if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) {
|
||||
pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
|
||||
|
||||
sub_bus = (int) secondary_bus;
|
||||
|
@ -1067,7 +1067,7 @@ int cpqhp_valid_replace(struct controller *ctrl, struct pci_func *func)
|
|||
/* Check for Bridge */
|
||||
pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
|
||||
|
||||
if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
|
||||
if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) {
|
||||
/* In order to continue checking, we must program the
|
||||
* bus registers in the bridge to respond to accesses
|
||||
* for its subordinate bus(es)
|
||||
|
@ -1090,7 +1090,7 @@ int cpqhp_valid_replace(struct controller *ctrl, struct pci_func *func)
|
|||
|
||||
}
|
||||
/* Check to see if it is a standard config header */
|
||||
else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
|
||||
else if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_NORMAL) {
|
||||
/* Check subsystem vendor and ID */
|
||||
pci_bus_read_config_dword(pci_bus, devfn, PCI_SUBSYSTEM_VENDOR_ID, &temp_register);
|
||||
|
||||
|
|
|
@ -17,6 +17,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/pci_hotplug.h>
|
||||
#include <linux/pci_regs.h>
|
||||
|
||||
extern int ibmphp_debug;
|
||||
|
||||
|
@ -286,8 +287,8 @@ int ibmphp_register_pci(void);
|
|||
|
||||
/* pci specific defines */
|
||||
#define PCI_VENDOR_ID_NOTVALID 0xFFFF
|
||||
#define PCI_HEADER_TYPE_MULTIDEVICE 0x80
|
||||
#define PCI_HEADER_TYPE_MULTIBRIDGE 0x81
|
||||
#define PCI_HEADER_TYPE_MULTIDEVICE (PCI_HEADER_TYPE_MFD|PCI_HEADER_TYPE_NORMAL)
|
||||
#define PCI_HEADER_TYPE_MULTIBRIDGE (PCI_HEADER_TYPE_MFD|PCI_HEADER_TYPE_BRIDGE)
|
||||
|
||||
#define LATENCY 0x64
|
||||
#define CACHE 64
|
||||
|
|
|
@ -1087,7 +1087,7 @@ static struct res_needed *scan_behind_bridge(struct pci_func *func, u8 busno)
|
|||
pci_bus_read_config_dword(ibmphp_pci_bus, devfn, PCI_CLASS_REVISION, &class);
|
||||
|
||||
debug("hdr_type behind the bridge is %x\n", hdr_type);
|
||||
if ((hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) {
|
||||
if ((hdr_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) {
|
||||
err("embedded bridges not supported for hot-plugging.\n");
|
||||
amount->not_correct = 1;
|
||||
return amount;
|
||||
|
|
|
@ -1215,12 +1215,12 @@ void acpi_pci_add_bus(struct pci_bus *bus)
|
|||
if (!pci_is_root_bus(bus))
|
||||
return;
|
||||
|
||||
obj = acpi_evaluate_dsm(ACPI_HANDLE(bus->bridge), &pci_acpi_dsm_guid, 3,
|
||||
DSM_PCI_POWER_ON_RESET_DELAY, NULL);
|
||||
obj = acpi_evaluate_dsm_typed(ACPI_HANDLE(bus->bridge), &pci_acpi_dsm_guid, 3,
|
||||
DSM_PCI_POWER_ON_RESET_DELAY, NULL, ACPI_TYPE_INTEGER);
|
||||
if (!obj)
|
||||
return;
|
||||
|
||||
if (obj->type == ACPI_TYPE_INTEGER && obj->integer.value == 1) {
|
||||
if (obj->integer.value == 1) {
|
||||
bridge = pci_find_host_bridge(bus);
|
||||
bridge->ignore_reset_delay = 1;
|
||||
}
|
||||
|
@ -1376,12 +1376,13 @@ static void pci_acpi_optimize_delay(struct pci_dev *pdev,
|
|||
if (bridge->ignore_reset_delay)
|
||||
pdev->d3cold_delay = 0;
|
||||
|
||||
obj = acpi_evaluate_dsm(handle, &pci_acpi_dsm_guid, 3,
|
||||
DSM_PCI_DEVICE_READINESS_DURATIONS, NULL);
|
||||
obj = acpi_evaluate_dsm_typed(handle, &pci_acpi_dsm_guid, 3,
|
||||
DSM_PCI_DEVICE_READINESS_DURATIONS, NULL,
|
||||
ACPI_TYPE_PACKAGE);
|
||||
if (!obj)
|
||||
return;
|
||||
|
||||
if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 5) {
|
||||
if (obj->package.count == 5) {
|
||||
elements = obj->package.elements;
|
||||
if (elements[0].type == ACPI_TYPE_INTEGER) {
|
||||
value = (int)elements[0].integer.value / 1000;
|
||||
|
|
|
@ -534,7 +534,7 @@ u8 pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap)
|
|||
|
||||
pci_bus_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &hdr_type);
|
||||
|
||||
pos = __pci_bus_find_cap_start(bus, devfn, hdr_type & 0x7f);
|
||||
pos = __pci_bus_find_cap_start(bus, devfn, hdr_type & PCI_HEADER_TYPE_MASK);
|
||||
if (pos)
|
||||
pos = __pci_find_next_cap(bus, devfn, pos, cap);
|
||||
|
||||
|
|
|
@ -1844,8 +1844,8 @@ static void quirk_jmicron_ata(struct pci_dev *pdev)
|
|||
|
||||
/* Update pdev accordingly */
|
||||
pci_read_config_byte(pdev, PCI_HEADER_TYPE, &hdr);
|
||||
pdev->hdr_type = hdr & 0x7f;
|
||||
pdev->multifunction = !!(hdr & 0x80);
|
||||
pdev->hdr_type = hdr & PCI_HEADER_TYPE_MASK;
|
||||
pdev->multifunction = FIELD_GET(PCI_HEADER_TYPE_MFD, hdr);
|
||||
|
||||
pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class);
|
||||
pdev->class = class >> 8;
|
||||
|
@ -5687,7 +5687,7 @@ static void quirk_nvidia_hda(struct pci_dev *gpu)
|
|||
|
||||
/* The GPU becomes a multi-function device when the HDA is enabled */
|
||||
pci_read_config_byte(gpu, PCI_HEADER_TYPE, &hdr_type);
|
||||
gpu->multifunction = !!(hdr_type & 0x80);
|
||||
gpu->multifunction = FIELD_GET(PCI_HEADER_TYPE_MFD, hdr_type);
|
||||
}
|
||||
DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
|
||||
PCI_BASE_CLASS_DISPLAY, 16, quirk_nvidia_hda);
|
||||
|
|
|
@ -363,6 +363,37 @@ struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
|
|||
}
|
||||
EXPORT_SYMBOL(pci_get_class);
|
||||
|
||||
/**
|
||||
* pci_get_base_class - searching for a PCI device by matching against the base class code only
|
||||
* @class: search for a PCI device with this base class code
|
||||
* @from: Previous PCI device found in search, or %NULL for new search.
|
||||
*
|
||||
* Iterates through the list of known PCI devices. If a PCI device is found
|
||||
* with a matching base class code, the reference count to the device is
|
||||
* incremented. See pci_match_one_device() to figure out how does this works.
|
||||
* A new search is initiated by passing %NULL as the @from argument.
|
||||
* Otherwise if @from is not %NULL, searches continue from next device on the
|
||||
* global list. The reference count for @from is always decremented if it is
|
||||
* not %NULL.
|
||||
*
|
||||
* Returns:
|
||||
* A pointer to a matched PCI device, %NULL Otherwise.
|
||||
*/
|
||||
struct pci_dev *pci_get_base_class(unsigned int class, struct pci_dev *from)
|
||||
{
|
||||
struct pci_device_id id = {
|
||||
.vendor = PCI_ANY_ID,
|
||||
.device = PCI_ANY_ID,
|
||||
.subvendor = PCI_ANY_ID,
|
||||
.subdevice = PCI_ANY_ID,
|
||||
.class_mask = 0xFF0000,
|
||||
.class = class << 16,
|
||||
};
|
||||
|
||||
return pci_get_dev_by_id(&id, from);
|
||||
}
|
||||
EXPORT_SYMBOL(pci_get_base_class);
|
||||
|
||||
/**
|
||||
* pci_dev_present - Returns 1 if device matching the device list is present, 0 if not.
|
||||
* @ids: A pointer to a null terminated list of struct pci_device_id structures
|
||||
|
|
|
@ -1181,6 +1181,8 @@ struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
|
|||
struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus,
|
||||
unsigned int devfn);
|
||||
struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
|
||||
struct pci_dev *pci_get_base_class(unsigned int class, struct pci_dev *from);
|
||||
|
||||
int pci_dev_present(const struct pci_device_id *ids);
|
||||
|
||||
int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
|
||||
|
@ -1924,6 +1926,9 @@ static inline struct pci_dev *pci_get_class(unsigned int class,
|
|||
struct pci_dev *from)
|
||||
{ return NULL; }
|
||||
|
||||
static inline struct pci_dev *pci_get_base_class(unsigned int class,
|
||||
struct pci_dev *from)
|
||||
{ return NULL; }
|
||||
|
||||
static inline int pci_dev_present(const struct pci_device_id *ids)
|
||||
{ return 0; }
|
||||
|
|
|
@ -80,6 +80,7 @@
|
|||
#define PCI_HEADER_TYPE_NORMAL 0
|
||||
#define PCI_HEADER_TYPE_BRIDGE 1
|
||||
#define PCI_HEADER_TYPE_CARDBUS 2
|
||||
#define PCI_HEADER_TYPE_MFD 0x80 /* Multi-Function Device (possible) */
|
||||
|
||||
#define PCI_BIST 0x0f /* 8 bits */
|
||||
#define PCI_BIST_CODE_MASK 0x0f /* Return result */
|
||||
|
|
|
@ -1417,17 +1417,11 @@ static bool atpx_present(void)
|
|||
acpi_handle dhandle, atpx_handle;
|
||||
acpi_status status;
|
||||
|
||||
while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
|
||||
dhandle = ACPI_HANDLE(&pdev->dev);
|
||||
if (dhandle) {
|
||||
status = acpi_get_handle(dhandle, "ATPX", &atpx_handle);
|
||||
if (ACPI_SUCCESS(status)) {
|
||||
pci_dev_put(pdev);
|
||||
return true;
|
||||
}
|
||||
}
|
||||
}
|
||||
while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) {
|
||||
while ((pdev = pci_get_base_class(PCI_BASE_CLASS_DISPLAY, pdev))) {
|
||||
if ((pdev->class != PCI_CLASS_DISPLAY_VGA << 8) &&
|
||||
(pdev->class != PCI_CLASS_DISPLAY_OTHER << 8))
|
||||
continue;
|
||||
|
||||
dhandle = ACPI_HANDLE(&pdev->dev);
|
||||
if (dhandle) {
|
||||
status = acpi_get_handle(dhandle, "ATPX", &atpx_handle);
|
||||
|
|
Loading…
Reference in a new issue