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platform/x86: intel_mid_powerbtn: Acknowledge interrupts
Some platforms require interrupt to be acknowledged by clearing MSIC_PWRBTNM bit in interrupt level 1 mask register. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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@ -94,6 +94,7 @@ static irqreturn_t mid_pb_isr(int irq, void *dev_id)
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input_sync(input);
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}
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ddata->ack(ddata);
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return IRQ_HANDLED;
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}
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