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ARM: dts: berlin: convert BG2CD to DT clock nodes

Browse source 
This converts Berlin BG2CD SoC dtsi to make use of the new DT clock
nodes for Berlin SoCs. Also add a binding include to ease core clock
references.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This commit is contained in:
Sebastian Hesselbarth 2014-05-10 15:22:48 +02:00
parent d8c64c21b4
commit 556f4a33a9
1 changed files with 24 additions and 29 deletions
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53
arch/arm/boot/dts/berlin2cd.dtsi
View file

@ -12,6 +12,7 @@
*/
#include "skeleton.dtsi"
#include <dt-bindings/clock/berlin2.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
@ -30,24 +31,10 @@ cpu@0 {
};
};
clocks {
smclk: sysmgr-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
cfgclk: cfg-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <75000000>;
};
sysclk: system-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <300000000>;
};
refclk: oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
soc {
@ -76,7 +63,7 @@ local-timer@ad0600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0xad0600 0x20>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sysclk>;
clocks = <&chip CLKID_TWD>;
};
apb@e80000 {
@ -163,7 +150,7 @@ timer0: timer@2c00 {
compatible = "snps,dw-apb-timer";
reg = <0x2c00 0x14>;
interrupts = <8>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "okay";
};
@ -172,7 +159,7 @@ timer1: timer@2c14 {
compatible = "snps,dw-apb-timer";
reg = <0x2c14 0x14>;
interrupts = <9>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "okay";
};
@ -181,7 +168,7 @@ timer2: timer@2c28 {
compatible = "snps,dw-apb-timer";
reg = <0x2c28 0x14>;
interrupts = <10>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@ -190,7 +177,7 @@ timer3: timer@2c3c {
compatible = "snps,dw-apb-timer";
reg = <0x2c3c 0x14>;
interrupts = <11>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@ -199,7 +186,7 @@ timer4: timer@2c50 {
compatible = "snps,dw-apb-timer";
reg = <0x2c50 0x14>;
interrupts = <12>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@ -208,7 +195,7 @@ timer5: timer@2c64 {
compatible = "snps,dw-apb-timer";
reg = <0x2c64 0x14>;
interrupts = <13>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@ -217,7 +204,7 @@ timer6: timer@2c78 {
compatible = "snps,dw-apb-timer";
reg = <0x2c78 0x14>;
interrupts = <14>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@ -226,7 +213,7 @@ timer7: timer@2c8c {
compatible = "snps,dw-apb-timer";
reg = <0x2c8c 0x14>;
interrupts = <15>;
clocks = <&cfgclk>;
clocks = <&chip CLKID_CFG>;
clock-names = "timer";
status = "disabled";
};
@ -241,6 +228,14 @@ aic: interrupt-controller@3000 {
};
};
chip: chip-control@ea0000 {
compatible = "marvell,berlin2cd-chip-ctrl";
#clock-cells = <1>;
reg = <0xea0000 0x400>;
clocks = <&refclk>;
clock-names = "refclk";
};
apb@fc0000 {
compatible = "simple-bus";
#address-cells = <1>;
@ -285,7 +280,7 @@ uart0: serial@9000 {
reg-shift = <2>;
reg-io-width = <1>;
interrupts = <8>;
clocks = <&smclk>;
clocks = <&refclk>;
status = "disabled";
};
@ -295,7 +290,7 @@ uart1: serial@a000 {
reg-shift = <2>;
reg-io-width = <1>;
interrupts = <9>;
clocks = <&smclk>;
clocks = <&refclk>;
status = "disabled";
};