mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-26 02:39:48 +00:00
KVM/ARM Fixes for v4.12-rc2.
Includes: - A fix for a build failure introduced in -rc1 when tracepoints are enabled on 32-bit ARM. - Disabling use of stack pointer protection in the hyp code which can cause panics. - A handful of VGIC fixes. - A fix to the init of the redistributors on GICv3 systems that prevented boot with kvmtool on GICv3 systems introduced in -rc1. - A number of race conditions fixed in our MMU handling code. - A fix for the guest being able to program the debug extensions for the host on the 32-bit side. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJZHWzeAAoJEEtpOizt6ddyFO0H/jpgdDvmu8mL+sk4xdjCxsqE sl0uH8vnlziTmIFtRlXKtB1ecL+waj22YEoVLIA3lXz92uZXF3RDoFqVW3NGnpbO pFyUs8ZHfhyo3nHI7DZqT+/SeButwwX+cw02tRpaEOPhlun7BlEZEco26r2y/2xR WZdTDYYkAjTtNtY1dJ7xzNrhSJZXpf54rvQshYSbqn+gVdGVHaosQygMPohU8tOF V0AX3gQ3pnR3hEgE3Cz+F3TGhORg9buOADS28CdvDCx6ekJdy55Snf6AHFoZ9cdT n4YZpon2HO1ZIxpMLvg1Ud+M3bQxeYLBWj2av3PAHsMFoR23x4xTH6YVA53sfFY= =SJeq -----END PGP SIGNATURE----- Merge tag 'kvm-arm-for-v4.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm KVM/ARM Fixes for v4.12-rc2. Includes: - A fix for a build failure introduced in -rc1 when tracepoints are enabled on 32-bit ARM. - Disabling use of stack pointer protection in the hyp code which can cause panics. - A handful of VGIC fixes. - A fix to the init of the redistributors on GICv3 systems that prevented boot with kvmtool on GICv3 systems introduced in -rc1. - A number of race conditions fixed in our MMU handling code. - A fix for the guest being able to program the debug extensions for the host on the 32-bit side.
This commit is contained in:
commit
55c315ee09
14 changed files with 150 additions and 66 deletions
|
@ -31,7 +31,8 @@ void kvm_register_target_coproc_table(struct kvm_coproc_target_table *table);
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int kvm_handle_cp10_id(struct kvm_vcpu *vcpu, struct kvm_run *run);
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int kvm_handle_cp_0_13_access(struct kvm_vcpu *vcpu, struct kvm_run *run);
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int kvm_handle_cp14_load_store(struct kvm_vcpu *vcpu, struct kvm_run *run);
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int kvm_handle_cp14_access(struct kvm_vcpu *vcpu, struct kvm_run *run);
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int kvm_handle_cp14_32(struct kvm_vcpu *vcpu, struct kvm_run *run);
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int kvm_handle_cp14_64(struct kvm_vcpu *vcpu, struct kvm_run *run);
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int kvm_handle_cp15_32(struct kvm_vcpu *vcpu, struct kvm_run *run);
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int kvm_handle_cp15_64(struct kvm_vcpu *vcpu, struct kvm_run *run);
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@ -32,6 +32,7 @@
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#include <asm/vfp.h>
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#include "../vfp/vfpinstr.h"
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#define CREATE_TRACE_POINTS
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#include "trace.h"
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#include "coproc.h"
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@ -111,12 +112,6 @@ int kvm_handle_cp14_load_store(struct kvm_vcpu *vcpu, struct kvm_run *run)
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return 1;
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}
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int kvm_handle_cp14_access(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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kvm_inject_undefined(vcpu);
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return 1;
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}
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static void reset_mpidr(struct kvm_vcpu *vcpu, const struct coproc_reg *r)
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{
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/*
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@ -284,7 +279,7 @@ static bool access_gic_sre(struct kvm_vcpu *vcpu,
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* must always support PMCCNTR (the cycle counter): we just RAZ/WI for
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* all PM registers, which doesn't crash the guest kernel at least.
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*/
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static bool pm_fake(struct kvm_vcpu *vcpu,
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static bool trap_raz_wi(struct kvm_vcpu *vcpu,
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const struct coproc_params *p,
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const struct coproc_reg *r)
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{
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@ -294,19 +289,19 @@ static bool pm_fake(struct kvm_vcpu *vcpu,
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return read_zero(vcpu, p);
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}
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#define access_pmcr pm_fake
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#define access_pmcntenset pm_fake
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#define access_pmcntenclr pm_fake
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#define access_pmovsr pm_fake
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#define access_pmselr pm_fake
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#define access_pmceid0 pm_fake
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#define access_pmceid1 pm_fake
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#define access_pmccntr pm_fake
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#define access_pmxevtyper pm_fake
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#define access_pmxevcntr pm_fake
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#define access_pmuserenr pm_fake
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#define access_pmintenset pm_fake
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#define access_pmintenclr pm_fake
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#define access_pmcr trap_raz_wi
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#define access_pmcntenset trap_raz_wi
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#define access_pmcntenclr trap_raz_wi
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#define access_pmovsr trap_raz_wi
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#define access_pmselr trap_raz_wi
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#define access_pmceid0 trap_raz_wi
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#define access_pmceid1 trap_raz_wi
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#define access_pmccntr trap_raz_wi
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#define access_pmxevtyper trap_raz_wi
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#define access_pmxevcntr trap_raz_wi
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#define access_pmuserenr trap_raz_wi
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#define access_pmintenset trap_raz_wi
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#define access_pmintenclr trap_raz_wi
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/* Architected CP15 registers.
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* CRn denotes the primary register number, but is copied to the CRm in the
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@ -532,12 +527,7 @@ static int emulate_cp15(struct kvm_vcpu *vcpu,
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return 1;
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}
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/**
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* kvm_handle_cp15_64 -- handles a mrrc/mcrr trap on a guest CP15 access
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* @vcpu: The VCPU pointer
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* @run: The kvm_run struct
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*/
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int kvm_handle_cp15_64(struct kvm_vcpu *vcpu, struct kvm_run *run)
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static struct coproc_params decode_64bit_hsr(struct kvm_vcpu *vcpu)
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{
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struct coproc_params params;
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@ -551,9 +541,38 @@ int kvm_handle_cp15_64(struct kvm_vcpu *vcpu, struct kvm_run *run)
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params.Rt2 = (kvm_vcpu_get_hsr(vcpu) >> 10) & 0xf;
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params.CRm = 0;
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return params;
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}
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/**
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* kvm_handle_cp15_64 -- handles a mrrc/mcrr trap on a guest CP15 access
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* @vcpu: The VCPU pointer
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* @run: The kvm_run struct
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*/
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int kvm_handle_cp15_64(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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struct coproc_params params = decode_64bit_hsr(vcpu);
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return emulate_cp15(vcpu, ¶ms);
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}
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/**
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* kvm_handle_cp14_64 -- handles a mrrc/mcrr trap on a guest CP14 access
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* @vcpu: The VCPU pointer
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* @run: The kvm_run struct
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*/
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int kvm_handle_cp14_64(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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struct coproc_params params = decode_64bit_hsr(vcpu);
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/* raz_wi cp14 */
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trap_raz_wi(vcpu, ¶ms, NULL);
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/* handled */
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kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
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return 1;
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}
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static void reset_coproc_regs(struct kvm_vcpu *vcpu,
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const struct coproc_reg *table, size_t num)
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{
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@ -564,12 +583,7 @@ static void reset_coproc_regs(struct kvm_vcpu *vcpu,
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table[i].reset(vcpu, &table[i]);
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}
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/**
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* kvm_handle_cp15_32 -- handles a mrc/mcr trap on a guest CP15 access
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* @vcpu: The VCPU pointer
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* @run: The kvm_run struct
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*/
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int kvm_handle_cp15_32(struct kvm_vcpu *vcpu, struct kvm_run *run)
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static struct coproc_params decode_32bit_hsr(struct kvm_vcpu *vcpu)
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{
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struct coproc_params params;
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@ -583,9 +597,37 @@ int kvm_handle_cp15_32(struct kvm_vcpu *vcpu, struct kvm_run *run)
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params.Op2 = (kvm_vcpu_get_hsr(vcpu) >> 17) & 0x7;
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params.Rt2 = 0;
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return params;
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}
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/**
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* kvm_handle_cp15_32 -- handles a mrc/mcr trap on a guest CP15 access
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* @vcpu: The VCPU pointer
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* @run: The kvm_run struct
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*/
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int kvm_handle_cp15_32(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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struct coproc_params params = decode_32bit_hsr(vcpu);
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return emulate_cp15(vcpu, ¶ms);
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}
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/**
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* kvm_handle_cp14_32 -- handles a mrc/mcr trap on a guest CP14 access
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* @vcpu: The VCPU pointer
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* @run: The kvm_run struct
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*/
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int kvm_handle_cp14_32(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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struct coproc_params params = decode_32bit_hsr(vcpu);
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/* raz_wi cp14 */
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trap_raz_wi(vcpu, ¶ms, NULL);
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/* handled */
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kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
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return 1;
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}
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/******************************************************************************
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* Userspace API
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*****************************************************************************/
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@ -95,9 +95,9 @@ static exit_handle_fn arm_exit_handlers[] = {
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[HSR_EC_WFI] = kvm_handle_wfx,
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[HSR_EC_CP15_32] = kvm_handle_cp15_32,
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[HSR_EC_CP15_64] = kvm_handle_cp15_64,
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[HSR_EC_CP14_MR] = kvm_handle_cp14_access,
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[HSR_EC_CP14_MR] = kvm_handle_cp14_32,
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[HSR_EC_CP14_LS] = kvm_handle_cp14_load_store,
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[HSR_EC_CP14_64] = kvm_handle_cp14_access,
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[HSR_EC_CP14_64] = kvm_handle_cp14_64,
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[HSR_EC_CP_0_13] = kvm_handle_cp_0_13_access,
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[HSR_EC_CP10_ID] = kvm_handle_cp10_id,
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[HSR_EC_HVC] = handle_hvc,
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@ -2,6 +2,8 @@
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# Makefile for Kernel-based Virtual Machine module, HYP part
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#
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ccflags-y += -fno-stack-protector
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KVM=../../../../virt/kvm
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obj-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/hyp/vgic-v2-sr.o
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@ -48,7 +48,9 @@ static void __hyp_text __activate_traps(struct kvm_vcpu *vcpu, u32 *fpexc_host)
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write_sysreg(HSTR_T(15), HSTR);
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write_sysreg(HCPTR_TTA | HCPTR_TCP(10) | HCPTR_TCP(11), HCPTR);
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val = read_sysreg(HDCR);
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write_sysreg(val | HDCR_TPM | HDCR_TPMCR, HDCR);
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val |= HDCR_TPM | HDCR_TPMCR; /* trap performance monitors */
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val |= HDCR_TDRA | HDCR_TDOSA | HDCR_TDA; /* trap debug regs */
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write_sysreg(val, HDCR);
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}
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static void __hyp_text __deactivate_traps(struct kvm_vcpu *vcpu)
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@ -1,5 +1,5 @@
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#if !defined(_TRACE_KVM_H) || defined(TRACE_HEADER_MULTI_READ)
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#define _TRACE_KVM_H
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#if !defined(_TRACE_ARM_KVM_H) || defined(TRACE_HEADER_MULTI_READ)
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#define _TRACE_ARM_KVM_H
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#include <linux/tracepoint.h>
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@ -74,10 +74,10 @@ TRACE_EVENT(kvm_hvc,
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__entry->vcpu_pc, __entry->r0, __entry->imm)
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);
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#endif /* _TRACE_KVM_H */
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#endif /* _TRACE_ARM_KVM_H */
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#undef TRACE_INCLUDE_PATH
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#define TRACE_INCLUDE_PATH arch/arm/kvm
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#define TRACE_INCLUDE_PATH .
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#undef TRACE_INCLUDE_FILE
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#define TRACE_INCLUDE_FILE trace
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@ -2,6 +2,8 @@
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# Makefile for Kernel-based Virtual Machine module, HYP part
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#
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ccflags-y += -fno-stack-protector
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KVM=../../../../virt/kvm
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obj-$(CONFIG_KVM_ARM_HOST) += $(KVM)/arm/hyp/vgic-v2-sr.o
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@ -195,7 +195,10 @@ struct vgic_dist {
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/* either a GICv2 CPU interface */
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gpa_t vgic_cpu_base;
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/* or a number of GICv3 redistributor regions */
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gpa_t vgic_redist_base;
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struct {
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gpa_t vgic_redist_base;
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gpa_t vgic_redist_free_offset;
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};
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};
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/* distributor enabled */
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@ -22,7 +22,7 @@
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#include <asm/kvm_hyp.h>
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#define vtr_to_max_lr_idx(v) ((v) & 0xf)
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#define vtr_to_nr_pri_bits(v) (((u32)(v) >> 29) + 1)
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#define vtr_to_nr_pre_bits(v) (((u32)(v) >> 26) + 1)
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static u64 __hyp_text __gic_v3_get_lr(unsigned int lr)
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{
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@ -135,13 +135,13 @@ void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu)
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if (used_lrs) {
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int i;
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u32 nr_pri_bits;
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u32 nr_pre_bits;
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cpu_if->vgic_elrsr = read_gicreg(ICH_ELSR_EL2);
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write_gicreg(0, ICH_HCR_EL2);
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val = read_gicreg(ICH_VTR_EL2);
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nr_pri_bits = vtr_to_nr_pri_bits(val);
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nr_pre_bits = vtr_to_nr_pre_bits(val);
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for (i = 0; i < used_lrs; i++) {
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if (cpu_if->vgic_elrsr & (1 << i))
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@ -152,7 +152,7 @@ void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu)
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__gic_v3_set_lr(0, i);
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}
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switch (nr_pri_bits) {
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switch (nr_pre_bits) {
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case 7:
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cpu_if->vgic_ap0r[3] = read_gicreg(ICH_AP0R3_EL2);
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cpu_if->vgic_ap0r[2] = read_gicreg(ICH_AP0R2_EL2);
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@ -162,7 +162,7 @@ void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu)
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cpu_if->vgic_ap0r[0] = read_gicreg(ICH_AP0R0_EL2);
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}
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switch (nr_pri_bits) {
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switch (nr_pre_bits) {
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case 7:
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cpu_if->vgic_ap1r[3] = read_gicreg(ICH_AP1R3_EL2);
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cpu_if->vgic_ap1r[2] = read_gicreg(ICH_AP1R2_EL2);
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@ -198,7 +198,7 @@ void __hyp_text __vgic_v3_restore_state(struct kvm_vcpu *vcpu)
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struct vgic_v3_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v3;
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u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;
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u64 val;
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u32 nr_pri_bits;
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u32 nr_pre_bits;
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int i;
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/*
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@ -217,12 +217,12 @@ void __hyp_text __vgic_v3_restore_state(struct kvm_vcpu *vcpu)
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}
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val = read_gicreg(ICH_VTR_EL2);
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nr_pri_bits = vtr_to_nr_pri_bits(val);
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nr_pre_bits = vtr_to_nr_pre_bits(val);
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if (used_lrs) {
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write_gicreg(cpu_if->vgic_hcr, ICH_HCR_EL2);
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switch (nr_pri_bits) {
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switch (nr_pre_bits) {
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case 7:
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write_gicreg(cpu_if->vgic_ap0r[3], ICH_AP0R3_EL2);
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write_gicreg(cpu_if->vgic_ap0r[2], ICH_AP0R2_EL2);
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|
@ -232,7 +232,7 @@ void __hyp_text __vgic_v3_restore_state(struct kvm_vcpu *vcpu)
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write_gicreg(cpu_if->vgic_ap0r[0], ICH_AP0R0_EL2);
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}
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switch (nr_pri_bits) {
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switch (nr_pre_bits) {
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case 7:
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write_gicreg(cpu_if->vgic_ap1r[3], ICH_AP1R3_EL2);
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write_gicreg(cpu_if->vgic_ap1r[2], ICH_AP1R2_EL2);
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|
|
|
@ -295,6 +295,13 @@ static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size)
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assert_spin_locked(&kvm->mmu_lock);
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pgd = kvm->arch.pgd + stage2_pgd_index(addr);
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do {
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/*
|
||||
* Make sure the page table is still active, as another thread
|
||||
* could have possibly freed the page table, while we released
|
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* the lock.
|
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*/
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if (!READ_ONCE(kvm->arch.pgd))
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break;
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next = stage2_pgd_addr_end(addr, end);
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if (!stage2_pgd_none(*pgd))
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unmap_stage2_puds(kvm, pgd, addr, next);
|
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|
@ -829,22 +836,22 @@ void stage2_unmap_vm(struct kvm *kvm)
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* Walks the level-1 page table pointed to by kvm->arch.pgd and frees all
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* underlying level-2 and level-3 tables before freeing the actual level-1 table
|
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* and setting the struct pointer to NULL.
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||||
*
|
||||
* Note we don't need locking here as this is only called when the VM is
|
||||
* destroyed, which can only be done once.
|
||||
*/
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||||
void kvm_free_stage2_pgd(struct kvm *kvm)
|
||||
{
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||||
if (kvm->arch.pgd == NULL)
|
||||
return;
|
||||
void *pgd = NULL;
|
||||
|
||||
spin_lock(&kvm->mmu_lock);
|
||||
unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE);
|
||||
if (kvm->arch.pgd) {
|
||||
unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE);
|
||||
pgd = READ_ONCE(kvm->arch.pgd);
|
||||
kvm->arch.pgd = NULL;
|
||||
}
|
||||
spin_unlock(&kvm->mmu_lock);
|
||||
|
||||
/* Free the HW pgd, one page at a time */
|
||||
free_pages_exact(kvm->arch.pgd, S2_PGD_SIZE);
|
||||
kvm->arch.pgd = NULL;
|
||||
if (pgd)
|
||||
free_pages_exact(pgd, S2_PGD_SIZE);
|
||||
}
|
||||
|
||||
static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
|
||||
|
@ -1170,11 +1177,13 @@ static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end)
|
|||
* large. Otherwise, we may see kernel panics with
|
||||
* CONFIG_DETECT_HUNG_TASK, CONFIG_LOCKUP_DETECTOR,
|
||||
* CONFIG_LOCKDEP. Additionally, holding the lock too long
|
||||
* will also starve other vCPUs.
|
||||
* will also starve other vCPUs. We have to also make sure
|
||||
* that the page tables are not freed while we released
|
||||
* the lock.
|
||||
*/
|
||||
if (need_resched() || spin_needbreak(&kvm->mmu_lock))
|
||||
cond_resched_lock(&kvm->mmu_lock);
|
||||
|
||||
cond_resched_lock(&kvm->mmu_lock);
|
||||
if (!READ_ONCE(kvm->arch.pgd))
|
||||
break;
|
||||
next = stage2_pgd_addr_end(addr, end);
|
||||
if (stage2_pgd_present(*pgd))
|
||||
stage2_wp_puds(pgd, addr, next);
|
||||
|
|
|
@ -242,8 +242,11 @@ int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu)
|
|||
* If we are creating a VCPU with a GICv3 we must also register the
|
||||
* KVM io device for the redistributor that belongs to this VCPU.
|
||||
*/
|
||||
if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3)
|
||||
if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {
|
||||
mutex_lock(&vcpu->kvm->lock);
|
||||
ret = vgic_register_redist_iodev(vcpu);
|
||||
mutex_unlock(&vcpu->kvm->lock);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
@ -586,7 +586,7 @@ int vgic_register_redist_iodev(struct kvm_vcpu *vcpu)
|
|||
if (!vgic_v3_check_base(kvm))
|
||||
return -EINVAL;
|
||||
|
||||
rd_base = vgic->vgic_redist_base + kvm_vcpu_get_idx(vcpu) * SZ_64K * 2;
|
||||
rd_base = vgic->vgic_redist_base + vgic->vgic_redist_free_offset;
|
||||
sgi_base = rd_base + SZ_64K;
|
||||
|
||||
kvm_iodevice_init(&rd_dev->dev, &kvm_io_gic_ops);
|
||||
|
@ -614,11 +614,15 @@ int vgic_register_redist_iodev(struct kvm_vcpu *vcpu)
|
|||
mutex_lock(&kvm->slots_lock);
|
||||
ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, sgi_base,
|
||||
SZ_64K, &sgi_dev->dev);
|
||||
mutex_unlock(&kvm->slots_lock);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS,
|
||||
&rd_dev->dev);
|
||||
goto out;
|
||||
}
|
||||
|
||||
vgic->vgic_redist_free_offset += 2 * SZ_64K;
|
||||
out:
|
||||
mutex_unlock(&kvm->slots_lock);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -644,10 +648,12 @@ static int vgic_register_all_redist_iodevs(struct kvm *kvm)
|
|||
|
||||
if (ret) {
|
||||
/* The current c failed, so we start with the previous one. */
|
||||
mutex_lock(&kvm->slots_lock);
|
||||
for (c--; c >= 0; c--) {
|
||||
vcpu = kvm_get_vcpu(kvm, c);
|
||||
vgic_unregister_redist_iodev(vcpu);
|
||||
}
|
||||
mutex_unlock(&kvm->slots_lock);
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
|
|
@ -149,6 +149,13 @@ void vgic_v2_populate_lr(struct kvm_vcpu *vcpu, struct vgic_irq *irq, int lr)
|
|||
if (irq->hw) {
|
||||
val |= GICH_LR_HW;
|
||||
val |= irq->hwintid << GICH_LR_PHYSID_CPUID_SHIFT;
|
||||
/*
|
||||
* Never set pending+active on a HW interrupt, as the
|
||||
* pending state is kept at the physical distributor
|
||||
* level.
|
||||
*/
|
||||
if (irq->active && irq_is_pending(irq))
|
||||
val &= ~GICH_LR_PENDING_BIT;
|
||||
} else {
|
||||
if (irq->config == VGIC_CONFIG_LEVEL)
|
||||
val |= GICH_LR_EOI;
|
||||
|
|
|
@ -127,6 +127,13 @@ void vgic_v3_populate_lr(struct kvm_vcpu *vcpu, struct vgic_irq *irq, int lr)
|
|||
if (irq->hw) {
|
||||
val |= ICH_LR_HW;
|
||||
val |= ((u64)irq->hwintid) << ICH_LR_PHYS_ID_SHIFT;
|
||||
/*
|
||||
* Never set pending+active on a HW interrupt, as the
|
||||
* pending state is kept at the physical distributor
|
||||
* level.
|
||||
*/
|
||||
if (irq->active && irq_is_pending(irq))
|
||||
val &= ~ICH_LR_PENDING_BIT;
|
||||
} else {
|
||||
if (irq->config == VGIC_CONFIG_LEVEL)
|
||||
val |= ICH_LR_EOI;
|
||||
|
|
Loading…
Reference in a new issue