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clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEO

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CLK_PLL_VIDEO needs to be referenced in HDMI DT entry as a possible
PHY clock parent.

Export it so it can be used later in DT.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This commit is contained in:
Jernej Skrabec 2018-03-01 22:34:30 +01:00 committed by Maxime Ripard
parent b1a1ad4b75
commit 55de0f31df
No known key found for this signature in database
GPG key ID: D2B4C094214DAF74
2 changed files with 5 additions and 1 deletions
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4
drivers/clk/sunxi-ng/ccu-sun8i-h3.h
View file

@ -26,7 +26,9 @@
#define CLK_PLL_AUDIO_2X 3
#define CLK_PLL_AUDIO_4X 4
#define CLK_PLL_AUDIO_8X 5
#define CLK_PLL_VIDEO 6
/* PLL_VIDEO is exported */
#define CLK_PLL_VE 7
#define CLK_PLL_DDR 8

2
include/dt-bindings/clock/sun8i-h3-ccu.h
View file

@ -43,6 +43,8 @@
#ifndef _DT_BINDINGS_CLK_SUN8I_H3_H_
#define _DT_BINDINGS_CLK_SUN8I_H3_H_
#define CLK_PLL_VIDEO 6
#define CLK_PLL_PERIPH0 9
#define CLK_CPUX 14