Merge remote-tracking branches 'regulator/topic/gpio', 'regulator/topic/lp873x', 'regulator/topic/max77620', 'regulator/topic/pwm' and 'regulator/topic/tps6507x' into regulator-next

This commit is contained in:
Mark Brown 2016-12-12 12:17:27 +00:00
8 changed files with 78 additions and 7 deletions

View file

@ -7,6 +7,9 @@ Required properties:
- #gpio-cells: Should be two. The first cell is the pin number and
the second cell is used to specify flags.
See ../gpio/gpio.txt for more information.
- xxx-in-supply: Phandle to parent supply node of each regulator
populated under regulators node. xxx can be
buck0, buck1, ldo0 or ldo1.
- regulators: List of child nodes that specify the regulator
initialization data.
Example:
@ -17,6 +20,11 @@ pmic: lp8733@60 {
gpio-controller;
#gpio-cells = <2>;
buck0-in-supply = <&vsys_3v3>;
buck1-in-supply = <&vsys_3v3>;
ldo0-in-supply = <&vsys_3v3>;
ldo1-in-supply = <&vsys_3v3>;
regulators {
lp8733_buck0: buck0 {
regulator-name = "lp8733-buck0";

View file

@ -106,6 +106,18 @@ Here supported time periods by device in microseconds are as follows:
MAX77620 supports 40, 80, 160, 320, 640, 1280, 2560 and 5120 microseconds.
MAX20024 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds.
-maxim,power-ok-control: configure map power ok bit
1: Enables POK(Power OK) to control nRST_IO and GPIO1
POK function.
0: Disables POK control.
if property missing, do not configure MPOK bit.
If POK mapping is enabled for GPIO1/nRST_IO then,
GPIO1/nRST_IO pins are HIGH only if all rails
that have POK control enabled are HIGH.
If any of the rails goes down(which are enabled for POK
control) then, GPIO1/nRST_IO goes LOW.
this property is valid for max20024 only.
For DT binding details of different sub modules like GPIO, pincontrol,
regulator, power, please refer respective device-tree binding document
under their respective sub-system directories.

View file

@ -59,7 +59,7 @@ Any property defined as part of the core regulator binding can also be used.
Continuous Voltage With Enable GPIO Example:
pwm_regulator {
compatible = "pwm-regulator;
compatible = "pwm-regulator";
pwms = <&pwm1 0 8448 0>;
enable-gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
regulator-min-microvolt = <1016000>;
@ -76,7 +76,7 @@ Continuous Voltage With Enable GPIO Example:
Voltage Table Example:
pwm_regulator {
compatible = "pwm-regulator;
compatible = "pwm-regulator";
pwms = <&pwm1 0 8448 0>;
regulator-min-microvolt = <1016000>;
regulator-max-microvolt = <1114000>;

View file

@ -162,8 +162,8 @@ of_get_gpio_regulator_config(struct device *dev, struct device_node *np,
of_property_read_u32(np, "startup-delay-us", &config->startup_delay);
config->enable_gpio = of_get_named_gpio(np, "enable-gpio", 0);
if (config->enable_gpio == -EPROBE_DEFER)
return ERR_PTR(-EPROBE_DEFER);
if (config->enable_gpio < 0 && config->enable_gpio != -ENOENT)
return ERR_PTR(config->enable_gpio);
/* Fetch GPIOs. - optional property*/
ret = of_gpio_count(np);
@ -190,8 +190,11 @@ of_get_gpio_regulator_config(struct device *dev, struct device_node *np,
for (i = 0; i < config->nr_gpios; i++) {
gpio = of_get_named_gpio(np, "gpios", i);
if (gpio < 0)
if (gpio < 0) {
if (gpio != -ENOENT)
return ERR_PTR(gpio);
break;
}
config->gpios[i].gpio = gpio;
if (proplen > 0) {
of_property_read_u32_index(np, "gpios-states",

View file

@ -24,6 +24,7 @@
[_id] = { \
.desc = { \
.name = _name, \
.supply_name = _of "-in", \
.id = _id, \
.of_match = of_match_ptr(_of), \
.regulators_node = of_match_ptr("regulators"),\

View file

@ -73,7 +73,6 @@ struct max77620_regulator_info {
};
struct max77620_regulator_pdata {
struct regulator_init_data *reg_idata;
int active_fps_src;
int active_fps_pd_slot;
int active_fps_pu_slot;
@ -81,6 +80,7 @@ struct max77620_regulator_pdata {
int suspend_fps_pd_slot;
int suspend_fps_pu_slot;
int current_mode;
int power_ok;
int ramp_rate_setting;
};
@ -351,11 +351,48 @@ static int max77620_set_slew_rate(struct max77620_regulator *pmic, int id,
return 0;
}
static int max77620_config_power_ok(struct max77620_regulator *pmic, int id)
{
struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
struct max77620_regulator_info *rinfo = pmic->rinfo[id];
struct max77620_chip *chip = dev_get_drvdata(pmic->dev->parent);
u8 val, mask;
int ret;
switch (chip->chip_id) {
case MAX20024:
if (rpdata->power_ok >= 0) {
if (rinfo->type == MAX77620_REGULATOR_TYPE_SD)
mask = MAX20024_SD_CFG1_MPOK_MASK;
else
mask = MAX20024_LDO_CFG2_MPOK_MASK;
val = rpdata->power_ok ? mask : 0;
ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr,
mask, val);
if (ret < 0) {
dev_err(pmic->dev, "Reg 0x%02x update failed %d\n",
rinfo->cfg_addr, ret);
return ret;
}
}
break;
default:
break;
}
return 0;
}
static int max77620_init_pmic(struct max77620_regulator *pmic, int id)
{
struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
int ret;
max77620_config_power_ok(pmic, id);
/* Update power mode */
ret = max77620_regulator_get_power_mode(pmic, id);
if (ret < 0)
@ -595,6 +632,12 @@ static int max77620_of_parse_cb(struct device_node *np,
np, "maxim,suspend-fps-power-down-slot", &pval);
rpdata->suspend_fps_pd_slot = (!ret) ? pval : -1;
ret = of_property_read_u32(np, "maxim,power-ok-control", &pval);
if (!ret)
rpdata->power_ok = pval;
else
rpdata->power_ok = -1;
ret = of_property_read_u32(np, "maxim,ramp-rate-setting", &pval);
rpdata->ramp_rate_setting = (!ret) ? pval : 0;
@ -807,6 +850,8 @@ static int max77620_regulator_resume(struct device *dev)
for (id = 0; id < MAX77620_NUM_REGS; id++) {
reg_pdata = &pmic->reg_pdata[id];
max77620_config_power_ok(pmic, id);
max77620_regulator_set_fps_slots(pmic, id, false);
if (reg_pdata->active_fps_src < 0)
continue;

View file

@ -375,7 +375,7 @@ static struct tps6507x_board *tps6507x_parse_dt_reg_data(
struct device_node *np = pdev->dev.parent->of_node;
struct device_node *regulators;
struct of_regulator_match *matches;
static struct regulator_init_data *reg_data;
struct regulator_init_data *reg_data;
int idx = 0, count, ret;
tps_board = devm_kzalloc(&pdev->dev, sizeof(*tps_board),

View file

@ -180,6 +180,7 @@
#define MAX77620_SD_CFG1_FPWM_SD_MASK BIT(2)
#define MAX77620_SD_CFG1_FPWM_SD_SKIP 0
#define MAX77620_SD_CFG1_FPWM_SD_FPWM BIT(2)
#define MAX20024_SD_CFG1_MPOK_MASK BIT(1)
#define MAX77620_SD_CFG1_FSRADE_SD_MASK BIT(0)
#define MAX77620_SD_CFG1_FSRADE_SD_DISABLE 0
#define MAX77620_SD_CFG1_FSRADE_SD_ENABLE BIT(0)
@ -187,6 +188,7 @@
/* LDO_CNFG2 */
#define MAX77620_LDO_POWER_MODE_MASK 0xC0
#define MAX77620_LDO_POWER_MODE_SHIFT 6
#define MAX20024_LDO_CFG2_MPOK_MASK BIT(2)
#define MAX77620_LDO_CFG2_ADE_MASK BIT(1)
#define MAX77620_LDO_CFG2_ADE_DISABLE 0
#define MAX77620_LDO_CFG2_ADE_ENABLE BIT(1)