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[ARM] Fix Integrator and Versatile interrupt initialisation
Both Integrator and Versatile were using set_irq_handler() and enable_irq(), and working around the initialisation of the chained interrupt, instead of the more correct set_irq_chained_handler() function. Fix Integrator and Versatile to use the right function, and remove these work-arounds. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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parent
e2f04e1894
commit
56f1319e87
2 changed files with 3 additions and 7 deletions
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@ -232,8 +232,6 @@ static void __init intcp_init_irq(void)
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for (i = IRQ_PIC_START; i <= IRQ_PIC_END; i++) {
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if (i == 11)
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i = 22;
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if (i == IRQ_CP_CPPLDINT)
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i++;
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if (i == 29)
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break;
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set_irq_chip(i, &pic_chip);
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@ -259,8 +257,7 @@ static void __init intcp_init_irq(void)
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set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
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}
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set_irq_handler(IRQ_CP_CPPLDINT, sic_handle_irq);
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pic_unmask_irq(IRQ_CP_CPPLDINT);
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set_irq_chained_handler(IRQ_CP_CPPLDINT, sic_handle_irq);
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}
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/*
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@ -112,10 +112,9 @@ void __init versatile_init_irq(void)
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{
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unsigned int i;
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vic_init(VA_VIC_BASE, IRQ_VIC_START, ~(1 << 31));
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vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0);
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set_irq_handler(IRQ_VICSOURCE31, sic_handle_irq);
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enable_irq(IRQ_VICSOURCE31);
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set_irq_chained_handler(IRQ_VICSOURCE31, sic_handle_irq);
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/* Do second interrupt controller */
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writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
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