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net: stmmac: fix incorrect bit set in gmac4 mdio addr register
Fixing the gmac4 mdio write access to use MII_GMAC4_WRITE only instead of OR together with MII_WRITE. Signed-off-by: Kweh, Hock Leong <hock.leong.kweh@intel.com> Acked-By: Joao Pinto <jpinto@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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1 changed files with 3 additions and 1 deletions
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@ -116,7 +116,7 @@ static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg,
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unsigned int mii_address = priv->hw->mii.addr;
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unsigned int mii_data = priv->hw->mii.data;
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u32 value = MII_WRITE | MII_BUSY;
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u32 value = MII_BUSY;
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value |= (phyaddr << priv->hw->mii.addr_shift)
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& priv->hw->mii.addr_mask;
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@ -126,6 +126,8 @@ static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg,
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& priv->hw->mii.clk_csr_mask;
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if (priv->plat->has_gmac4)
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value |= MII_GMAC4_WRITE;
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else
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value |= MII_WRITE;
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/* Wait until any existing MII operation is complete */
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if (stmmac_mdio_busy_wait(priv->ioaddr, mii_address))
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