mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-28 13:22:57 +00:00
Memory controller drivers for v6.5
1. Renesas RPC IF: correct the Strobe Timing Adjustment.
2. Broadcom DPFE: fix smatch warning for testing array offset after use.
3. Atmel SDRAMC: drop driver because it was just a wrapper over enabling
clock which is not handled by its clock controller.
4. Minor bindings cleanup.
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Merge tag 'memory-controller-drv-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers
Memory controller drivers for v6.5
1. Renesas RPC IF: correct the Strobe Timing Adjustment.
2. Broadcom DPFE: fix smatch warning for testing array offset after use.
3. Atmel SDRAMC: drop driver because it was just a wrapper over enabling
clock which is not handled by its clock controller.
4. Minor bindings cleanup.
* tag 'memory-controller-drv-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
dt-bindings: memory-controllers: drop unneeded quotes
memory: atmel-sdramc: remove the driver
memory: brcmstb_dpfe: fix testing array offset after use
memory: renesas-rpc-if: Fix PHYCNT.STRTIM setting
Link: https://lore.kernel.org/r/20230612175508.288775-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
57cf6633f3
8 changed files with 44 additions and 107 deletions
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@ -165,7 +165,7 @@ patternProperties:
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const: 0
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lpddr2:
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$ref: "ddr/jedec,lpddr2.yaml#"
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$ref: ddr/jedec,lpddr2.yaml#
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type: object
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patternProperties:
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@ -129,7 +129,7 @@ patternProperties:
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The child device node represents the device connected to the GPMC
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bus. The device can be a NAND chip, SRAM device, NOR device
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or an ASIC.
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$ref: "ti,gpmc-child.yaml"
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$ref: ti,gpmc-child.yaml
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required:
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@ -97,7 +97,6 @@ config SOC_AT91SAM9
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depends on ARCH_MULTI_V5
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select ATMEL_AIC_IRQ
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select ATMEL_PM if PM
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select ATMEL_SDRAMC
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select CPU_ARM926T
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select HAVE_AT91_SMD
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select HAVE_AT91_USB_CLK
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@ -131,7 +130,6 @@ config SOC_SAM9X60
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depends on ARCH_MULTI_V5
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select ATMEL_AIC5_IRQ
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select ATMEL_PM if PM
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select ATMEL_SDRAMC
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select CPU_ARM926T
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select HAVE_AT91_USB_CLK
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select HAVE_AT91_GENERATED_CLK
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@ -213,7 +211,6 @@ config SOC_SAMA5
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bool
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select ATMEL_AIC5_IRQ
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select ATMEL_PM if PM
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select ATMEL_SDRAMC
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select MEMORY
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select SOC_SAM_V7
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select SRAM if PM
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@ -234,7 +231,6 @@ config SOC_SAMA7
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bool
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select ARM_GIC
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select ATMEL_PM if PM
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select ATMEL_SDRAMC
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select MEMORY
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select SOC_SAM_V7
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select SRAM if PM
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@ -30,17 +30,6 @@ config ARM_PL172_MPMC
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If you have an embedded system with an AMBA bus and a PL172
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controller, say Y or M here.
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config ATMEL_SDRAMC
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bool "Atmel (Multi-port DDR-)SDRAM Controller"
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default y if ARCH_AT91
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depends on ARCH_AT91 || COMPILE_TEST
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depends on OF
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help
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This driver is for Atmel SDRAM Controller or Atmel Multi-port
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DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
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Starting with the at91sam9g45, this controller supports SDR, DDR and
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LP-DDR memories.
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config ATMEL_EBI
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bool "Atmel EBI driver"
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default y if ARCH_AT91
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@ -8,7 +8,6 @@ ifeq ($(CONFIG_DDR),y)
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obj-$(CONFIG_OF) += of_memory.o
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endif
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obj-$(CONFIG_ARM_PL172_MPMC) += pl172.o
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obj-$(CONFIG_ATMEL_SDRAMC) += atmel-sdramc.o
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obj-$(CONFIG_ATMEL_EBI) += atmel-ebi.o
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obj-$(CONFIG_BRCMSTB_DPFE) += brcmstb_dpfe.o
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obj-$(CONFIG_BRCMSTB_MEMC) += brcmstb_memc.o
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@ -1,74 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Atmel (Multi-port DDR-)SDRAM Controller driver
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*
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* Author: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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*
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* Copyright (C) 2014 Atmel
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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struct at91_ramc_caps {
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bool has_ddrck;
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bool has_mpddr_clk;
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};
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static const struct at91_ramc_caps at91rm9200_caps = { };
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static const struct at91_ramc_caps at91sam9g45_caps = {
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.has_ddrck = 1,
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.has_mpddr_clk = 0,
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};
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static const struct at91_ramc_caps sama5d3_caps = {
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.has_ddrck = 1,
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.has_mpddr_clk = 1,
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};
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static const struct of_device_id atmel_ramc_of_match[] = {
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{ .compatible = "atmel,at91rm9200-sdramc", .data = &at91rm9200_caps, },
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{ .compatible = "atmel,at91sam9260-sdramc", .data = &at91rm9200_caps, },
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{ .compatible = "atmel,at91sam9g45-ddramc", .data = &at91sam9g45_caps, },
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{ .compatible = "atmel,sama5d3-ddramc", .data = &sama5d3_caps, },
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{},
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};
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static int atmel_ramc_probe(struct platform_device *pdev)
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{
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const struct at91_ramc_caps *caps;
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struct clk *clk;
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caps = of_device_get_match_data(&pdev->dev);
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if (caps->has_ddrck) {
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clk = devm_clk_get_enabled(&pdev->dev, "ddrck");
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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}
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if (caps->has_mpddr_clk) {
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clk = devm_clk_get_enabled(&pdev->dev, "mpddr");
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if (IS_ERR(clk)) {
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pr_err("AT91 RAMC: couldn't get mpddr clock\n");
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return PTR_ERR(clk);
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}
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}
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return 0;
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}
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static struct platform_driver atmel_ramc_driver = {
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.probe = atmel_ramc_probe,
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.driver = {
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.name = "atmel-ramc",
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.of_match_table = atmel_ramc_of_match,
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},
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};
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builtin_platform_driver(atmel_ramc_driver);
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@ -434,15 +434,17 @@ static void __finalize_command(struct brcmstb_dpfe_priv *priv)
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static int __send_command(struct brcmstb_dpfe_priv *priv, unsigned int cmd,
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u32 result[])
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{
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const u32 *msg = priv->dpfe_api->command[cmd];
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void __iomem *regs = priv->regs;
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unsigned int i, chksum, chksum_idx;
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const u32 *msg;
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int ret = 0;
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u32 resp;
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if (cmd >= DPFE_CMD_MAX)
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return -1;
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msg = priv->dpfe_api->command[cmd];
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mutex_lock(&priv->lock);
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/* Wait for DCPU to become ready */
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@ -7,6 +7,7 @@
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* Copyright (C) 2019-2020 Cogent Embedded, Inc.
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*/
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#include <linux/bitops.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/module.h>
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@ -163,6 +164,11 @@ static const struct regmap_access_table rpcif_volatile_table = {
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.n_yes_ranges = ARRAY_SIZE(rpcif_volatile_ranges),
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};
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struct rpcif_info {
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enum rpcif_type type;
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u8 strtim;
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};
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struct rpcif_priv {
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struct device *dev;
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void __iomem *base;
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@ -171,7 +177,7 @@ struct rpcif_priv {
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struct reset_control *rstc;
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struct platform_device *vdev;
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size_t size;
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enum rpcif_type type;
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const struct rpcif_info *info;
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enum rpcif_data_dir dir;
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u8 bus_size;
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u8 xfer_size;
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@ -186,6 +192,26 @@ struct rpcif_priv {
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u32 ddr; /* DRDRENR or SMDRENR */
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};
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static const struct rpcif_info rpcif_info_r8a7796 = {
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.type = RPCIF_RCAR_GEN3,
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.strtim = 6,
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};
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static const struct rpcif_info rpcif_info_gen3 = {
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.type = RPCIF_RCAR_GEN3,
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.strtim = 7,
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};
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static const struct rpcif_info rpcif_info_rz_g2l = {
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.type = RPCIF_RZ_G2L,
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.strtim = 7,
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};
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static const struct rpcif_info rpcif_info_gen4 = {
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.type = RPCIF_RCAR_GEN4,
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.strtim = 15,
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};
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/*
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* Custom accessor functions to ensure SM[RW]DR[01] are always accessed with
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* proper width. Requires rpcif_priv.xfer_size to be correctly set before!
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@ -310,7 +336,7 @@ int rpcif_hw_init(struct device *dev, bool hyperflash)
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if (ret)
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return ret;
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if (rpc->type == RPCIF_RZ_G2L) {
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if (rpc->info->type == RPCIF_RZ_G2L) {
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ret = reset_control_reset(rpc->rstc);
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if (ret)
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return ret;
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@ -324,12 +350,10 @@ int rpcif_hw_init(struct device *dev, bool hyperflash)
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/* DMA Transfer is not supported */
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regmap_update_bits(rpc->regmap, RPCIF_PHYCNT, RPCIF_PHYCNT_HS, 0);
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if (rpc->type == RPCIF_RCAR_GEN3)
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regmap_update_bits(rpc->regmap, RPCIF_PHYCNT,
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RPCIF_PHYCNT_STRTIM(7), RPCIF_PHYCNT_STRTIM(7));
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else if (rpc->type == RPCIF_RCAR_GEN4)
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regmap_update_bits(rpc->regmap, RPCIF_PHYCNT,
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RPCIF_PHYCNT_STRTIM(15), RPCIF_PHYCNT_STRTIM(15));
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regmap_update_bits(rpc->regmap, RPCIF_PHYCNT,
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/* create mask with all affected bits set */
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RPCIF_PHYCNT_STRTIM(BIT(fls(rpc->info->strtim)) - 1),
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RPCIF_PHYCNT_STRTIM(rpc->info->strtim));
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regmap_update_bits(rpc->regmap, RPCIF_PHYOFFSET1, RPCIF_PHYOFFSET1_DDRTMG(3),
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RPCIF_PHYOFFSET1_DDRTMG(3));
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@ -340,7 +364,7 @@ int rpcif_hw_init(struct device *dev, bool hyperflash)
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regmap_update_bits(rpc->regmap, RPCIF_PHYINT,
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RPCIF_PHYINT_WPVAL, 0);
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if (rpc->type == RPCIF_RZ_G2L)
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if (rpc->info->type == RPCIF_RZ_G2L)
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regmap_update_bits(rpc->regmap, RPCIF_CMNCR,
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RPCIF_CMNCR_MOIIO(3) | RPCIF_CMNCR_IOFV(3) |
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RPCIF_CMNCR_BSZ(3),
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@ -729,9 +753,9 @@ static int rpcif_probe(struct platform_device *pdev)
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rpc->dirmap = devm_ioremap_resource(dev, res);
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if (IS_ERR(rpc->dirmap))
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return PTR_ERR(rpc->dirmap);
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rpc->size = resource_size(res);
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rpc->type = (uintptr_t)of_device_get_match_data(dev);
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rpc->size = resource_size(res);
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rpc->info = of_device_get_match_data(dev);
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rpc->rstc = devm_reset_control_get_exclusive(dev, NULL);
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if (IS_ERR(rpc->rstc))
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return PTR_ERR(rpc->rstc);
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@ -764,9 +788,10 @@ static int rpcif_remove(struct platform_device *pdev)
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}
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static const struct of_device_id rpcif_of_match[] = {
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{ .compatible = "renesas,rcar-gen3-rpc-if", .data = (void *)RPCIF_RCAR_GEN3 },
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{ .compatible = "renesas,rcar-gen4-rpc-if", .data = (void *)RPCIF_RCAR_GEN4 },
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{ .compatible = "renesas,rzg2l-rpc-if", .data = (void *)RPCIF_RZ_G2L },
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{ .compatible = "renesas,r8a7796-rpc-if", .data = &rpcif_info_r8a7796 },
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{ .compatible = "renesas,rcar-gen3-rpc-if", .data = &rpcif_info_gen3 },
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{ .compatible = "renesas,rcar-gen4-rpc-if", .data = &rpcif_info_gen4 },
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{ .compatible = "renesas,rzg2l-rpc-if", .data = &rpcif_info_rz_g2l },
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{},
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};
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MODULE_DEVICE_TABLE(of, rpcif_of_match);
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|
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Loading…
Reference in a new issue