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[PATCH] ide: clean up pdc202xx_old so its more readable (done so I could work on libata ports)
Also sets the new fifo flag so that we don't hang on some errors with this chipset. Signed-off-by: Alan Cox <alan@redhat.com> Cc: Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl> Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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f201f5046d
commit
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1 changed files with 5 additions and 110 deletions
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@ -101,31 +101,6 @@ static const char *pdc_quirk_drives[] = {
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#define MC1 0x02 /* DMA"C" timing */
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#define MC0 0x01 /* DMA"C" timing */
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#if 0
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unsigned long bibma = pci_resource_start(dev, 4);
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u8 hi = 0, lo = 0;
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u8 sc1c = inb_p((u16)bibma + 0x1c);
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u8 sc1e = inb_p((u16)bibma + 0x1e);
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u8 sc1f = inb_p((u16)bibma + 0x1f);
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p += sprintf(p, "Host Mode : %s\n",
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(sc1f & 0x08) ? "Tri-Stated" : "Normal");
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p += sprintf(p, "Bus Clocking : %s\n",
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((sc1f & 0xC0) == 0xC0) ? "100 External" :
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((sc1f & 0x80) == 0x80) ? "66 External" :
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((sc1f & 0x40) == 0x40) ? "33 External" : "33 PCI Internal");
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p += sprintf(p, "IO pad select : %s mA\n",
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((sc1c & 0x03) == 0x03) ? "10" :
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((sc1c & 0x02) == 0x02) ? "8" :
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((sc1c & 0x01) == 0x01) ? "6" :
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((sc1c & 0x00) == 0x00) ? "4" : "??");
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hi = sc1e >> 4;
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lo = sc1e & 0xf;
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p += sprintf(p, "Status Polling Period : %d\n", hi);
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p += sprintf(p, "Interrupt Check Status Polling Delay : %d\n", lo);
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#endif
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static u8 pdc202xx_ratemask (ide_drive_t *drive)
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{
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u8 mode;
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@ -505,42 +480,13 @@ static void pdc202xx_reset (ide_drive_t *drive)
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pdc202xx_reset_host(hwif);
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pdc202xx_reset_host(mate);
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#if 0
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/*
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* FIXME: Have to kick all the drives again :-/
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* What a pain in the ACE!
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*/
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if (hwif->present) {
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u16 hunit = 0;
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for (hunit = 0; hunit < MAX_DRIVES; ++hunit) {
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ide_drive_t *hdrive = &hwif->drives[hunit];
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if (hdrive->present) {
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if (hwif->ide_dma_check)
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hwif->ide_dma_check(hdrive);
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else
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hwif->tuneproc(hdrive, 5);
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}
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}
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}
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if (mate->present) {
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u16 munit = 0;
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for (munit = 0; munit < MAX_DRIVES; ++munit) {
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ide_drive_t *mdrive = &mate->drives[munit];
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if (mdrive->present) {
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if (mate->ide_dma_check)
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mate->ide_dma_check(mdrive);
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else
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mate->tuneproc(mdrive, 5);
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}
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}
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}
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#else
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hwif->tuneproc(drive, 5);
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#endif
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}
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static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, const char *name)
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static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev,
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const char *name)
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{
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/* This doesn't appear needed */
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if (dev->resource[PCI_ROM_RESOURCE].start) {
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pci_write_config_dword(dev, PCI_ROM_ADDRESS,
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dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
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@ -548,30 +494,6 @@ static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, const c
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name, dev->resource[PCI_ROM_RESOURCE].start);
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}
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/*
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* software reset - this is required because the bios
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* will set UDMA timing on if the hdd supports it. The
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* user may want to turn udma off. A bug in the pdc20262
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* is that it cannot handle a downgrade in timing from
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* UDMA to DMA. Disk accesses after issuing a set
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* feature command will result in errors. A software
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* reset leaves the timing registers intact,
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* but resets the drives.
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*/
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#if 0
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if ((dev->device == PCI_DEVICE_ID_PROMISE_20267) ||
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(dev->device == PCI_DEVICE_ID_PROMISE_20265) ||
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(dev->device == PCI_DEVICE_ID_PROMISE_20263) ||
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(dev->device == PCI_DEVICE_ID_PROMISE_20262)) {
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unsigned long high_16 = pci_resource_start(dev, 4);
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byte udma_speed_flag = inb(high_16 + 0x001f);
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outb(udma_speed_flag | 0x10, high_16 + 0x001f);
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mdelay(100);
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outb(udma_speed_flag & ~0x10, high_16 + 0x001f);
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mdelay(2000); /* 2 seconds ?! */
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}
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#endif
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return dev->irq;
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}
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@ -599,6 +521,8 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
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hwif->mwdma_mask = 0x07;
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hwif->swdma_mask = 0x07;
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hwif->err_stops_fifo = 1;
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hwif->ide_dma_check = &pdc202xx_config_drive_xfer_rate;
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hwif->ide_dma_lostirq = &pdc202xx_ide_dma_lostirq;
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hwif->ide_dma_timeout = &pdc202xx_ide_dma_timeout;
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@ -687,19 +611,6 @@ static int __devinit init_setup_pdc202ata4(struct pci_dev *dev,
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"mirror fixed.\n", d->name);
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}
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}
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#if 0
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if (dev->device == PCI_DEVICE_ID_PROMISE_20262)
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if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
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(tmp & e->mask) != e->val))
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if (d->enablebits[0].reg != d->enablebits[1].reg) {
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d->enablebits[0].reg = d->enablebits[1].reg;
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d->enablebits[0].mask = d->enablebits[1].mask;
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d->enablebits[0].val = d->enablebits[1].val;
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}
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#endif
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return ide_setup_pci_device(dev, d);
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}
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@ -714,22 +625,6 @@ static int __devinit init_setup_pdc20265(struct pci_dev *dev,
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"attached to I2O RAID controller.\n");
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return -ENODEV;
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}
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#if 0
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{
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u8 pri = 0, sec = 0;
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if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
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(tmp & e->mask) != e->val))
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if (d->enablebits[0].reg != d->enablebits[1].reg) {
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d->enablebits[0].reg = d->enablebits[1].reg;
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d->enablebits[0].mask = d->enablebits[1].mask;
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d->enablebits[0].val = d->enablebits[1].val;
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}
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}
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#endif
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return ide_setup_pci_device(dev, d);
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}
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