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vfio/pci: Intel IGD OpRegion support
This is the first consumer of vfio device specific resource support, providing read-only access to the OpRegion for Intel graphics devices. Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
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345d710491
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6 changed files with 136 additions and 0 deletions
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@ -26,3 +26,7 @@ config VFIO_PCI_MMAP
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config VFIO_PCI_INTX
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depends on VFIO_PCI
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def_bool y if !S390
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config VFIO_PCI_IGD
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depends on VFIO_PCI
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def_bool y if X86
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@ -1,4 +1,5 @@
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vfio-pci-y := vfio_pci.o vfio_pci_intrs.o vfio_pci_rdwr.o vfio_pci_config.o
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vfio-pci-$(CONFIG_VFIO_PCI_IGD) += vfio_pci_igd.o
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obj-$(CONFIG_VFIO_PCI) += vfio-pci.o
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@ -169,6 +169,13 @@ static int vfio_pci_enable(struct vfio_pci_device *vdev)
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if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
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vdev->has_vga = true;
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if (vfio_pci_is_vga(pdev) && pdev->vendor == PCI_VENDOR_ID_INTEL) {
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if (vfio_pci_igd_opregion_init(vdev) == 0)
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dev_info(&pdev->dev,
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"Intel IGD OpRegion support enabled\n");
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}
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return 0;
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}
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111
drivers/vfio/pci/vfio_pci_igd.c
Normal file
111
drivers/vfio/pci/vfio_pci_igd.c
Normal file
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@ -0,0 +1,111 @@
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/*
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* VFIO PCI Intel Graphics support
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*
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* Copyright (C) 2016 Red Hat, Inc. All rights reserved.
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* Author: Alex Williamson <alex.williamson@redhat.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Register a device specific region through which to provide read-only
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* access to the Intel IGD opregion. The register defining the opregion
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* address is also virtualized to prevent user modification.
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*/
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#include <linux/io.h>
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#include <linux/pci.h>
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#include <linux/uaccess.h>
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#include <linux/vfio.h>
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#include "vfio_pci_private.h"
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#define OPREGION_SIGNATURE "IntelGraphicsMem"
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#define OPREGION_SIZE (8 * 1024)
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#define OPREGION_PCI_ADDR 0xfc
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static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
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size_t count, loff_t *ppos, bool iswrite)
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{
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unsigned int i = VFIO_PCI_OFFSET_TO_INDEX(*ppos) - VFIO_PCI_NUM_REGIONS;
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void *base = vdev->region[i].data;
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loff_t pos = *ppos & VFIO_PCI_OFFSET_MASK;
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if (pos >= vdev->region[i].size || iswrite)
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return -EINVAL;
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count = min(count, (size_t)(vdev->region[i].size - pos));
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if (copy_to_user(buf, base + pos, count))
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return -EFAULT;
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*ppos += count;
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return count;
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}
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static void vfio_pci_igd_release(struct vfio_pci_device *vdev,
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struct vfio_pci_region *region)
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{
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memunmap(region->data);
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}
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static const struct vfio_pci_regops vfio_pci_igd_regops = {
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.rw = vfio_pci_igd_rw,
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.release = vfio_pci_igd_release,
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};
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int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
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{
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__le32 *dwordp = (__le32 *)(vdev->vconfig + OPREGION_PCI_ADDR);
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u32 addr, size;
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void *base;
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int ret;
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ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
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if (ret)
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return ret;
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if (!addr || !(~addr))
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return -ENODEV;
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base = memremap(addr, OPREGION_SIZE, MEMREMAP_WB);
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if (!base)
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return -ENOMEM;
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if (memcmp(base, OPREGION_SIGNATURE, 16)) {
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memunmap(base);
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return -EINVAL;
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}
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size = le32_to_cpu(*(__le32 *)(base + 16));
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if (!size) {
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memunmap(base);
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return -EINVAL;
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}
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size *= 1024; /* In KB */
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if (size != OPREGION_SIZE) {
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memunmap(base);
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base = memremap(addr, size, MEMREMAP_WB);
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if (!base)
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return -ENOMEM;
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}
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ret = vfio_pci_register_dev_region(vdev,
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PCI_VENDOR_ID_INTEL | VFIO_REGION_TYPE_PCI_VENDOR_TYPE,
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VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION,
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&vfio_pci_igd_regops, size, VFIO_REGION_INFO_FLAG_READ, base);
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if (ret) {
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memunmap(base);
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return ret;
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}
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/* Fill vconfig with the hw value and virtualize register */
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*dwordp = cpu_to_le32(addr);
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memset(vdev->pci_config_map + OPREGION_PCI_ADDR,
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PCI_CAP_ID_INVALID_VIRT, 4);
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return ret;
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}
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@ -122,4 +122,12 @@ extern int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
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unsigned int type, unsigned int subtype,
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const struct vfio_pci_regops *ops,
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size_t size, u32 flags, void *data);
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#ifdef CONFIG_VFIO_PCI_IGD
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extern int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev);
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#else
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static inline int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
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{
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return -ENODEV;
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}
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#endif
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#endif /* VFIO_PCI_PRIVATE_H */
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@ -280,6 +280,11 @@ struct vfio_region_info_cap_type {
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__u32 subtype; /* type specific */
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};
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#define VFIO_REGION_TYPE_PCI_VENDOR_TYPE (1 << 31)
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#define VFIO_REGION_TYPE_PCI_VENDOR_MASK (0xffff)
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#define VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION (1)
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/**
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* VFIO_DEVICE_GET_IRQ_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 9,
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* struct vfio_irq_info)
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