dmaengine: xilinx: xdma: Clarify the logic between cyclic/sg modes

We support both modes, but they perform totally different taks in the
interrupt handler. Clarify what shall be done in each case.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20231130111315.729430-3-miquel.raynal@bootlin.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Miquel Raynal 2023-11-30 12:13:13 +01:00 committed by Vinod Koul
parent 26ee018ff6
commit 58b61fc75b

View file

@ -765,27 +765,24 @@ static irqreturn_t xdma_channel_isr(int irq, void *dev_id)
regmap_write(xdev->rmap, xchan->base + XDMA_CHAN_STATUS, st);
vchan_cyclic_callback(vd);
goto out;
} else {
desc->completed_desc_num += complete_desc_num;
/* if all data blocks are transferred, remove and complete the request */
if (desc->completed_desc_num == desc->desc_num) {
list_del(&vd->node);
vchan_cookie_complete(vd);
goto out;
}
if (desc->completed_desc_num > desc->desc_num ||
complete_desc_num != XDMA_DESC_BLOCK_NUM * XDMA_DESC_ADJACENT)
goto out;
/* transfer the rest of data */
xdma_xfer_start(xchan);
}
desc->completed_desc_num += complete_desc_num;
/*
* if all data blocks are transferred, remove and complete the request
*/
if (desc->completed_desc_num == desc->desc_num) {
list_del(&vd->node);
vchan_cookie_complete(vd);
goto out;
}
if (desc->completed_desc_num > desc->desc_num ||
complete_desc_num != XDMA_DESC_BLOCK_NUM * XDMA_DESC_ADJACENT)
goto out;
/* transfer the rest of data (SG only) */
xdma_xfer_start(xchan);
out:
spin_unlock(&xchan->vchan.lock);
return IRQ_HANDLED;