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ioat3: interrupt descriptor support
The async_tx api uses the DMA_INTERRUPT operation type to terminate a chain of issued operations with a callback routine. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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parent
ae786624c2
commit
58c8649e0e
1 changed files with 38 additions and 1 deletions
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@ -120,7 +120,8 @@ static void ioat3_dma_unmap(struct ioat2_dma_chan *ioat,
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switch (desc->hw->ctl_f.op) {
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case IOAT_OP_COPY:
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ioat_dma_unmap(chan, flags, len, desc->hw);
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if (!desc->hw->ctl_f.null) /* skip 'interrupt' ops */
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ioat_dma_unmap(chan, flags, len, desc->hw);
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break;
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case IOAT_OP_FILL: {
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struct ioat_fill_descriptor *hw = desc->fill;
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@ -804,6 +805,38 @@ ioat3_prep_pqxor_val(struct dma_chan *chan, dma_addr_t *src,
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len, flags);
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}
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static struct dma_async_tx_descriptor *
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ioat3_prep_interrupt_lock(struct dma_chan *c, unsigned long flags)
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{
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struct ioat2_dma_chan *ioat = to_ioat2_chan(c);
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struct ioat_ring_ent *desc;
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struct ioat_dma_descriptor *hw;
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u16 idx;
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if (ioat2_alloc_and_lock(&idx, ioat, 1) == 0)
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desc = ioat2_get_ring_ent(ioat, idx);
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else
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return NULL;
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hw = desc->hw;
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hw->ctl = 0;
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hw->ctl_f.null = 1;
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hw->ctl_f.int_en = 1;
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hw->ctl_f.fence = !!(flags & DMA_PREP_FENCE);
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hw->ctl_f.compl_write = 1;
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hw->size = NULL_DESC_BUFFER_SIZE;
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hw->src_addr = 0;
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hw->dst_addr = 0;
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desc->txd.flags = flags;
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desc->len = 1;
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dump_desc_dbg(ioat, desc);
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/* we leave the channel locked to ensure in order submission */
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return &desc->txd;
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}
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static void __devinit ioat3_dma_test_callback(void *dma_async_param)
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{
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struct completion *cmp = dma_async_param;
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@ -1098,6 +1131,10 @@ int __devinit ioat3_dma_probe(struct ioatdma_device *device, int dca)
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dma->device_alloc_chan_resources = ioat2_alloc_chan_resources;
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dma->device_free_chan_resources = ioat2_free_chan_resources;
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dma->device_is_tx_complete = ioat3_is_complete;
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dma_cap_set(DMA_INTERRUPT, dma->cap_mask);
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dma->device_prep_dma_interrupt = ioat3_prep_interrupt_lock;
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cap = readl(device->reg_base + IOAT_DMA_CAP_OFFSET);
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if (cap & IOAT_CAP_FILL_BLOCK) {
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dma_cap_set(DMA_MEMSET, dma->cap_mask);
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