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drm/amdgpu: Don't query CE and UE errors
commitdce3d8e1d0
upstream. On QUERY2 IOCTL don't query counts of correctable and uncorrectable errors, since when RAS is enabled and supported on Vega20 server boards, this takes insurmountably long time, in O(n^3), which slows the system down to the point of it being unusable when we have GUI up. Fixes:ae363a212b
("drm/amdgpu: Add a new flag to AMDGPU_CTX_OP_QUERY_STATE2") Cc: Alexander Deucher <Alexander.Deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Reviewed-by: Alexander Deucher <Alexander.Deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1 changed files with 0 additions and 16 deletions
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@ -337,7 +337,6 @@ static int amdgpu_ctx_query2(struct amdgpu_device *adev,
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{
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struct amdgpu_ctx *ctx;
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struct amdgpu_ctx_mgr *mgr;
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unsigned long ras_counter;
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if (!fpriv)
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return -EINVAL;
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@ -362,21 +361,6 @@ static int amdgpu_ctx_query2(struct amdgpu_device *adev,
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if (atomic_read(&ctx->guilty))
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out->state.flags |= AMDGPU_CTX_QUERY2_FLAGS_GUILTY;
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/*query ue count*/
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ras_counter = amdgpu_ras_query_error_count(adev, false);
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/*ras counter is monotonic increasing*/
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if (ras_counter != ctx->ras_counter_ue) {
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out->state.flags |= AMDGPU_CTX_QUERY2_FLAGS_RAS_UE;
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ctx->ras_counter_ue = ras_counter;
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}
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/*query ce count*/
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ras_counter = amdgpu_ras_query_error_count(adev, true);
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if (ras_counter != ctx->ras_counter_ce) {
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out->state.flags |= AMDGPU_CTX_QUERY2_FLAGS_RAS_CE;
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ctx->ras_counter_ce = ras_counter;
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}
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mutex_unlock(&mgr->lock);
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return 0;
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}
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