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omap: 3630: disable TLL SAR on 3630 ES1
USBTLL Save-and-Restore is broken in 3630 ES1.0. Having it enabled could result in incorrect register restores as the OMAP exits off-mode. This could potentially result in unexpected wakeup events. (Refer 3630 errata ID i579) This is fixed in ES1.1. So disable it for ES1.0s. Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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1 changed files with 10 additions and 2 deletions
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@ -75,12 +75,19 @@ static struct powerdomain mpu_3xxx_pwrdm = {
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},
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};
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/*
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* The USBTLL Save-and-Restore mechanism is broken on
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* 3430s upto ES3.0 and 3630ES1.0. Hence this feature
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* needs to be disabled on these chips.
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* Refer: 3430 errata ID i459 and 3630 errata ID i579
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*/
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static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
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.name = "core_pwrdm",
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.prcm_offs = CORE_MOD,
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
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CHIP_IS_OMAP3430ES2 |
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CHIP_IS_OMAP3430ES3_0),
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CHIP_IS_OMAP3430ES3_0 |
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CHIP_IS_OMAP3630ES1),
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.pwrsts = PWRSTS_OFF_RET_ON,
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.pwrsts_logic_ret = PWRSTS_OFF_RET,
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.banks = 2,
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@ -97,7 +104,8 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
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static struct powerdomain core_3xxx_es3_1_pwrdm = {
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.name = "core_pwrdm",
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.prcm_offs = CORE_MOD,
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.omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3_1),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES3_1 |
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CHIP_GE_OMAP3630ES1_1),
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.pwrsts = PWRSTS_OFF_RET_ON,
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.pwrsts_logic_ret = PWRSTS_OFF_RET,
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.flags = PWRDM_HAS_HDWR_SAR, /* for USBTLL only */
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