dmaengine: sf-pdma: add mpfs-pdma compatible name

Sifive platform dma (sf-pdma) has both in-order and out-of-order
configurations but sf-pdam driver configured to do in-order DMA
transfers, with out-of-order configuration got better throughput
in the PolarFire SoC platform.

Add a PolarFire SoC specific compatible and code to support
for out-of-order dma transfers

Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
Link: https://lore.kernel.org/r/20231208103856.3732998-4-shravan.chippa@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Shravan Chippa 2023-12-08 16:08:55 +05:30 committed by Vinod Koul
parent 72b22006ba
commit 58eea79a1c
2 changed files with 31 additions and 4 deletions

View File

@ -25,6 +25,8 @@
#include "sf-pdma.h"
#define PDMA_QUIRK_NO_STRICT_ORDERING BIT(0)
#ifndef readq
static inline unsigned long long readq(void __iomem *addr)
{
@ -66,7 +68,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)
static void sf_pdma_fill_desc(struct sf_pdma_desc *desc,
u64 dst, u64 src, u64 size)
{
desc->xfer_type = PDMA_FULL_SPEED;
desc->xfer_type = desc->chan->pdma->transfer_type;
desc->xfer_size = size;
desc->dst_addr = dst;
desc->src_addr = src;
@ -493,6 +495,7 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma)
static int sf_pdma_probe(struct platform_device *pdev)
{
const struct sf_pdma_driver_platdata *ddata;
struct sf_pdma *pdma;
int ret, n_chans;
const enum dma_slave_buswidth widths =
@ -518,6 +521,14 @@ static int sf_pdma_probe(struct platform_device *pdev)
pdma->n_chans = n_chans;
pdma->transfer_type = PDMA_FULL_SPEED | PDMA_STRICT_ORDERING;
ddata = device_get_match_data(&pdev->dev);
if (ddata) {
if (ddata->quirks & PDMA_QUIRK_NO_STRICT_ORDERING)
pdma->transfer_type &= ~PDMA_STRICT_ORDERING;
}
pdma->membase = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(pdma->membase))
return PTR_ERR(pdma->membase);
@ -603,9 +614,19 @@ static void sf_pdma_remove(struct platform_device *pdev)
dma_async_device_unregister(&pdma->dma_dev);
}
static const struct sf_pdma_driver_platdata mpfs_pdma = {
.quirks = PDMA_QUIRK_NO_STRICT_ORDERING,
};
static const struct of_device_id sf_pdma_dt_ids[] = {
{ .compatible = "sifive,fu540-c000-pdma" },
{ .compatible = "sifive,pdma0" },
{
.compatible = "sifive,fu540-c000-pdma",
}, {
.compatible = "sifive,pdma0",
}, {
.compatible = "microchip,mpfs-pdma",
.data = &mpfs_pdma,
},
{},
};
MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);

View File

@ -48,7 +48,8 @@
#define PDMA_ERR_STATUS_MASK GENMASK(31, 31)
/* Transfer Type */
#define PDMA_FULL_SPEED 0xFF000008
#define PDMA_FULL_SPEED 0xFF000000
#define PDMA_STRICT_ORDERING BIT(3)
/* Error Recovery */
#define MAX_RETRY 1
@ -112,8 +113,13 @@ struct sf_pdma {
struct dma_device dma_dev;
void __iomem *membase;
void __iomem *mappedbase;
u32 transfer_type;
u32 n_chans;
struct sf_pdma_chan chans[] __counted_by(n_chans);
};
struct sf_pdma_driver_platdata {
u32 quirks;
};
#endif /* _SF_PDMA_H */