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Blackfin arch: IO Port functions to read/write unalligned memory
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
This commit is contained in:
parent
86ad79321c
commit
5906967638
4 changed files with 37 additions and 4 deletions
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@ -90,7 +90,9 @@ EXPORT_SYMBOL(__umodsi3);
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EXPORT_SYMBOL(outsb);
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EXPORT_SYMBOL(insb);
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EXPORT_SYMBOL(outsw);
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EXPORT_SYMBOL(outsw_8);
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EXPORT_SYMBOL(insw);
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EXPORT_SYMBOL(insw_8);
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EXPORT_SYMBOL(outsl);
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EXPORT_SYMBOL(insl);
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EXPORT_SYMBOL(insl_16);
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@ -7,7 +7,7 @@
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* Description: Implementation of ins{bwl} for BlackFin processors using zero overhead loops.
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*
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* Modified:
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* Copyright 2004-2006 Analog Devices Inc.
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* Copyright 2004-2008 Analog Devices Inc.
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* Copyright (C) 2005 Bas Vermeulen, BuyWays BV <bas@buyways.nl>
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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@ -63,6 +63,23 @@ ENTRY(_insw)
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RTS;
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ENDPROC(_insw)
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ENTRY(_insw_8)
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P0 = R0; /* P0 = port */
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cli R3;
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P1 = R1; /* P1 = address */
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P2 = R2; /* P2 = count */
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SSYNC;
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LSETUP( .Lword8_loop_s, .Lword8_loop_e) LC0 = P2;
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.Lword8_loop_s: R0 = W[P0];
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B[P1++] = R0;
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R0 = R0 >> 8;
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B[P1++] = R0;
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NOP;
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.Lword8_loop_e: NOP;
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sti R3;
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RTS;
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ENDPROC(_insw_8)
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ENTRY(_insb)
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P0 = R0; /* P0 = port */
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cli R3;
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@ -78,8 +95,6 @@ ENTRY(_insb)
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RTS;
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ENDPROC(_insb)
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ENTRY(_insl_16)
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P0 = R0; /* P0 = port */
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cli R3;
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@ -7,7 +7,7 @@
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* Description: Implementation of outs{bwl} for BlackFin processors using zero overhead loops.
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*
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* Modified: Copyright (C) 2005 Bas Vermeulen, BuyWays BV <bas@buyways.nl>
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* Copyright 2004-2006 Analog Devices Inc.
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* Copyright 2004-2008 Analog Devices Inc.
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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@ -63,3 +63,17 @@ ENTRY(_outsb)
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.Lbyte_loop_e: B[P0] = R0;
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RTS;
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ENDPROC(_outsb)
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ENTRY(_outsw_8)
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P0 = R0; /* P0 = port */
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P1 = R1; /* P1 = address */
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P2 = R2; /* P2 = count */
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LSETUP( .Lword8_loop_s, .Lword8_loop_e) LC0 = P2;
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.Lword8_loop_s: R1 = B[P1++];
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R0 = B[P1++];
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R0 = R0 << 8;
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R0 = R0 + R1;
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.Lword8_loop_e: W[P0] = R0;
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RTS;
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ENDPROC(_outsw)
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@ -117,10 +117,12 @@ static inline unsigned int readl(const volatile void __iomem *addr)
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extern void outsb(unsigned long port, const void *addr, unsigned long count);
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extern void outsw(unsigned long port, const void *addr, unsigned long count);
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extern void outsw_8(unsigned long port, const void *addr, unsigned long count);
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extern void outsl(unsigned long port, const void *addr, unsigned long count);
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extern void insb(unsigned long port, void *addr, unsigned long count);
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extern void insw(unsigned long port, void *addr, unsigned long count);
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extern void insw_8(unsigned long port, void *addr, unsigned long count);
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extern void insl(unsigned long port, void *addr, unsigned long count);
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extern void insl_16(unsigned long port, void *addr, unsigned long count);
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