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i40e: Split i40e_osdep.h 

[ Upstream commit 5dfd37c37a ]

Header i40e_osdep.h contains only IO primitives and couple of debug
printing macros. Split this header file to i40e_io.h and i40e_debug.h
and move i40e_debug_mask enum to i40e_debug.h

Signed-off-by: Ivan Vecera <ivecera@redhat.com>
Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Stable-dep-of: 6dbdd4de03 ("e1000e: Workaround for sporadic MDI error on Meteor Lake systems")
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Ivan Vecera 2023-09-27 10:31:33 +02:00 committed by Greg Kroah-Hartman
parent 2ee5326d32
commit 59a9de1a94
8 changed files with 68 additions and 71 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/net/ethernet/intel/i40e/i40e_adminq.h
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@ -4,8 +4,8 @@
#ifndef _I40E_ADMINQ_H_
#define _I40E_ADMINQ_H_
#include <linux/mutex.h>
#include "i40e_alloc.h"
#include "i40e_osdep.h"
#include "i40e_adminq_cmd.h"
#define I40E_ADMINQ_DESC(R, i) \

47
drivers/net/ethernet/intel/i40e/i40e_debug.h Normal file
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@ -0,0 +1,47 @@
/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright(c) 2023 Intel Corporation. */
#ifndef _I40E_DEBUG_H_
#define _I40E_DEBUG_H_
#include <linux/dev_printk.h>
/* debug masks - set these bits in hw->debug_mask to control output */
enum i40e_debug_mask {
I40E_DEBUG_INIT = 0x00000001,
I40E_DEBUG_RELEASE = 0x00000002,
I40E_DEBUG_LINK = 0x00000010,
I40E_DEBUG_PHY = 0x00000020,
I40E_DEBUG_HMC = 0x00000040,
I40E_DEBUG_NVM = 0x00000080,
I40E_DEBUG_LAN = 0x00000100,
I40E_DEBUG_FLOW = 0x00000200,
I40E_DEBUG_DCB = 0x00000400,
I40E_DEBUG_DIAG = 0x00000800,
I40E_DEBUG_FD = 0x00001000,
I40E_DEBUG_PACKAGE = 0x00002000,
I40E_DEBUG_IWARP = 0x00F00000,
I40E_DEBUG_AQ_MESSAGE = 0x01000000,
I40E_DEBUG_AQ_DESCRIPTOR = 0x02000000,
I40E_DEBUG_AQ_DESC_BUFFER = 0x04000000,
I40E_DEBUG_AQ_COMMAND = 0x06000000,
I40E_DEBUG_AQ = 0x0F000000,
I40E_DEBUG_USER = 0xF0000000,
I40E_DEBUG_ALL = 0xFFFFFFFF
};
struct i40e_hw;
struct device *i40e_hw_to_dev(struct i40e_hw *hw);
#define hw_dbg(hw, S, A...) dev_dbg(i40e_hw_to_dev(hw), S, ##A)
#define i40e_debug(h, m, s, ...) \
do { \
if (((m) & (h)->debug_mask)) \
dev_info(i40e_hw_to_dev(hw), s, ##__VA_ARGS__); \
} while (0)
#endif /* _I40E_DEBUG_H_ */

1
drivers/net/ethernet/intel/i40e/i40e_hmc.c
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@ -2,7 +2,6 @@
/* Copyright(c) 2013 - 2018 Intel Corporation. */
#include "i40e.h"
#include "i40e_osdep.h"
#include "i40e_register.h"
#include "i40e_alloc.h"
#include "i40e_hmc.h"

16
drivers/net/ethernet/intel/i40e/i40e_io.h Normal file
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@ -0,0 +1,16 @@
/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright(c) 2023 Intel Corporation. */
#ifndef _I40E_IO_H_
#define _I40E_IO_H_
/* get readq/writeq support for 32 bit kernels, use the low-first version */
#include <linux/io-64-nonatomic-lo-hi.h>
#define wr32(a, reg, value) writel((value), ((a)->hw_addr + (reg)))
#define rd32(a, reg) readl((a)->hw_addr + (reg))
#define rd64(a, reg) readq((a)->hw_addr + (reg))
#define i40e_flush(a) readl((a)->hw_addr + I40E_GLGEN_STAT)
#endif /* _I40E_IO_H_ */

1
drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c
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@ -2,7 +2,6 @@
/* Copyright(c) 2013 - 2018 Intel Corporation. */
#include "i40e.h"
#include "i40e_osdep.h"
#include "i40e_register.h"
#include "i40e_type.h"
#include "i40e_hmc.h"

40
drivers/net/ethernet/intel/i40e/i40e_osdep.h
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@ -1,40 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright(c) 2013 - 2018 Intel Corporation. */
#ifndef _I40E_OSDEP_H_
#define _I40E_OSDEP_H_
#include <linux/types.h>
#include <linux/if_ether.h>
#include <linux/if_vlan.h>
#include <linux/tcp.h>
#include <linux/pci.h>
#include <linux/highuid.h>
/* get readq/writeq support for 32 bit kernels, use the low-first version */
#include <linux/io-64-nonatomic-lo-hi.h>
/* File to be the magic between shared code and
* actual OS primitives
*/
struct i40e_hw;
struct device *i40e_hw_to_dev(struct i40e_hw *hw);
#define hw_dbg(hw, S, A...) dev_dbg(i40e_hw_to_dev(hw), S, ##A)
#define wr32(a, reg, value) writel((value), ((a)->hw_addr + (reg)))
#define rd32(a, reg) readl((a)->hw_addr + (reg))
#define rd64(a, reg) readq((a)->hw_addr + (reg))
#define i40e_flush(a) readl((a)->hw_addr + I40E_GLGEN_STAT)
#define i40e_debug(h, m, s, ...) \
do { \
if (((m) & (h)->debug_mask)) \
pr_info("i40e %02x:%02x.%x " s, \
(h)->bus.bus_id, (h)->bus.device, \
(h)->bus.func, ##__VA_ARGS__); \
} while (0)
#endif /* _I40E_OSDEP_H_ */

1
drivers/net/ethernet/intel/i40e/i40e_prototype.h
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@ -6,6 +6,7 @@
#include "i40e_type.h"
#include "i40e_alloc.h"
#include "i40e_debug.h"
#include <linux/avf/virtchnl.h>
/* Prototypes for shared code functions that are not in

31
drivers/net/ethernet/intel/i40e/i40e_type.h
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@ -4,7 +4,9 @@
#ifndef _I40E_TYPE_H_
#define _I40E_TYPE_H_
#include "i40e_osdep.h"
#include <linux/delay.h>
#include <linux/if_ether.h>
#include "i40e_io.h"
#include "i40e_register.h"
#include "i40e_adminq.h"
#include "i40e_hmc.h"
@ -43,33 +45,6 @@ typedef void (*I40E_ADMINQ_CALLBACK)(struct i40e_hw *, struct i40e_aq_desc *);
#define I40E_QTX_CTL_VM_QUEUE 0x1
#define I40E_QTX_CTL_PF_QUEUE 0x2
/* debug masks - set these bits in hw->debug_mask to control output */
enum i40e_debug_mask {
I40E_DEBUG_INIT = 0x00000001,
I40E_DEBUG_RELEASE = 0x00000002,
I40E_DEBUG_LINK = 0x00000010,
I40E_DEBUG_PHY = 0x00000020,
I40E_DEBUG_HMC = 0x00000040,
I40E_DEBUG_NVM = 0x00000080,
I40E_DEBUG_LAN = 0x00000100,
I40E_DEBUG_FLOW = 0x00000200,
I40E_DEBUG_DCB = 0x00000400,
I40E_DEBUG_DIAG = 0x00000800,
I40E_DEBUG_FD = 0x00001000,
I40E_DEBUG_PACKAGE = 0x00002000,
I40E_DEBUG_IWARP = 0x00F00000,
I40E_DEBUG_AQ_MESSAGE = 0x01000000,
I40E_DEBUG_AQ_DESCRIPTOR = 0x02000000,
I40E_DEBUG_AQ_DESC_BUFFER = 0x04000000,
I40E_DEBUG_AQ_COMMAND = 0x06000000,
I40E_DEBUG_AQ = 0x0F000000,
I40E_DEBUG_USER = 0xF0000000,
I40E_DEBUG_ALL = 0xFFFFFFFF
};
#define I40E_MDIO_CLAUSE22_STCODE_MASK I40E_GLGEN_MSCA_STCODE_MASK
#define I40E_MDIO_CLAUSE22_OPCODE_WRITE_MASK I40E_GLGEN_MSCA_OPCODE_MASK(1)
#define I40E_MDIO_CLAUSE22_OPCODE_READ_MASK I40E_GLGEN_MSCA_OPCODE_MASK(2)