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IB/mlx4: Limit size of fast registration WRs
Fix the limit on the size of max fast registration WRs that can be posted to match hardware capabilities. Signed-off-by: Eli Cohen <eli@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
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parent
0498628f97
commit
5a0fd09428
3 changed files with 6 additions and 2 deletions
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@ -135,7 +135,7 @@ static int mlx4_ib_query_device(struct ib_device *ibdev,
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props->max_srq = dev->dev->caps.num_srqs - dev->dev->caps.reserved_srqs;
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props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
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props->max_srq_sge = dev->dev->caps.max_srq_sge;
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props->max_fast_reg_page_list_len = PAGE_SIZE / sizeof (u64);
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props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
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props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
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props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
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IB_ATOMIC_HCA : IB_ATOMIC_NONE;
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@ -226,7 +226,7 @@ struct ib_fast_reg_page_list *mlx4_ib_alloc_fast_reg_page_list(struct ib_device
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struct mlx4_ib_fast_reg_page_list *mfrpl;
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int size = page_list_len * sizeof (u64);
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if (size > PAGE_SIZE)
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if (page_list_len > MLX4_MAX_FAST_REG_PAGES)
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return ERR_PTR(-EINVAL);
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mfrpl = kmalloc(sizeof *mfrpl, GFP_KERNEL);
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@ -171,6 +171,10 @@ enum {
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MLX4_NUM_FEXCH = 64 * 1024,
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};
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enum {
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MLX4_MAX_FAST_REG_PAGES = 511,
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};
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static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor)
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{
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return (major << 32) | (minor << 16) | subminor;
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