mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-23 01:10:04 +00:00
Merge remote-tracking branches 'asoc/topic/wm8900', 'asoc/topic/wm8903', 'asoc/topic/wm8904', 'asoc/topic/wm8940' and 'asoc/topic/wm8955' into asoc-next
This commit is contained in:
commit
5a33ab48c3
7 changed files with 576 additions and 599 deletions
|
@ -216,23 +216,23 @@ static bool wm8900_volatile_register(struct device *dev, unsigned int reg)
|
|||
}
|
||||
}
|
||||
|
||||
static void wm8900_reset(struct snd_soc_codec *codec)
|
||||
static void wm8900_reset(struct snd_soc_component *component)
|
||||
{
|
||||
snd_soc_write(codec, WM8900_REG_RESET, 0);
|
||||
snd_soc_component_write(component, WM8900_REG_RESET, 0);
|
||||
}
|
||||
|
||||
static int wm8900_hp_event(struct snd_soc_dapm_widget *w,
|
||||
struct snd_kcontrol *kcontrol, int event)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
|
||||
u16 hpctl1 = snd_soc_read(codec, WM8900_REG_HPCTL1);
|
||||
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
|
||||
u16 hpctl1 = snd_soc_component_read32(component, WM8900_REG_HPCTL1);
|
||||
|
||||
switch (event) {
|
||||
case SND_SOC_DAPM_PRE_PMU:
|
||||
/* Clamp headphone outputs */
|
||||
hpctl1 = WM8900_REG_HPCTL1_HP_CLAMP_IP |
|
||||
WM8900_REG_HPCTL1_HP_CLAMP_OP;
|
||||
snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
|
||||
snd_soc_component_write(component, WM8900_REG_HPCTL1, hpctl1);
|
||||
break;
|
||||
|
||||
case SND_SOC_DAPM_POST_PMU:
|
||||
|
@ -241,41 +241,41 @@ static int wm8900_hp_event(struct snd_soc_dapm_widget *w,
|
|||
hpctl1 |= WM8900_REG_HPCTL1_HP_SHORT |
|
||||
WM8900_REG_HPCTL1_HP_SHORT2 |
|
||||
WM8900_REG_HPCTL1_HP_IPSTAGE_ENA;
|
||||
snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
|
||||
snd_soc_component_write(component, WM8900_REG_HPCTL1, hpctl1);
|
||||
|
||||
msleep(400);
|
||||
|
||||
/* Enable the output stage */
|
||||
hpctl1 &= ~WM8900_REG_HPCTL1_HP_CLAMP_OP;
|
||||
hpctl1 |= WM8900_REG_HPCTL1_HP_OPSTAGE_ENA;
|
||||
snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
|
||||
snd_soc_component_write(component, WM8900_REG_HPCTL1, hpctl1);
|
||||
|
||||
/* Remove the shorts */
|
||||
hpctl1 &= ~WM8900_REG_HPCTL1_HP_SHORT2;
|
||||
snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
|
||||
snd_soc_component_write(component, WM8900_REG_HPCTL1, hpctl1);
|
||||
hpctl1 &= ~WM8900_REG_HPCTL1_HP_SHORT;
|
||||
snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
|
||||
snd_soc_component_write(component, WM8900_REG_HPCTL1, hpctl1);
|
||||
break;
|
||||
|
||||
case SND_SOC_DAPM_PRE_PMD:
|
||||
/* Short the output */
|
||||
hpctl1 |= WM8900_REG_HPCTL1_HP_SHORT;
|
||||
snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
|
||||
snd_soc_component_write(component, WM8900_REG_HPCTL1, hpctl1);
|
||||
|
||||
/* Disable the output stage */
|
||||
hpctl1 &= ~WM8900_REG_HPCTL1_HP_OPSTAGE_ENA;
|
||||
snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
|
||||
snd_soc_component_write(component, WM8900_REG_HPCTL1, hpctl1);
|
||||
|
||||
/* Clamp the outputs and power down input */
|
||||
hpctl1 |= WM8900_REG_HPCTL1_HP_CLAMP_IP |
|
||||
WM8900_REG_HPCTL1_HP_CLAMP_OP;
|
||||
hpctl1 &= ~WM8900_REG_HPCTL1_HP_IPSTAGE_ENA;
|
||||
snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
|
||||
snd_soc_component_write(component, WM8900_REG_HPCTL1, hpctl1);
|
||||
break;
|
||||
|
||||
case SND_SOC_DAPM_POST_PMD:
|
||||
/* Disable everything */
|
||||
snd_soc_write(codec, WM8900_REG_HPCTL1, 0);
|
||||
snd_soc_component_write(component, WM8900_REG_HPCTL1, 0);
|
||||
break;
|
||||
|
||||
default:
|
||||
|
@ -635,10 +635,10 @@ static int wm8900_hw_params(struct snd_pcm_substream *substream,
|
|||
struct snd_pcm_hw_params *params,
|
||||
struct snd_soc_dai *dai)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
struct snd_soc_component *component = dai->component;
|
||||
u16 reg;
|
||||
|
||||
reg = snd_soc_read(codec, WM8900_REG_AUDIO1) & ~0x60;
|
||||
reg = snd_soc_component_read32(component, WM8900_REG_AUDIO1) & ~0x60;
|
||||
|
||||
switch (params_width(params)) {
|
||||
case 16:
|
||||
|
@ -656,17 +656,17 @@ static int wm8900_hw_params(struct snd_pcm_substream *substream,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
snd_soc_write(codec, WM8900_REG_AUDIO1, reg);
|
||||
snd_soc_component_write(component, WM8900_REG_AUDIO1, reg);
|
||||
|
||||
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
|
||||
reg = snd_soc_read(codec, WM8900_REG_DACCTRL);
|
||||
reg = snd_soc_component_read32(component, WM8900_REG_DACCTRL);
|
||||
|
||||
if (params_rate(params) <= 24000)
|
||||
reg |= WM8900_REG_DACCTRL_DAC_SB_FILT;
|
||||
else
|
||||
reg &= ~WM8900_REG_DACCTRL_DAC_SB_FILT;
|
||||
|
||||
snd_soc_write(codec, WM8900_REG_DACCTRL, reg);
|
||||
snd_soc_component_write(component, WM8900_REG_DACCTRL, reg);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -751,24 +751,24 @@ static int fll_factors(struct _fll_div *fll_div, unsigned int Fref,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int wm8900_set_fll(struct snd_soc_codec *codec,
|
||||
static int wm8900_set_fll(struct snd_soc_component *component,
|
||||
int fll_id, unsigned int freq_in, unsigned int freq_out)
|
||||
{
|
||||
struct wm8900_priv *wm8900 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8900_priv *wm8900 = snd_soc_component_get_drvdata(component);
|
||||
struct _fll_div fll_div;
|
||||
|
||||
if (wm8900->fll_in == freq_in && wm8900->fll_out == freq_out)
|
||||
return 0;
|
||||
|
||||
/* The digital side should be disabled during any change. */
|
||||
snd_soc_update_bits(codec, WM8900_REG_POWER1,
|
||||
snd_soc_component_update_bits(component, WM8900_REG_POWER1,
|
||||
WM8900_REG_POWER1_FLL_ENA, 0);
|
||||
|
||||
/* Disable the FLL? */
|
||||
if (!freq_in || !freq_out) {
|
||||
snd_soc_update_bits(codec, WM8900_REG_CLOCKING1,
|
||||
snd_soc_component_update_bits(component, WM8900_REG_CLOCKING1,
|
||||
WM8900_REG_CLOCKING1_MCLK_SRC, 0);
|
||||
snd_soc_update_bits(codec, WM8900_REG_FLLCTL1,
|
||||
snd_soc_component_update_bits(component, WM8900_REG_FLLCTL1,
|
||||
WM8900_REG_FLLCTL1_OSC_ENA, 0);
|
||||
wm8900->fll_in = freq_in;
|
||||
wm8900->fll_out = freq_out;
|
||||
|
@ -784,32 +784,32 @@ static int wm8900_set_fll(struct snd_soc_codec *codec,
|
|||
|
||||
/* The osclilator *MUST* be enabled before we enable the
|
||||
* digital circuit. */
|
||||
snd_soc_write(codec, WM8900_REG_FLLCTL1,
|
||||
snd_soc_component_write(component, WM8900_REG_FLLCTL1,
|
||||
fll_div.fll_ratio | WM8900_REG_FLLCTL1_OSC_ENA);
|
||||
|
||||
snd_soc_write(codec, WM8900_REG_FLLCTL4, fll_div.n >> 5);
|
||||
snd_soc_write(codec, WM8900_REG_FLLCTL5,
|
||||
snd_soc_component_write(component, WM8900_REG_FLLCTL4, fll_div.n >> 5);
|
||||
snd_soc_component_write(component, WM8900_REG_FLLCTL5,
|
||||
(fll_div.fllclk_div << 6) | (fll_div.n & 0x1f));
|
||||
|
||||
if (fll_div.k) {
|
||||
snd_soc_write(codec, WM8900_REG_FLLCTL2,
|
||||
snd_soc_component_write(component, WM8900_REG_FLLCTL2,
|
||||
(fll_div.k >> 8) | 0x100);
|
||||
snd_soc_write(codec, WM8900_REG_FLLCTL3, fll_div.k & 0xff);
|
||||
snd_soc_component_write(component, WM8900_REG_FLLCTL3, fll_div.k & 0xff);
|
||||
} else
|
||||
snd_soc_write(codec, WM8900_REG_FLLCTL2, 0);
|
||||
snd_soc_component_write(component, WM8900_REG_FLLCTL2, 0);
|
||||
|
||||
if (fll_div.fll_slow_lock_ref)
|
||||
snd_soc_write(codec, WM8900_REG_FLLCTL6,
|
||||
snd_soc_component_write(component, WM8900_REG_FLLCTL6,
|
||||
WM8900_REG_FLLCTL6_FLL_SLOW_LOCK_REF);
|
||||
else
|
||||
snd_soc_write(codec, WM8900_REG_FLLCTL6, 0);
|
||||
snd_soc_component_write(component, WM8900_REG_FLLCTL6, 0);
|
||||
|
||||
snd_soc_update_bits(codec, WM8900_REG_POWER1,
|
||||
snd_soc_component_update_bits(component, WM8900_REG_POWER1,
|
||||
WM8900_REG_POWER1_FLL_ENA,
|
||||
WM8900_REG_POWER1_FLL_ENA);
|
||||
|
||||
reenable:
|
||||
snd_soc_update_bits(codec, WM8900_REG_CLOCKING1,
|
||||
snd_soc_component_update_bits(component, WM8900_REG_CLOCKING1,
|
||||
WM8900_REG_CLOCKING1_MCLK_SRC,
|
||||
WM8900_REG_CLOCKING1_MCLK_SRC);
|
||||
return 0;
|
||||
|
@ -818,41 +818,41 @@ static int wm8900_set_fll(struct snd_soc_codec *codec,
|
|||
static int wm8900_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
|
||||
int source, unsigned int freq_in, unsigned int freq_out)
|
||||
{
|
||||
return wm8900_set_fll(codec_dai->codec, pll_id, freq_in, freq_out);
|
||||
return wm8900_set_fll(codec_dai->component, pll_id, freq_in, freq_out);
|
||||
}
|
||||
|
||||
static int wm8900_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
|
||||
int div_id, int div)
|
||||
{
|
||||
struct snd_soc_codec *codec = codec_dai->codec;
|
||||
struct snd_soc_component *component = codec_dai->component;
|
||||
|
||||
switch (div_id) {
|
||||
case WM8900_BCLK_DIV:
|
||||
snd_soc_update_bits(codec, WM8900_REG_CLOCKING1,
|
||||
snd_soc_component_update_bits(component, WM8900_REG_CLOCKING1,
|
||||
WM8900_REG_CLOCKING1_BCLK_MASK, div);
|
||||
break;
|
||||
case WM8900_OPCLK_DIV:
|
||||
snd_soc_update_bits(codec, WM8900_REG_CLOCKING1,
|
||||
snd_soc_component_update_bits(component, WM8900_REG_CLOCKING1,
|
||||
WM8900_REG_CLOCKING1_OPCLK_MASK, div);
|
||||
break;
|
||||
case WM8900_DAC_LRCLK:
|
||||
snd_soc_update_bits(codec, WM8900_REG_AUDIO4,
|
||||
snd_soc_component_update_bits(component, WM8900_REG_AUDIO4,
|
||||
WM8900_LRC_MASK, div);
|
||||
break;
|
||||
case WM8900_ADC_LRCLK:
|
||||
snd_soc_update_bits(codec, WM8900_REG_AUDIO3,
|
||||
snd_soc_component_update_bits(component, WM8900_REG_AUDIO3,
|
||||
WM8900_LRC_MASK, div);
|
||||
break;
|
||||
case WM8900_DAC_CLKDIV:
|
||||
snd_soc_update_bits(codec, WM8900_REG_CLOCKING2,
|
||||
snd_soc_component_update_bits(component, WM8900_REG_CLOCKING2,
|
||||
WM8900_REG_CLOCKING2_DAC_CLKDIV, div);
|
||||
break;
|
||||
case WM8900_ADC_CLKDIV:
|
||||
snd_soc_update_bits(codec, WM8900_REG_CLOCKING2,
|
||||
snd_soc_component_update_bits(component, WM8900_REG_CLOCKING2,
|
||||
WM8900_REG_CLOCKING2_ADC_CLKDIV, div);
|
||||
break;
|
||||
case WM8900_LRCLK_MODE:
|
||||
snd_soc_update_bits(codec, WM8900_REG_DACCTRL,
|
||||
snd_soc_component_update_bits(component, WM8900_REG_DACCTRL,
|
||||
WM8900_REG_DACCTRL_AIF_LRCLKRATE, div);
|
||||
break;
|
||||
default:
|
||||
|
@ -866,13 +866,13 @@ static int wm8900_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
|
|||
static int wm8900_set_dai_fmt(struct snd_soc_dai *codec_dai,
|
||||
unsigned int fmt)
|
||||
{
|
||||
struct snd_soc_codec *codec = codec_dai->codec;
|
||||
struct snd_soc_component *component = codec_dai->component;
|
||||
unsigned int clocking1, aif1, aif3, aif4;
|
||||
|
||||
clocking1 = snd_soc_read(codec, WM8900_REG_CLOCKING1);
|
||||
aif1 = snd_soc_read(codec, WM8900_REG_AUDIO1);
|
||||
aif3 = snd_soc_read(codec, WM8900_REG_AUDIO3);
|
||||
aif4 = snd_soc_read(codec, WM8900_REG_AUDIO4);
|
||||
clocking1 = snd_soc_component_read32(component, WM8900_REG_CLOCKING1);
|
||||
aif1 = snd_soc_component_read32(component, WM8900_REG_AUDIO1);
|
||||
aif3 = snd_soc_component_read32(component, WM8900_REG_AUDIO3);
|
||||
aif4 = snd_soc_component_read32(component, WM8900_REG_AUDIO4);
|
||||
|
||||
/* set master/slave audio interface */
|
||||
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
|
||||
|
@ -968,27 +968,27 @@ static int wm8900_set_dai_fmt(struct snd_soc_dai *codec_dai,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
snd_soc_write(codec, WM8900_REG_CLOCKING1, clocking1);
|
||||
snd_soc_write(codec, WM8900_REG_AUDIO1, aif1);
|
||||
snd_soc_write(codec, WM8900_REG_AUDIO3, aif3);
|
||||
snd_soc_write(codec, WM8900_REG_AUDIO4, aif4);
|
||||
snd_soc_component_write(component, WM8900_REG_CLOCKING1, clocking1);
|
||||
snd_soc_component_write(component, WM8900_REG_AUDIO1, aif1);
|
||||
snd_soc_component_write(component, WM8900_REG_AUDIO3, aif3);
|
||||
snd_soc_component_write(component, WM8900_REG_AUDIO4, aif4);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wm8900_digital_mute(struct snd_soc_dai *codec_dai, int mute)
|
||||
{
|
||||
struct snd_soc_codec *codec = codec_dai->codec;
|
||||
struct snd_soc_component *component = codec_dai->component;
|
||||
u16 reg;
|
||||
|
||||
reg = snd_soc_read(codec, WM8900_REG_DACCTRL);
|
||||
reg = snd_soc_component_read32(component, WM8900_REG_DACCTRL);
|
||||
|
||||
if (mute)
|
||||
reg |= WM8900_REG_DACCTRL_MUTE;
|
||||
else
|
||||
reg &= ~WM8900_REG_DACCTRL_MUTE;
|
||||
|
||||
snd_soc_write(codec, WM8900_REG_DACCTRL, reg);
|
||||
snd_soc_component_write(component, WM8900_REG_DACCTRL, reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -1028,7 +1028,7 @@ static struct snd_soc_dai_driver wm8900_dai = {
|
|||
.ops = &wm8900_dai_ops,
|
||||
};
|
||||
|
||||
static int wm8900_set_bias_level(struct snd_soc_codec *codec,
|
||||
static int wm8900_set_bias_level(struct snd_soc_component *component,
|
||||
enum snd_soc_bias_level level)
|
||||
{
|
||||
u16 reg;
|
||||
|
@ -1036,10 +1036,10 @@ static int wm8900_set_bias_level(struct snd_soc_codec *codec,
|
|||
switch (level) {
|
||||
case SND_SOC_BIAS_ON:
|
||||
/* Enable thermal shutdown */
|
||||
snd_soc_update_bits(codec, WM8900_REG_GPIO,
|
||||
snd_soc_component_update_bits(component, WM8900_REG_GPIO,
|
||||
WM8900_REG_GPIO_TEMP_ENA,
|
||||
WM8900_REG_GPIO_TEMP_ENA);
|
||||
snd_soc_update_bits(codec, WM8900_REG_ADDCTL,
|
||||
snd_soc_component_update_bits(component, WM8900_REG_ADDCTL,
|
||||
WM8900_REG_ADDCTL_TEMP_SD,
|
||||
WM8900_REG_ADDCTL_TEMP_SD);
|
||||
break;
|
||||
|
@ -1049,113 +1049,113 @@ static int wm8900_set_bias_level(struct snd_soc_codec *codec,
|
|||
|
||||
case SND_SOC_BIAS_STANDBY:
|
||||
/* Charge capacitors if initial power up */
|
||||
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
|
||||
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
|
||||
/* STARTUP_BIAS_ENA on */
|
||||
snd_soc_write(codec, WM8900_REG_POWER1,
|
||||
snd_soc_component_write(component, WM8900_REG_POWER1,
|
||||
WM8900_REG_POWER1_STARTUP_BIAS_ENA);
|
||||
|
||||
/* Startup bias mode */
|
||||
snd_soc_write(codec, WM8900_REG_ADDCTL,
|
||||
snd_soc_component_write(component, WM8900_REG_ADDCTL,
|
||||
WM8900_REG_ADDCTL_BIAS_SRC |
|
||||
WM8900_REG_ADDCTL_VMID_SOFTST);
|
||||
|
||||
/* VMID 2x50k */
|
||||
snd_soc_write(codec, WM8900_REG_POWER1,
|
||||
snd_soc_component_write(component, WM8900_REG_POWER1,
|
||||
WM8900_REG_POWER1_STARTUP_BIAS_ENA | 0x1);
|
||||
|
||||
/* Allow capacitors to charge */
|
||||
schedule_timeout_interruptible(msecs_to_jiffies(400));
|
||||
|
||||
/* Enable bias */
|
||||
snd_soc_write(codec, WM8900_REG_POWER1,
|
||||
snd_soc_component_write(component, WM8900_REG_POWER1,
|
||||
WM8900_REG_POWER1_STARTUP_BIAS_ENA |
|
||||
WM8900_REG_POWER1_BIAS_ENA | 0x1);
|
||||
|
||||
snd_soc_write(codec, WM8900_REG_ADDCTL, 0);
|
||||
snd_soc_component_write(component, WM8900_REG_ADDCTL, 0);
|
||||
|
||||
snd_soc_write(codec, WM8900_REG_POWER1,
|
||||
snd_soc_component_write(component, WM8900_REG_POWER1,
|
||||
WM8900_REG_POWER1_BIAS_ENA | 0x1);
|
||||
}
|
||||
|
||||
reg = snd_soc_read(codec, WM8900_REG_POWER1);
|
||||
snd_soc_write(codec, WM8900_REG_POWER1,
|
||||
reg = snd_soc_component_read32(component, WM8900_REG_POWER1);
|
||||
snd_soc_component_write(component, WM8900_REG_POWER1,
|
||||
(reg & WM8900_REG_POWER1_FLL_ENA) |
|
||||
WM8900_REG_POWER1_BIAS_ENA | 0x1);
|
||||
snd_soc_write(codec, WM8900_REG_POWER2,
|
||||
snd_soc_component_write(component, WM8900_REG_POWER2,
|
||||
WM8900_REG_POWER2_SYSCLK_ENA);
|
||||
snd_soc_write(codec, WM8900_REG_POWER3, 0);
|
||||
snd_soc_component_write(component, WM8900_REG_POWER3, 0);
|
||||
break;
|
||||
|
||||
case SND_SOC_BIAS_OFF:
|
||||
/* Startup bias enable */
|
||||
reg = snd_soc_read(codec, WM8900_REG_POWER1);
|
||||
snd_soc_write(codec, WM8900_REG_POWER1,
|
||||
reg = snd_soc_component_read32(component, WM8900_REG_POWER1);
|
||||
snd_soc_component_write(component, WM8900_REG_POWER1,
|
||||
reg & WM8900_REG_POWER1_STARTUP_BIAS_ENA);
|
||||
snd_soc_write(codec, WM8900_REG_ADDCTL,
|
||||
snd_soc_component_write(component, WM8900_REG_ADDCTL,
|
||||
WM8900_REG_ADDCTL_BIAS_SRC |
|
||||
WM8900_REG_ADDCTL_VMID_SOFTST);
|
||||
|
||||
/* Discharge caps */
|
||||
snd_soc_write(codec, WM8900_REG_POWER1,
|
||||
snd_soc_component_write(component, WM8900_REG_POWER1,
|
||||
WM8900_REG_POWER1_STARTUP_BIAS_ENA);
|
||||
schedule_timeout_interruptible(msecs_to_jiffies(500));
|
||||
|
||||
/* Remove clamp */
|
||||
snd_soc_write(codec, WM8900_REG_HPCTL1, 0);
|
||||
snd_soc_component_write(component, WM8900_REG_HPCTL1, 0);
|
||||
|
||||
/* Power down */
|
||||
snd_soc_write(codec, WM8900_REG_ADDCTL, 0);
|
||||
snd_soc_write(codec, WM8900_REG_POWER1, 0);
|
||||
snd_soc_write(codec, WM8900_REG_POWER2, 0);
|
||||
snd_soc_write(codec, WM8900_REG_POWER3, 0);
|
||||
snd_soc_component_write(component, WM8900_REG_ADDCTL, 0);
|
||||
snd_soc_component_write(component, WM8900_REG_POWER1, 0);
|
||||
snd_soc_component_write(component, WM8900_REG_POWER2, 0);
|
||||
snd_soc_component_write(component, WM8900_REG_POWER3, 0);
|
||||
|
||||
/* Need to let things settle before stopping the clock
|
||||
* to ensure that restart works, see "Stopping the
|
||||
* master clock" in the datasheet. */
|
||||
schedule_timeout_interruptible(msecs_to_jiffies(1));
|
||||
snd_soc_write(codec, WM8900_REG_POWER2,
|
||||
snd_soc_component_write(component, WM8900_REG_POWER2,
|
||||
WM8900_REG_POWER2_SYSCLK_ENA);
|
||||
break;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wm8900_suspend(struct snd_soc_codec *codec)
|
||||
static int wm8900_suspend(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8900_priv *wm8900 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8900_priv *wm8900 = snd_soc_component_get_drvdata(component);
|
||||
int fll_out = wm8900->fll_out;
|
||||
int fll_in = wm8900->fll_in;
|
||||
int ret;
|
||||
|
||||
/* Stop the FLL in an orderly fashion */
|
||||
ret = wm8900_set_fll(codec, 0, 0, 0);
|
||||
ret = wm8900_set_fll(component, 0, 0, 0);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to stop FLL\n");
|
||||
dev_err(component->dev, "Failed to stop FLL\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
wm8900->fll_out = fll_out;
|
||||
wm8900->fll_in = fll_in;
|
||||
|
||||
snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF);
|
||||
snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wm8900_resume(struct snd_soc_codec *codec)
|
||||
static int wm8900_resume(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8900_priv *wm8900 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8900_priv *wm8900 = snd_soc_component_get_drvdata(component);
|
||||
int ret;
|
||||
|
||||
wm8900_reset(codec);
|
||||
wm8900_reset(component);
|
||||
|
||||
ret = regcache_sync(wm8900->regmap);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to restore cache: %d\n", ret);
|
||||
dev_err(component->dev, "Failed to restore cache: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
|
||||
|
||||
/* Restart the FLL? */
|
||||
if (wm8900->fll_out) {
|
||||
|
@ -1165,9 +1165,9 @@ static int wm8900_resume(struct snd_soc_codec *codec)
|
|||
wm8900->fll_in = 0;
|
||||
wm8900->fll_out = 0;
|
||||
|
||||
ret = wm8900_set_fll(codec, 0, fll_in, fll_out);
|
||||
ret = wm8900_set_fll(component, 0, fll_in, fll_out);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to restart FLL\n");
|
||||
dev_err(component->dev, "Failed to restart FLL\n");
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
@ -1175,53 +1175,54 @@ static int wm8900_resume(struct snd_soc_codec *codec)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int wm8900_probe(struct snd_soc_codec *codec)
|
||||
static int wm8900_probe(struct snd_soc_component *component)
|
||||
{
|
||||
int reg;
|
||||
|
||||
reg = snd_soc_read(codec, WM8900_REG_ID);
|
||||
reg = snd_soc_component_read32(component, WM8900_REG_ID);
|
||||
if (reg != 0x8900) {
|
||||
dev_err(codec->dev, "Device is not a WM8900 - ID %x\n", reg);
|
||||
dev_err(component->dev, "Device is not a WM8900 - ID %x\n", reg);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
wm8900_reset(codec);
|
||||
wm8900_reset(component);
|
||||
|
||||
/* Turn the chip on */
|
||||
snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
|
||||
|
||||
/* Latch the volume update bits */
|
||||
snd_soc_update_bits(codec, WM8900_REG_LINVOL, 0x100, 0x100);
|
||||
snd_soc_update_bits(codec, WM8900_REG_RINVOL, 0x100, 0x100);
|
||||
snd_soc_update_bits(codec, WM8900_REG_LOUT1CTL, 0x100, 0x100);
|
||||
snd_soc_update_bits(codec, WM8900_REG_ROUT1CTL, 0x100, 0x100);
|
||||
snd_soc_update_bits(codec, WM8900_REG_LOUT2CTL, 0x100, 0x100);
|
||||
snd_soc_update_bits(codec, WM8900_REG_ROUT2CTL, 0x100, 0x100);
|
||||
snd_soc_update_bits(codec, WM8900_REG_LDAC_DV, 0x100, 0x100);
|
||||
snd_soc_update_bits(codec, WM8900_REG_RDAC_DV, 0x100, 0x100);
|
||||
snd_soc_update_bits(codec, WM8900_REG_LADC_DV, 0x100, 0x100);
|
||||
snd_soc_update_bits(codec, WM8900_REG_RADC_DV, 0x100, 0x100);
|
||||
snd_soc_component_update_bits(component, WM8900_REG_LINVOL, 0x100, 0x100);
|
||||
snd_soc_component_update_bits(component, WM8900_REG_RINVOL, 0x100, 0x100);
|
||||
snd_soc_component_update_bits(component, WM8900_REG_LOUT1CTL, 0x100, 0x100);
|
||||
snd_soc_component_update_bits(component, WM8900_REG_ROUT1CTL, 0x100, 0x100);
|
||||
snd_soc_component_update_bits(component, WM8900_REG_LOUT2CTL, 0x100, 0x100);
|
||||
snd_soc_component_update_bits(component, WM8900_REG_ROUT2CTL, 0x100, 0x100);
|
||||
snd_soc_component_update_bits(component, WM8900_REG_LDAC_DV, 0x100, 0x100);
|
||||
snd_soc_component_update_bits(component, WM8900_REG_RDAC_DV, 0x100, 0x100);
|
||||
snd_soc_component_update_bits(component, WM8900_REG_LADC_DV, 0x100, 0x100);
|
||||
snd_soc_component_update_bits(component, WM8900_REG_RADC_DV, 0x100, 0x100);
|
||||
|
||||
/* Set the DAC and mixer output bias */
|
||||
snd_soc_write(codec, WM8900_REG_OUTBIASCTL, 0x81);
|
||||
snd_soc_component_write(component, WM8900_REG_OUTBIASCTL, 0x81);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct snd_soc_codec_driver soc_codec_dev_wm8900 = {
|
||||
.probe = wm8900_probe,
|
||||
.suspend = wm8900_suspend,
|
||||
.resume = wm8900_resume,
|
||||
.set_bias_level = wm8900_set_bias_level,
|
||||
|
||||
.component_driver = {
|
||||
.controls = wm8900_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(wm8900_snd_controls),
|
||||
.dapm_widgets = wm8900_dapm_widgets,
|
||||
.num_dapm_widgets = ARRAY_SIZE(wm8900_dapm_widgets),
|
||||
.dapm_routes = wm8900_dapm_routes,
|
||||
.num_dapm_routes = ARRAY_SIZE(wm8900_dapm_routes),
|
||||
},
|
||||
static const struct snd_soc_component_driver soc_component_dev_wm8900 = {
|
||||
.probe = wm8900_probe,
|
||||
.suspend = wm8900_suspend,
|
||||
.resume = wm8900_resume,
|
||||
.set_bias_level = wm8900_set_bias_level,
|
||||
.controls = wm8900_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(wm8900_snd_controls),
|
||||
.dapm_widgets = wm8900_dapm_widgets,
|
||||
.num_dapm_widgets = ARRAY_SIZE(wm8900_dapm_widgets),
|
||||
.dapm_routes = wm8900_dapm_routes,
|
||||
.num_dapm_routes = ARRAY_SIZE(wm8900_dapm_routes),
|
||||
.idle_bias_on = 1,
|
||||
.use_pmdown_time = 1,
|
||||
.endianness = 1,
|
||||
.non_legacy_dai_naming = 1,
|
||||
};
|
||||
|
||||
static const struct regmap_config wm8900_regmap = {
|
||||
|
@ -1253,15 +1254,14 @@ static int wm8900_spi_probe(struct spi_device *spi)
|
|||
|
||||
spi_set_drvdata(spi, wm8900);
|
||||
|
||||
ret = snd_soc_register_codec(&spi->dev,
|
||||
&soc_codec_dev_wm8900, &wm8900_dai, 1);
|
||||
ret = devm_snd_soc_register_component(&spi->dev,
|
||||
&soc_component_dev_wm8900, &wm8900_dai, 1);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int wm8900_spi_remove(struct spi_device *spi)
|
||||
{
|
||||
snd_soc_unregister_codec(&spi->dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -1292,15 +1292,14 @@ static int wm8900_i2c_probe(struct i2c_client *i2c,
|
|||
|
||||
i2c_set_clientdata(i2c, wm8900);
|
||||
|
||||
ret = snd_soc_register_codec(&i2c->dev,
|
||||
&soc_codec_dev_wm8900, &wm8900_dai, 1);
|
||||
ret = devm_snd_soc_register_component(&i2c->dev,
|
||||
&soc_component_dev_wm8900, &wm8900_dai, 1);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int wm8900_i2c_remove(struct i2c_client *client)
|
||||
{
|
||||
snd_soc_unregister_codec(&client->dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -270,15 +270,15 @@ static int wm8903_cp_event(struct snd_soc_dapm_widget *w,
|
|||
static int wm8903_dcs_event(struct snd_soc_dapm_widget *w,
|
||||
struct snd_kcontrol *kcontrol, int event)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
|
||||
struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
|
||||
struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
|
||||
|
||||
switch (event) {
|
||||
case SND_SOC_DAPM_POST_PMU:
|
||||
wm8903->dcs_pending |= 1 << w->shift;
|
||||
break;
|
||||
case SND_SOC_DAPM_PRE_PMD:
|
||||
snd_soc_update_bits(codec, WM8903_DC_SERVO_0,
|
||||
snd_soc_component_update_bits(component, WM8903_DC_SERVO_0,
|
||||
1 << w->shift, 0);
|
||||
break;
|
||||
}
|
||||
|
@ -289,17 +289,16 @@ static int wm8903_dcs_event(struct snd_soc_dapm_widget *w,
|
|||
#define WM8903_DCS_MODE_WRITE_STOP 0
|
||||
#define WM8903_DCS_MODE_START_STOP 2
|
||||
|
||||
static void wm8903_seq_notifier(struct snd_soc_dapm_context *dapm,
|
||||
static void wm8903_seq_notifier(struct snd_soc_component *component,
|
||||
enum snd_soc_dapm_type event, int subseq)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(dapm);
|
||||
struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
|
||||
int dcs_mode = WM8903_DCS_MODE_WRITE_STOP;
|
||||
int i, val;
|
||||
|
||||
/* Complete any pending DC servo starts */
|
||||
if (wm8903->dcs_pending) {
|
||||
dev_dbg(codec->dev, "Starting DC servo for %x\n",
|
||||
dev_dbg(component->dev, "Starting DC servo for %x\n",
|
||||
wm8903->dcs_pending);
|
||||
|
||||
/* If we've no cached values then we need to do startup */
|
||||
|
@ -308,14 +307,14 @@ static void wm8903_seq_notifier(struct snd_soc_dapm_context *dapm,
|
|||
continue;
|
||||
|
||||
if (wm8903->dcs_cache[i]) {
|
||||
dev_dbg(codec->dev,
|
||||
dev_dbg(component->dev,
|
||||
"Restore DC servo %d value %x\n",
|
||||
3 - i, wm8903->dcs_cache[i]);
|
||||
|
||||
snd_soc_write(codec, WM8903_DC_SERVO_4 + i,
|
||||
snd_soc_component_write(component, WM8903_DC_SERVO_4 + i,
|
||||
wm8903->dcs_cache[i] & 0xff);
|
||||
} else {
|
||||
dev_dbg(codec->dev,
|
||||
dev_dbg(component->dev,
|
||||
"Calibrate DC servo %d\n", 3 - i);
|
||||
dcs_mode = WM8903_DCS_MODE_START_STOP;
|
||||
}
|
||||
|
@ -325,10 +324,10 @@ static void wm8903_seq_notifier(struct snd_soc_dapm_context *dapm,
|
|||
if (wm8903->class_w_users)
|
||||
dcs_mode = WM8903_DCS_MODE_START_STOP;
|
||||
|
||||
snd_soc_update_bits(codec, WM8903_DC_SERVO_2,
|
||||
snd_soc_component_update_bits(component, WM8903_DC_SERVO_2,
|
||||
WM8903_DCS_MODE_MASK, dcs_mode);
|
||||
|
||||
snd_soc_update_bits(codec, WM8903_DC_SERVO_0,
|
||||
snd_soc_component_update_bits(component, WM8903_DC_SERVO_0,
|
||||
WM8903_DCS_ENA_MASK, wm8903->dcs_pending);
|
||||
|
||||
switch (dcs_mode) {
|
||||
|
@ -346,9 +345,9 @@ static void wm8903_seq_notifier(struct snd_soc_dapm_context *dapm,
|
|||
if (!(wm8903->dcs_pending & (1 << i)))
|
||||
continue;
|
||||
|
||||
val = snd_soc_read(codec,
|
||||
val = snd_soc_component_read32(component,
|
||||
WM8903_DC_SERVO_READBACK_1 + i);
|
||||
dev_dbg(codec->dev, "DC servo %d: %x\n",
|
||||
dev_dbg(component->dev, "DC servo %d: %x\n",
|
||||
3 - i, val);
|
||||
wm8903->dcs_cache[i] = val;
|
||||
}
|
||||
|
@ -374,18 +373,18 @@ static void wm8903_seq_notifier(struct snd_soc_dapm_context *dapm,
|
|||
static int wm8903_class_w_put(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol);
|
||||
struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
|
||||
struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
|
||||
u16 reg;
|
||||
int ret;
|
||||
|
||||
reg = snd_soc_read(codec, WM8903_CLASS_W_0);
|
||||
reg = snd_soc_component_read32(component, WM8903_CLASS_W_0);
|
||||
|
||||
/* Turn it off if we're about to enable bypass */
|
||||
if (ucontrol->value.integer.value[0]) {
|
||||
if (wm8903->class_w_users == 0) {
|
||||
dev_dbg(codec->dev, "Disabling Class W\n");
|
||||
snd_soc_write(codec, WM8903_CLASS_W_0, reg &
|
||||
dev_dbg(component->dev, "Disabling Class W\n");
|
||||
snd_soc_component_write(component, WM8903_CLASS_W_0, reg &
|
||||
~(WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V));
|
||||
}
|
||||
wm8903->class_w_users++;
|
||||
|
@ -397,14 +396,14 @@ static int wm8903_class_w_put(struct snd_kcontrol *kcontrol,
|
|||
/* If we've just disabled the last bypass path turn Class W on */
|
||||
if (!ucontrol->value.integer.value[0]) {
|
||||
if (wm8903->class_w_users == 1) {
|
||||
dev_dbg(codec->dev, "Enabling Class W\n");
|
||||
snd_soc_write(codec, WM8903_CLASS_W_0, reg |
|
||||
dev_dbg(component->dev, "Enabling Class W\n");
|
||||
snd_soc_component_write(component, WM8903_CLASS_W_0, reg |
|
||||
WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V);
|
||||
}
|
||||
wm8903->class_w_users--;
|
||||
}
|
||||
|
||||
dev_dbg(codec->dev, "Bypass use count now %d\n",
|
||||
dev_dbg(component->dev, "Bypass use count now %d\n",
|
||||
wm8903->class_w_users);
|
||||
|
||||
return ret;
|
||||
|
@ -417,9 +416,9 @@ static int wm8903_class_w_put(struct snd_kcontrol *kcontrol,
|
|||
|
||||
static int wm8903_deemph[] = { 0, 32000, 44100, 48000 };
|
||||
|
||||
static int wm8903_set_deemph(struct snd_soc_codec *codec)
|
||||
static int wm8903_set_deemph(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
|
||||
int val, i, best;
|
||||
|
||||
/* If we're using deemphasis select the nearest available sample
|
||||
|
@ -439,18 +438,18 @@ static int wm8903_set_deemph(struct snd_soc_codec *codec)
|
|||
val = 0;
|
||||
}
|
||||
|
||||
dev_dbg(codec->dev, "Set deemphasis %d (%dHz)\n",
|
||||
dev_dbg(component->dev, "Set deemphasis %d (%dHz)\n",
|
||||
best, wm8903_deemph[best]);
|
||||
|
||||
return snd_soc_update_bits(codec, WM8903_DAC_DIGITAL_1,
|
||||
return snd_soc_component_update_bits(component, WM8903_DAC_DIGITAL_1,
|
||||
WM8903_DEEMPH_MASK, val);
|
||||
}
|
||||
|
||||
static int wm8903_get_deemph(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
|
||||
struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
|
||||
struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
|
||||
|
||||
ucontrol->value.integer.value[0] = wm8903->deemph;
|
||||
|
||||
|
@ -460,8 +459,8 @@ static int wm8903_get_deemph(struct snd_kcontrol *kcontrol,
|
|||
static int wm8903_put_deemph(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
|
||||
struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
|
||||
struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
|
||||
unsigned int deemph = ucontrol->value.integer.value[0];
|
||||
int ret = 0;
|
||||
|
||||
|
@ -472,7 +471,7 @@ static int wm8903_put_deemph(struct snd_kcontrol *kcontrol,
|
|||
if (wm8903->deemph != deemph) {
|
||||
wm8903->deemph = deemph;
|
||||
|
||||
wm8903_set_deemph(codec);
|
||||
wm8903_set_deemph(component);
|
||||
|
||||
ret = 1;
|
||||
}
|
||||
|
@ -1101,7 +1100,7 @@ static const struct snd_soc_dapm_route wm8903_intercon[] = {
|
|||
{ "Right Line Output PGA", NULL, "Charge Pump" },
|
||||
};
|
||||
|
||||
static int wm8903_set_bias_level(struct snd_soc_codec *codec,
|
||||
static int wm8903_set_bias_level(struct snd_soc_component *component,
|
||||
enum snd_soc_bias_level level)
|
||||
{
|
||||
switch (level) {
|
||||
|
@ -1109,14 +1108,14 @@ static int wm8903_set_bias_level(struct snd_soc_codec *codec,
|
|||
break;
|
||||
|
||||
case SND_SOC_BIAS_PREPARE:
|
||||
snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8903_VMID_CONTROL_0,
|
||||
WM8903_VMID_RES_MASK,
|
||||
WM8903_VMID_RES_50K);
|
||||
break;
|
||||
|
||||
case SND_SOC_BIAS_STANDBY:
|
||||
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
|
||||
snd_soc_update_bits(codec, WM8903_BIAS_CONTROL_0,
|
||||
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
|
||||
snd_soc_component_update_bits(component, WM8903_BIAS_CONTROL_0,
|
||||
WM8903_POBCTRL | WM8903_ISEL_MASK |
|
||||
WM8903_STARTUP_BIAS_ENA |
|
||||
WM8903_BIAS_ENA,
|
||||
|
@ -1124,22 +1123,22 @@ static int wm8903_set_bias_level(struct snd_soc_codec *codec,
|
|||
(2 << WM8903_ISEL_SHIFT) |
|
||||
WM8903_STARTUP_BIAS_ENA);
|
||||
|
||||
snd_soc_update_bits(codec,
|
||||
snd_soc_component_update_bits(component,
|
||||
WM8903_ANALOGUE_SPK_OUTPUT_CONTROL_0,
|
||||
WM8903_SPK_DISCHARGE,
|
||||
WM8903_SPK_DISCHARGE);
|
||||
|
||||
msleep(33);
|
||||
|
||||
snd_soc_update_bits(codec, WM8903_POWER_MANAGEMENT_5,
|
||||
snd_soc_component_update_bits(component, WM8903_POWER_MANAGEMENT_5,
|
||||
WM8903_SPKL_ENA | WM8903_SPKR_ENA,
|
||||
WM8903_SPKL_ENA | WM8903_SPKR_ENA);
|
||||
|
||||
snd_soc_update_bits(codec,
|
||||
snd_soc_component_update_bits(component,
|
||||
WM8903_ANALOGUE_SPK_OUTPUT_CONTROL_0,
|
||||
WM8903_SPK_DISCHARGE, 0);
|
||||
|
||||
snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8903_VMID_CONTROL_0,
|
||||
WM8903_VMID_TIE_ENA |
|
||||
WM8903_BUFIO_ENA |
|
||||
WM8903_VMID_IO_ENA |
|
||||
|
@ -1155,57 +1154,57 @@ static int wm8903_set_bias_level(struct snd_soc_codec *codec,
|
|||
|
||||
msleep(129);
|
||||
|
||||
snd_soc_update_bits(codec, WM8903_POWER_MANAGEMENT_5,
|
||||
snd_soc_component_update_bits(component, WM8903_POWER_MANAGEMENT_5,
|
||||
WM8903_SPKL_ENA | WM8903_SPKR_ENA,
|
||||
0);
|
||||
|
||||
snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8903_VMID_CONTROL_0,
|
||||
WM8903_VMID_SOFT_MASK, 0);
|
||||
|
||||
snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8903_VMID_CONTROL_0,
|
||||
WM8903_VMID_RES_MASK,
|
||||
WM8903_VMID_RES_50K);
|
||||
|
||||
snd_soc_update_bits(codec, WM8903_BIAS_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8903_BIAS_CONTROL_0,
|
||||
WM8903_BIAS_ENA | WM8903_POBCTRL,
|
||||
WM8903_BIAS_ENA);
|
||||
|
||||
/* By default no bypass paths are enabled so
|
||||
* enable Class W support.
|
||||
*/
|
||||
dev_dbg(codec->dev, "Enabling Class W\n");
|
||||
snd_soc_update_bits(codec, WM8903_CLASS_W_0,
|
||||
dev_dbg(component->dev, "Enabling Class W\n");
|
||||
snd_soc_component_update_bits(component, WM8903_CLASS_W_0,
|
||||
WM8903_CP_DYN_FREQ |
|
||||
WM8903_CP_DYN_V,
|
||||
WM8903_CP_DYN_FREQ |
|
||||
WM8903_CP_DYN_V);
|
||||
}
|
||||
|
||||
snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8903_VMID_CONTROL_0,
|
||||
WM8903_VMID_RES_MASK,
|
||||
WM8903_VMID_RES_250K);
|
||||
break;
|
||||
|
||||
case SND_SOC_BIAS_OFF:
|
||||
snd_soc_update_bits(codec, WM8903_BIAS_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8903_BIAS_CONTROL_0,
|
||||
WM8903_BIAS_ENA, 0);
|
||||
|
||||
snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8903_VMID_CONTROL_0,
|
||||
WM8903_VMID_SOFT_MASK,
|
||||
2 << WM8903_VMID_SOFT_SHIFT);
|
||||
|
||||
snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8903_VMID_CONTROL_0,
|
||||
WM8903_VMID_BUF_ENA, 0);
|
||||
|
||||
msleep(290);
|
||||
|
||||
snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8903_VMID_CONTROL_0,
|
||||
WM8903_VMID_TIE_ENA | WM8903_BUFIO_ENA |
|
||||
WM8903_VMID_IO_ENA | WM8903_VMID_RES_MASK |
|
||||
WM8903_VMID_SOFT_MASK |
|
||||
WM8903_VMID_BUF_ENA, 0);
|
||||
|
||||
snd_soc_update_bits(codec, WM8903_BIAS_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8903_BIAS_CONTROL_0,
|
||||
WM8903_STARTUP_BIAS_ENA, 0);
|
||||
break;
|
||||
}
|
||||
|
@ -1216,8 +1215,8 @@ static int wm8903_set_bias_level(struct snd_soc_codec *codec,
|
|||
static int wm8903_set_dai_sysclk(struct snd_soc_dai *codec_dai,
|
||||
int clk_id, unsigned int freq, int dir)
|
||||
{
|
||||
struct snd_soc_codec *codec = codec_dai->codec;
|
||||
struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = codec_dai->component;
|
||||
struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
|
||||
|
||||
wm8903->sysclk = freq;
|
||||
|
||||
|
@ -1227,8 +1226,8 @@ static int wm8903_set_dai_sysclk(struct snd_soc_dai *codec_dai,
|
|||
static int wm8903_set_dai_fmt(struct snd_soc_dai *codec_dai,
|
||||
unsigned int fmt)
|
||||
{
|
||||
struct snd_soc_codec *codec = codec_dai->codec;
|
||||
u16 aif1 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_1);
|
||||
struct snd_soc_component *component = codec_dai->component;
|
||||
u16 aif1 = snd_soc_component_read32(component, WM8903_AUDIO_INTERFACE_1);
|
||||
|
||||
aif1 &= ~(WM8903_LRCLK_DIR | WM8903_BCLK_DIR | WM8903_AIF_FMT_MASK |
|
||||
WM8903_AIF_LRCLK_INV | WM8903_AIF_BCLK_INV);
|
||||
|
@ -1306,24 +1305,24 @@ static int wm8903_set_dai_fmt(struct snd_soc_dai *codec_dai,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
snd_soc_write(codec, WM8903_AUDIO_INTERFACE_1, aif1);
|
||||
snd_soc_component_write(component, WM8903_AUDIO_INTERFACE_1, aif1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wm8903_digital_mute(struct snd_soc_dai *codec_dai, int mute)
|
||||
{
|
||||
struct snd_soc_codec *codec = codec_dai->codec;
|
||||
struct snd_soc_component *component = codec_dai->component;
|
||||
u16 reg;
|
||||
|
||||
reg = snd_soc_read(codec, WM8903_DAC_DIGITAL_1);
|
||||
reg = snd_soc_component_read32(component, WM8903_DAC_DIGITAL_1);
|
||||
|
||||
if (mute)
|
||||
reg |= WM8903_DAC_MUTE;
|
||||
else
|
||||
reg &= ~WM8903_DAC_MUTE;
|
||||
|
||||
snd_soc_write(codec, WM8903_DAC_DIGITAL_1, reg);
|
||||
snd_soc_component_write(component, WM8903_DAC_DIGITAL_1, reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -1443,8 +1442,8 @@ static int wm8903_hw_params(struct snd_pcm_substream *substream,
|
|||
struct snd_pcm_hw_params *params,
|
||||
struct snd_soc_dai *dai)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = dai->component;
|
||||
struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
|
||||
int fs = params_rate(params);
|
||||
int bclk;
|
||||
int bclk_div;
|
||||
|
@ -1455,12 +1454,12 @@ static int wm8903_hw_params(struct snd_pcm_substream *substream,
|
|||
int cur_val;
|
||||
int clk_sys;
|
||||
|
||||
u16 aif1 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_1);
|
||||
u16 aif2 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_2);
|
||||
u16 aif3 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_3);
|
||||
u16 clock0 = snd_soc_read(codec, WM8903_CLOCK_RATES_0);
|
||||
u16 clock1 = snd_soc_read(codec, WM8903_CLOCK_RATES_1);
|
||||
u16 dac_digital1 = snd_soc_read(codec, WM8903_DAC_DIGITAL_1);
|
||||
u16 aif1 = snd_soc_component_read32(component, WM8903_AUDIO_INTERFACE_1);
|
||||
u16 aif2 = snd_soc_component_read32(component, WM8903_AUDIO_INTERFACE_2);
|
||||
u16 aif3 = snd_soc_component_read32(component, WM8903_AUDIO_INTERFACE_3);
|
||||
u16 clock0 = snd_soc_component_read32(component, WM8903_CLOCK_RATES_0);
|
||||
u16 clock1 = snd_soc_component_read32(component, WM8903_CLOCK_RATES_1);
|
||||
u16 dac_digital1 = snd_soc_component_read32(component, WM8903_DAC_DIGITAL_1);
|
||||
|
||||
/* Enable sloping stopband filter for low sample rates */
|
||||
if (fs <= 24000)
|
||||
|
@ -1479,7 +1478,7 @@ static int wm8903_hw_params(struct snd_pcm_substream *substream,
|
|||
}
|
||||
}
|
||||
|
||||
dev_dbg(codec->dev, "DSP fs = %dHz\n", sample_rates[dsp_config].rate);
|
||||
dev_dbg(component->dev, "DSP fs = %dHz\n", sample_rates[dsp_config].rate);
|
||||
clock1 &= ~WM8903_SAMPLE_RATE_MASK;
|
||||
clock1 |= sample_rates[dsp_config].value;
|
||||
|
||||
|
@ -1505,7 +1504,7 @@ static int wm8903_hw_params(struct snd_pcm_substream *substream,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
dev_dbg(codec->dev, "MCLK = %dHz, target sample rate = %dHz\n",
|
||||
dev_dbg(component->dev, "MCLK = %dHz, target sample rate = %dHz\n",
|
||||
wm8903->sysclk, fs);
|
||||
|
||||
/* We may not have an MCLK which allows us to generate exactly
|
||||
|
@ -1540,12 +1539,12 @@ static int wm8903_hw_params(struct snd_pcm_substream *substream,
|
|||
clock1 |= clk_sys_ratios[clk_config].rate << WM8903_CLK_SYS_RATE_SHIFT;
|
||||
clock1 |= clk_sys_ratios[clk_config].mode << WM8903_CLK_SYS_MODE_SHIFT;
|
||||
|
||||
dev_dbg(codec->dev, "CLK_SYS_RATE=%x, CLK_SYS_MODE=%x div=%d\n",
|
||||
dev_dbg(component->dev, "CLK_SYS_RATE=%x, CLK_SYS_MODE=%x div=%d\n",
|
||||
clk_sys_ratios[clk_config].rate,
|
||||
clk_sys_ratios[clk_config].mode,
|
||||
clk_sys_ratios[clk_config].div);
|
||||
|
||||
dev_dbg(codec->dev, "Actual CLK_SYS = %dHz\n", clk_sys);
|
||||
dev_dbg(component->dev, "Actual CLK_SYS = %dHz\n", clk_sys);
|
||||
|
||||
/* We may not get quite the right frequency if using
|
||||
* approximate clocks so look for the closest match that is
|
||||
|
@ -1567,7 +1566,7 @@ static int wm8903_hw_params(struct snd_pcm_substream *substream,
|
|||
aif2 &= ~WM8903_BCLK_DIV_MASK;
|
||||
aif3 &= ~WM8903_LRCLK_RATE_MASK;
|
||||
|
||||
dev_dbg(codec->dev, "BCLK ratio %d for %dHz - actual BCLK = %dHz\n",
|
||||
dev_dbg(component->dev, "BCLK ratio %d for %dHz - actual BCLK = %dHz\n",
|
||||
bclk_divs[bclk_div].ratio / 10, bclk,
|
||||
(clk_sys * 10) / bclk_divs[bclk_div].ratio);
|
||||
|
||||
|
@ -1575,14 +1574,14 @@ static int wm8903_hw_params(struct snd_pcm_substream *substream,
|
|||
aif3 |= bclk / fs;
|
||||
|
||||
wm8903->fs = params_rate(params);
|
||||
wm8903_set_deemph(codec);
|
||||
wm8903_set_deemph(component);
|
||||
|
||||
snd_soc_write(codec, WM8903_CLOCK_RATES_0, clock0);
|
||||
snd_soc_write(codec, WM8903_CLOCK_RATES_1, clock1);
|
||||
snd_soc_write(codec, WM8903_AUDIO_INTERFACE_1, aif1);
|
||||
snd_soc_write(codec, WM8903_AUDIO_INTERFACE_2, aif2);
|
||||
snd_soc_write(codec, WM8903_AUDIO_INTERFACE_3, aif3);
|
||||
snd_soc_write(codec, WM8903_DAC_DIGITAL_1, dac_digital1);
|
||||
snd_soc_component_write(component, WM8903_CLOCK_RATES_0, clock0);
|
||||
snd_soc_component_write(component, WM8903_CLOCK_RATES_1, clock1);
|
||||
snd_soc_component_write(component, WM8903_AUDIO_INTERFACE_1, aif1);
|
||||
snd_soc_component_write(component, WM8903_AUDIO_INTERFACE_2, aif2);
|
||||
snd_soc_component_write(component, WM8903_AUDIO_INTERFACE_3, aif3);
|
||||
snd_soc_component_write(component, WM8903_DAC_DIGITAL_1, dac_digital1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -1590,7 +1589,7 @@ static int wm8903_hw_params(struct snd_pcm_substream *substream,
|
|||
/**
|
||||
* wm8903_mic_detect - Enable microphone detection via the WM8903 IRQ
|
||||
*
|
||||
* @codec: WM8903 codec
|
||||
* @component: WM8903 component
|
||||
* @jack: jack to report detection events on
|
||||
* @det: value to report for presence detection
|
||||
* @shrt: value to report for short detection
|
||||
|
@ -1604,13 +1603,13 @@ static int wm8903_hw_params(struct snd_pcm_substream *substream,
|
|||
* micdet_cfg in the platform data. Using this function will force on
|
||||
* the microphone bias for the device.
|
||||
*/
|
||||
int wm8903_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack,
|
||||
int wm8903_mic_detect(struct snd_soc_component *component, struct snd_soc_jack *jack,
|
||||
int det, int shrt)
|
||||
{
|
||||
struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
|
||||
int irq_mask = WM8903_MICDET_EINT | WM8903_MICSHRT_EINT;
|
||||
|
||||
dev_dbg(codec->dev, "Enabling microphone detection: %x %x\n",
|
||||
dev_dbg(component->dev, "Enabling microphone detection: %x %x\n",
|
||||
det, shrt);
|
||||
|
||||
/* Store the configuration */
|
||||
|
@ -1624,19 +1623,19 @@ int wm8903_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack,
|
|||
if (shrt)
|
||||
irq_mask &= ~WM8903_MICSHRT_EINT;
|
||||
|
||||
snd_soc_update_bits(codec, WM8903_INTERRUPT_STATUS_1_MASK,
|
||||
snd_soc_component_update_bits(component, WM8903_INTERRUPT_STATUS_1_MASK,
|
||||
WM8903_MICDET_EINT | WM8903_MICSHRT_EINT,
|
||||
irq_mask);
|
||||
|
||||
if (det || shrt) {
|
||||
/* Enable mic detection, this may not have been set through
|
||||
* platform data (eg, if the defaults are OK). */
|
||||
snd_soc_update_bits(codec, WM8903_WRITE_SEQUENCER_0,
|
||||
snd_soc_component_update_bits(component, WM8903_WRITE_SEQUENCER_0,
|
||||
WM8903_WSEQ_ENA, WM8903_WSEQ_ENA);
|
||||
snd_soc_update_bits(codec, WM8903_MIC_BIAS_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8903_MIC_BIAS_CONTROL_0,
|
||||
WM8903_MICDET_ENA, WM8903_MICDET_ENA);
|
||||
} else {
|
||||
snd_soc_update_bits(codec, WM8903_MIC_BIAS_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8903_MIC_BIAS_CONTROL_0,
|
||||
WM8903_MICDET_ENA, 0);
|
||||
}
|
||||
|
||||
|
@ -1766,9 +1765,9 @@ static struct snd_soc_dai_driver wm8903_dai = {
|
|||
.symmetric_rates = 1,
|
||||
};
|
||||
|
||||
static int wm8903_resume(struct snd_soc_codec *codec)
|
||||
static int wm8903_resume(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
|
||||
|
||||
regcache_sync(wm8903->regmap);
|
||||
|
||||
|
@ -1884,20 +1883,21 @@ static void wm8903_free_gpio(struct wm8903_priv *wm8903)
|
|||
}
|
||||
#endif
|
||||
|
||||
static const struct snd_soc_codec_driver soc_codec_dev_wm8903 = {
|
||||
.resume = wm8903_resume,
|
||||
.set_bias_level = wm8903_set_bias_level,
|
||||
.seq_notifier = wm8903_seq_notifier,
|
||||
.suspend_bias_off = true,
|
||||
|
||||
.component_driver = {
|
||||
.controls = wm8903_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(wm8903_snd_controls),
|
||||
.dapm_widgets = wm8903_dapm_widgets,
|
||||
.num_dapm_widgets = ARRAY_SIZE(wm8903_dapm_widgets),
|
||||
.dapm_routes = wm8903_intercon,
|
||||
.num_dapm_routes = ARRAY_SIZE(wm8903_intercon),
|
||||
},
|
||||
static const struct snd_soc_component_driver soc_component_dev_wm8903 = {
|
||||
.resume = wm8903_resume,
|
||||
.set_bias_level = wm8903_set_bias_level,
|
||||
.seq_notifier = wm8903_seq_notifier,
|
||||
.controls = wm8903_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(wm8903_snd_controls),
|
||||
.dapm_widgets = wm8903_dapm_widgets,
|
||||
.num_dapm_widgets = ARRAY_SIZE(wm8903_dapm_widgets),
|
||||
.dapm_routes = wm8903_intercon,
|
||||
.num_dapm_routes = ARRAY_SIZE(wm8903_intercon),
|
||||
.suspend_bias_off = 1,
|
||||
.idle_bias_on = 1,
|
||||
.use_pmdown_time = 1,
|
||||
.endianness = 1,
|
||||
.non_legacy_dai_naming = 1,
|
||||
};
|
||||
|
||||
static const struct regmap_config wm8903_regmap = {
|
||||
|
@ -2176,8 +2176,8 @@ static int wm8903_i2c_probe(struct i2c_client *i2c,
|
|||
WM8903_DAC_MUTEMODE | WM8903_DAC_MUTE,
|
||||
WM8903_DAC_MUTEMODE | WM8903_DAC_MUTE);
|
||||
|
||||
ret = snd_soc_register_codec(&i2c->dev,
|
||||
&soc_codec_dev_wm8903, &wm8903_dai, 1);
|
||||
ret = devm_snd_soc_register_component(&i2c->dev,
|
||||
&soc_component_dev_wm8903, &wm8903_dai, 1);
|
||||
if (ret != 0)
|
||||
goto err;
|
||||
|
||||
|
@ -2197,7 +2197,6 @@ static int wm8903_i2c_remove(struct i2c_client *client)
|
|||
if (client->irq)
|
||||
free_irq(client->irq, wm8903);
|
||||
wm8903_free_gpio(wm8903);
|
||||
snd_soc_unregister_codec(&client->dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -15,7 +15,7 @@
|
|||
|
||||
#include <linux/i2c.h>
|
||||
|
||||
extern int wm8903_mic_detect(struct snd_soc_codec *codec,
|
||||
extern int wm8903_mic_detect(struct snd_soc_component *component,
|
||||
struct snd_soc_jack *jack,
|
||||
int det, int shrt);
|
||||
|
||||
|
|
|
@ -316,31 +316,31 @@ static bool wm8904_readable_register(struct device *dev, unsigned int reg)
|
|||
}
|
||||
}
|
||||
|
||||
static int wm8904_configure_clocking(struct snd_soc_codec *codec)
|
||||
static int wm8904_configure_clocking(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
unsigned int clock0, clock2, rate;
|
||||
|
||||
/* Gate the clock while we're updating to avoid misclocking */
|
||||
clock2 = snd_soc_read(codec, WM8904_CLOCK_RATES_2);
|
||||
snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2,
|
||||
clock2 = snd_soc_component_read32(component, WM8904_CLOCK_RATES_2);
|
||||
snd_soc_component_update_bits(component, WM8904_CLOCK_RATES_2,
|
||||
WM8904_SYSCLK_SRC, 0);
|
||||
|
||||
/* This should be done on init() for bypass paths */
|
||||
switch (wm8904->sysclk_src) {
|
||||
case WM8904_CLK_MCLK:
|
||||
dev_dbg(codec->dev, "Using %dHz MCLK\n", wm8904->mclk_rate);
|
||||
dev_dbg(component->dev, "Using %dHz MCLK\n", wm8904->mclk_rate);
|
||||
|
||||
clock2 &= ~WM8904_SYSCLK_SRC;
|
||||
rate = wm8904->mclk_rate;
|
||||
|
||||
/* Ensure the FLL is stopped */
|
||||
snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1,
|
||||
snd_soc_component_update_bits(component, WM8904_FLL_CONTROL_1,
|
||||
WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0);
|
||||
break;
|
||||
|
||||
case WM8904_CLK_FLL:
|
||||
dev_dbg(codec->dev, "Using %dHz FLL clock\n",
|
||||
dev_dbg(component->dev, "Using %dHz FLL clock\n",
|
||||
wm8904->fll_fout);
|
||||
|
||||
clock2 |= WM8904_SYSCLK_SRC;
|
||||
|
@ -348,7 +348,7 @@ static int wm8904_configure_clocking(struct snd_soc_codec *codec)
|
|||
break;
|
||||
|
||||
default:
|
||||
dev_err(codec->dev, "System clock not configured\n");
|
||||
dev_err(component->dev, "System clock not configured\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
@ -361,40 +361,40 @@ static int wm8904_configure_clocking(struct snd_soc_codec *codec)
|
|||
wm8904->sysclk_rate = rate;
|
||||
}
|
||||
|
||||
snd_soc_update_bits(codec, WM8904_CLOCK_RATES_0, WM8904_MCLK_DIV,
|
||||
snd_soc_component_update_bits(component, WM8904_CLOCK_RATES_0, WM8904_MCLK_DIV,
|
||||
clock0);
|
||||
|
||||
snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2,
|
||||
snd_soc_component_update_bits(component, WM8904_CLOCK_RATES_2,
|
||||
WM8904_CLK_SYS_ENA | WM8904_SYSCLK_SRC, clock2);
|
||||
|
||||
dev_dbg(codec->dev, "CLK_SYS is %dHz\n", wm8904->sysclk_rate);
|
||||
dev_dbg(component->dev, "CLK_SYS is %dHz\n", wm8904->sysclk_rate);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void wm8904_set_drc(struct snd_soc_codec *codec)
|
||||
static void wm8904_set_drc(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
struct wm8904_pdata *pdata = wm8904->pdata;
|
||||
int save, i;
|
||||
|
||||
/* Save any enables; the configuration should clear them. */
|
||||
save = snd_soc_read(codec, WM8904_DRC_0);
|
||||
save = snd_soc_component_read32(component, WM8904_DRC_0);
|
||||
|
||||
for (i = 0; i < WM8904_DRC_REGS; i++)
|
||||
snd_soc_update_bits(codec, WM8904_DRC_0 + i, 0xffff,
|
||||
snd_soc_component_update_bits(component, WM8904_DRC_0 + i, 0xffff,
|
||||
pdata->drc_cfgs[wm8904->drc_cfg].regs[i]);
|
||||
|
||||
/* Reenable the DRC */
|
||||
snd_soc_update_bits(codec, WM8904_DRC_0,
|
||||
snd_soc_component_update_bits(component, WM8904_DRC_0,
|
||||
WM8904_DRC_ENA | WM8904_DRC_DAC_PATH, save);
|
||||
}
|
||||
|
||||
static int wm8904_put_drc_enum(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
struct wm8904_pdata *pdata = wm8904->pdata;
|
||||
int value = ucontrol->value.enumerated.item[0];
|
||||
|
||||
|
@ -403,7 +403,7 @@ static int wm8904_put_drc_enum(struct snd_kcontrol *kcontrol,
|
|||
|
||||
wm8904->drc_cfg = value;
|
||||
|
||||
wm8904_set_drc(codec);
|
||||
wm8904_set_drc(component);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -411,17 +411,17 @@ static int wm8904_put_drc_enum(struct snd_kcontrol *kcontrol,
|
|||
static int wm8904_get_drc_enum(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
|
||||
ucontrol->value.enumerated.item[0] = wm8904->drc_cfg;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void wm8904_set_retune_mobile(struct snd_soc_codec *codec)
|
||||
static void wm8904_set_retune_mobile(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
struct wm8904_pdata *pdata = wm8904->pdata;
|
||||
int best, best_val, save, i, cfg;
|
||||
|
||||
|
@ -444,7 +444,7 @@ static void wm8904_set_retune_mobile(struct snd_soc_codec *codec)
|
|||
}
|
||||
}
|
||||
|
||||
dev_dbg(codec->dev, "ReTune Mobile %s/%dHz for %dHz sample rate\n",
|
||||
dev_dbg(component->dev, "ReTune Mobile %s/%dHz for %dHz sample rate\n",
|
||||
pdata->retune_mobile_cfgs[best].name,
|
||||
pdata->retune_mobile_cfgs[best].rate,
|
||||
wm8904->fs);
|
||||
|
@ -452,20 +452,20 @@ static void wm8904_set_retune_mobile(struct snd_soc_codec *codec)
|
|||
/* The EQ will be disabled while reconfiguring it, remember the
|
||||
* current configuration.
|
||||
*/
|
||||
save = snd_soc_read(codec, WM8904_EQ1);
|
||||
save = snd_soc_component_read32(component, WM8904_EQ1);
|
||||
|
||||
for (i = 0; i < WM8904_EQ_REGS; i++)
|
||||
snd_soc_update_bits(codec, WM8904_EQ1 + i, 0xffff,
|
||||
snd_soc_component_update_bits(component, WM8904_EQ1 + i, 0xffff,
|
||||
pdata->retune_mobile_cfgs[best].regs[i]);
|
||||
|
||||
snd_soc_update_bits(codec, WM8904_EQ1, WM8904_EQ_ENA, save);
|
||||
snd_soc_component_update_bits(component, WM8904_EQ1, WM8904_EQ_ENA, save);
|
||||
}
|
||||
|
||||
static int wm8904_put_retune_mobile_enum(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
struct wm8904_pdata *pdata = wm8904->pdata;
|
||||
int value = ucontrol->value.enumerated.item[0];
|
||||
|
||||
|
@ -474,7 +474,7 @@ static int wm8904_put_retune_mobile_enum(struct snd_kcontrol *kcontrol,
|
|||
|
||||
wm8904->retune_mobile_cfg = value;
|
||||
|
||||
wm8904_set_retune_mobile(codec);
|
||||
wm8904_set_retune_mobile(component);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -482,8 +482,8 @@ static int wm8904_put_retune_mobile_enum(struct snd_kcontrol *kcontrol,
|
|||
static int wm8904_get_retune_mobile_enum(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
|
||||
ucontrol->value.enumerated.item[0] = wm8904->retune_mobile_cfg;
|
||||
|
||||
|
@ -492,9 +492,9 @@ static int wm8904_get_retune_mobile_enum(struct snd_kcontrol *kcontrol,
|
|||
|
||||
static int deemph_settings[] = { 0, 32000, 44100, 48000 };
|
||||
|
||||
static int wm8904_set_deemph(struct snd_soc_codec *codec)
|
||||
static int wm8904_set_deemph(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
int val, i, best;
|
||||
|
||||
/* If we're using deemphasis select the nearest available sample
|
||||
|
@ -513,17 +513,17 @@ static int wm8904_set_deemph(struct snd_soc_codec *codec)
|
|||
val = 0;
|
||||
}
|
||||
|
||||
dev_dbg(codec->dev, "Set deemphasis %d\n", val);
|
||||
dev_dbg(component->dev, "Set deemphasis %d\n", val);
|
||||
|
||||
return snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_1,
|
||||
return snd_soc_component_update_bits(component, WM8904_DAC_DIGITAL_1,
|
||||
WM8904_DEEMPH_MASK, val);
|
||||
}
|
||||
|
||||
static int wm8904_get_deemph(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
|
||||
ucontrol->value.integer.value[0] = wm8904->deemph;
|
||||
return 0;
|
||||
|
@ -532,8 +532,8 @@ static int wm8904_get_deemph(struct snd_kcontrol *kcontrol,
|
|||
static int wm8904_put_deemph(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
unsigned int deemph = ucontrol->value.integer.value[0];
|
||||
|
||||
if (deemph > 1)
|
||||
|
@ -541,7 +541,7 @@ static int wm8904_put_deemph(struct snd_kcontrol *kcontrol,
|
|||
|
||||
wm8904->deemph = deemph;
|
||||
|
||||
return wm8904_set_deemph(codec);
|
||||
return wm8904_set_deemph(component);
|
||||
}
|
||||
|
||||
static const DECLARE_TLV_DB_SCALE(dac_boost_tlv, 0, 600, 0);
|
||||
|
@ -572,7 +572,7 @@ static SOC_ENUM_SINGLE_DECL(hpf_mode, WM8904_ADC_DIGITAL_0, 5,
|
|||
static int wm8904_adc_osr_put(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
|
||||
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
|
||||
unsigned int val;
|
||||
int ret;
|
||||
|
||||
|
@ -585,7 +585,7 @@ static int wm8904_adc_osr_put(struct snd_kcontrol *kcontrol,
|
|||
else
|
||||
val = WM8904_ADC_128_OSR_TST_MODE | WM8904_ADC_BIASX1P5;
|
||||
|
||||
snd_soc_update_bits(codec, WM8904_ADC_TEST_0,
|
||||
snd_soc_component_update_bits(component, WM8904_ADC_TEST_0,
|
||||
WM8904_ADC_128_OSR_TST_MODE | WM8904_ADC_BIASX1P5,
|
||||
val);
|
||||
|
||||
|
@ -673,8 +673,8 @@ static int cp_event(struct snd_soc_dapm_widget *w,
|
|||
static int sysclk_event(struct snd_soc_dapm_widget *w,
|
||||
struct snd_kcontrol *kcontrol, int event)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
|
||||
switch (event) {
|
||||
case SND_SOC_DAPM_PRE_PMU:
|
||||
|
@ -685,11 +685,11 @@ static int sysclk_event(struct snd_soc_dapm_widget *w,
|
|||
*/
|
||||
switch (wm8904->sysclk_src) {
|
||||
case WM8904_CLK_FLL:
|
||||
snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1,
|
||||
snd_soc_component_update_bits(component, WM8904_FLL_CONTROL_1,
|
||||
WM8904_FLL_OSC_ENA,
|
||||
WM8904_FLL_OSC_ENA);
|
||||
|
||||
snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1,
|
||||
snd_soc_component_update_bits(component, WM8904_FLL_CONTROL_1,
|
||||
WM8904_FLL_ENA,
|
||||
WM8904_FLL_ENA);
|
||||
break;
|
||||
|
@ -700,7 +700,7 @@ static int sysclk_event(struct snd_soc_dapm_widget *w,
|
|||
break;
|
||||
|
||||
case SND_SOC_DAPM_POST_PMD:
|
||||
snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1,
|
||||
snd_soc_component_update_bits(component, WM8904_FLL_CONTROL_1,
|
||||
WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0);
|
||||
break;
|
||||
}
|
||||
|
@ -711,8 +711,8 @@ static int sysclk_event(struct snd_soc_dapm_widget *w,
|
|||
static int out_pga_event(struct snd_soc_dapm_widget *w,
|
||||
struct snd_kcontrol *kcontrol, int event)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
int reg, val;
|
||||
int dcs_mask;
|
||||
int dcs_l, dcs_r;
|
||||
|
@ -751,43 +751,43 @@ static int out_pga_event(struct snd_soc_dapm_widget *w,
|
|||
switch (event) {
|
||||
case SND_SOC_DAPM_PRE_PMU:
|
||||
/* Power on the PGAs */
|
||||
snd_soc_update_bits(codec, pwr_reg,
|
||||
snd_soc_component_update_bits(component, pwr_reg,
|
||||
WM8904_HPL_PGA_ENA | WM8904_HPR_PGA_ENA,
|
||||
WM8904_HPL_PGA_ENA | WM8904_HPR_PGA_ENA);
|
||||
|
||||
/* Power on the amplifier */
|
||||
snd_soc_update_bits(codec, reg,
|
||||
snd_soc_component_update_bits(component, reg,
|
||||
WM8904_HPL_ENA | WM8904_HPR_ENA,
|
||||
WM8904_HPL_ENA | WM8904_HPR_ENA);
|
||||
|
||||
|
||||
/* Enable the first stage */
|
||||
snd_soc_update_bits(codec, reg,
|
||||
snd_soc_component_update_bits(component, reg,
|
||||
WM8904_HPL_ENA_DLY | WM8904_HPR_ENA_DLY,
|
||||
WM8904_HPL_ENA_DLY | WM8904_HPR_ENA_DLY);
|
||||
|
||||
/* Power up the DC servo */
|
||||
snd_soc_update_bits(codec, WM8904_DC_SERVO_0,
|
||||
snd_soc_component_update_bits(component, WM8904_DC_SERVO_0,
|
||||
dcs_mask, dcs_mask);
|
||||
|
||||
/* Either calibrate the DC servo or restore cached state
|
||||
* if we have that.
|
||||
*/
|
||||
if (wm8904->dcs_state[dcs_l] || wm8904->dcs_state[dcs_r]) {
|
||||
dev_dbg(codec->dev, "Restoring DC servo state\n");
|
||||
dev_dbg(component->dev, "Restoring DC servo state\n");
|
||||
|
||||
snd_soc_write(codec, dcs_l_reg,
|
||||
snd_soc_component_write(component, dcs_l_reg,
|
||||
wm8904->dcs_state[dcs_l]);
|
||||
snd_soc_write(codec, dcs_r_reg,
|
||||
snd_soc_component_write(component, dcs_r_reg,
|
||||
wm8904->dcs_state[dcs_r]);
|
||||
|
||||
snd_soc_write(codec, WM8904_DC_SERVO_1, dcs_mask);
|
||||
snd_soc_component_write(component, WM8904_DC_SERVO_1, dcs_mask);
|
||||
|
||||
timeout = 20;
|
||||
} else {
|
||||
dev_dbg(codec->dev, "Calibrating DC servo\n");
|
||||
dev_dbg(component->dev, "Calibrating DC servo\n");
|
||||
|
||||
snd_soc_write(codec, WM8904_DC_SERVO_1,
|
||||
snd_soc_component_write(component, WM8904_DC_SERVO_1,
|
||||
dcs_mask << WM8904_DCS_TRIG_STARTUP_0_SHIFT);
|
||||
|
||||
timeout = 500;
|
||||
|
@ -796,7 +796,7 @@ static int out_pga_event(struct snd_soc_dapm_widget *w,
|
|||
/* Wait for DC servo to complete */
|
||||
dcs_mask <<= WM8904_DCS_CAL_COMPLETE_SHIFT;
|
||||
do {
|
||||
val = snd_soc_read(codec, WM8904_DC_SERVO_READBACK_0);
|
||||
val = snd_soc_component_read32(component, WM8904_DC_SERVO_READBACK_0);
|
||||
if ((val & dcs_mask) == dcs_mask)
|
||||
break;
|
||||
|
||||
|
@ -804,19 +804,19 @@ static int out_pga_event(struct snd_soc_dapm_widget *w,
|
|||
} while (--timeout);
|
||||
|
||||
if ((val & dcs_mask) != dcs_mask)
|
||||
dev_warn(codec->dev, "DC servo timed out\n");
|
||||
dev_warn(component->dev, "DC servo timed out\n");
|
||||
else
|
||||
dev_dbg(codec->dev, "DC servo ready\n");
|
||||
dev_dbg(component->dev, "DC servo ready\n");
|
||||
|
||||
/* Enable the output stage */
|
||||
snd_soc_update_bits(codec, reg,
|
||||
snd_soc_component_update_bits(component, reg,
|
||||
WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP,
|
||||
WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP);
|
||||
break;
|
||||
|
||||
case SND_SOC_DAPM_POST_PMU:
|
||||
/* Unshort the output itself */
|
||||
snd_soc_update_bits(codec, reg,
|
||||
snd_soc_component_update_bits(component, reg,
|
||||
WM8904_HPL_RMV_SHORT |
|
||||
WM8904_HPR_RMV_SHORT,
|
||||
WM8904_HPL_RMV_SHORT |
|
||||
|
@ -826,7 +826,7 @@ static int out_pga_event(struct snd_soc_dapm_widget *w,
|
|||
|
||||
case SND_SOC_DAPM_PRE_PMD:
|
||||
/* Short the output */
|
||||
snd_soc_update_bits(codec, reg,
|
||||
snd_soc_component_update_bits(component, reg,
|
||||
WM8904_HPL_RMV_SHORT |
|
||||
WM8904_HPR_RMV_SHORT, 0);
|
||||
break;
|
||||
|
@ -834,21 +834,21 @@ static int out_pga_event(struct snd_soc_dapm_widget *w,
|
|||
case SND_SOC_DAPM_POST_PMD:
|
||||
/* Cache the DC servo configuration; this will be
|
||||
* invalidated if we change the configuration. */
|
||||
wm8904->dcs_state[dcs_l] = snd_soc_read(codec, dcs_l_reg);
|
||||
wm8904->dcs_state[dcs_r] = snd_soc_read(codec, dcs_r_reg);
|
||||
wm8904->dcs_state[dcs_l] = snd_soc_component_read32(component, dcs_l_reg);
|
||||
wm8904->dcs_state[dcs_r] = snd_soc_component_read32(component, dcs_r_reg);
|
||||
|
||||
snd_soc_update_bits(codec, WM8904_DC_SERVO_0,
|
||||
snd_soc_component_update_bits(component, WM8904_DC_SERVO_0,
|
||||
dcs_mask, 0);
|
||||
|
||||
/* Disable the amplifier input and output stages */
|
||||
snd_soc_update_bits(codec, reg,
|
||||
snd_soc_component_update_bits(component, reg,
|
||||
WM8904_HPL_ENA | WM8904_HPR_ENA |
|
||||
WM8904_HPL_ENA_DLY | WM8904_HPR_ENA_DLY |
|
||||
WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP,
|
||||
0);
|
||||
|
||||
/* PGAs too */
|
||||
snd_soc_update_bits(codec, pwr_reg,
|
||||
snd_soc_component_update_bits(component, pwr_reg,
|
||||
WM8904_HPL_PGA_ENA | WM8904_HPR_PGA_ENA,
|
||||
0);
|
||||
break;
|
||||
|
@ -1165,10 +1165,10 @@ static const struct snd_soc_dapm_route wm8912_intercon[] = {
|
|||
{ "LINER PGA", NULL, "DACR" },
|
||||
};
|
||||
|
||||
static int wm8904_add_widgets(struct snd_soc_codec *codec)
|
||||
static int wm8904_add_widgets(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
|
||||
|
||||
snd_soc_dapm_new_controls(dapm, wm8904_core_dapm_widgets,
|
||||
ARRAY_SIZE(wm8904_core_dapm_widgets));
|
||||
|
@ -1177,11 +1177,11 @@ static int wm8904_add_widgets(struct snd_soc_codec *codec)
|
|||
|
||||
switch (wm8904->devtype) {
|
||||
case WM8904:
|
||||
snd_soc_add_codec_controls(codec, wm8904_adc_snd_controls,
|
||||
snd_soc_add_component_controls(component, wm8904_adc_snd_controls,
|
||||
ARRAY_SIZE(wm8904_adc_snd_controls));
|
||||
snd_soc_add_codec_controls(codec, wm8904_dac_snd_controls,
|
||||
snd_soc_add_component_controls(component, wm8904_dac_snd_controls,
|
||||
ARRAY_SIZE(wm8904_dac_snd_controls));
|
||||
snd_soc_add_codec_controls(codec, wm8904_snd_controls,
|
||||
snd_soc_add_component_controls(component, wm8904_snd_controls,
|
||||
ARRAY_SIZE(wm8904_snd_controls));
|
||||
|
||||
snd_soc_dapm_new_controls(dapm, wm8904_adc_dapm_widgets,
|
||||
|
@ -1200,7 +1200,7 @@ static int wm8904_add_widgets(struct snd_soc_codec *codec)
|
|||
break;
|
||||
|
||||
case WM8912:
|
||||
snd_soc_add_codec_controls(codec, wm8904_dac_snd_controls,
|
||||
snd_soc_add_component_controls(component, wm8904_dac_snd_controls,
|
||||
ARRAY_SIZE(wm8904_dac_snd_controls));
|
||||
|
||||
snd_soc_dapm_new_controls(dapm, wm8904_dac_dapm_widgets,
|
||||
|
@ -1278,8 +1278,8 @@ static int wm8904_hw_params(struct snd_pcm_substream *substream,
|
|||
struct snd_pcm_hw_params *params,
|
||||
struct snd_soc_dai *dai)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = dai->component;
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
int ret, i, best, best_val, cur_val;
|
||||
unsigned int aif1 = 0;
|
||||
unsigned int aif2 = 0;
|
||||
|
@ -1290,7 +1290,7 @@ static int wm8904_hw_params(struct snd_pcm_substream *substream,
|
|||
/* What BCLK do we need? */
|
||||
wm8904->fs = params_rate(params);
|
||||
if (wm8904->tdm_slots) {
|
||||
dev_dbg(codec->dev, "Configuring for %d %d bit TDM slots\n",
|
||||
dev_dbg(component->dev, "Configuring for %d %d bit TDM slots\n",
|
||||
wm8904->tdm_slots, wm8904->tdm_width);
|
||||
wm8904->bclk = snd_soc_calc_bclk(wm8904->fs,
|
||||
wm8904->tdm_width, 2,
|
||||
|
@ -1316,9 +1316,9 @@ static int wm8904_hw_params(struct snd_pcm_substream *substream,
|
|||
}
|
||||
|
||||
|
||||
dev_dbg(codec->dev, "Target BCLK is %dHz\n", wm8904->bclk);
|
||||
dev_dbg(component->dev, "Target BCLK is %dHz\n", wm8904->bclk);
|
||||
|
||||
ret = wm8904_configure_clocking(codec);
|
||||
ret = wm8904_configure_clocking(component);
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
|
@ -1334,7 +1334,7 @@ static int wm8904_hw_params(struct snd_pcm_substream *substream,
|
|||
best_val = cur_val;
|
||||
}
|
||||
}
|
||||
dev_dbg(codec->dev, "Selected CLK_SYS_RATIO of %d\n",
|
||||
dev_dbg(component->dev, "Selected CLK_SYS_RATIO of %d\n",
|
||||
clk_sys_rates[best].ratio);
|
||||
clock1 |= (clk_sys_rates[best].clk_sys_rate
|
||||
<< WM8904_CLK_SYS_RATE_SHIFT);
|
||||
|
@ -1350,7 +1350,7 @@ static int wm8904_hw_params(struct snd_pcm_substream *substream,
|
|||
best_val = cur_val;
|
||||
}
|
||||
}
|
||||
dev_dbg(codec->dev, "Selected SAMPLE_RATE of %dHz\n",
|
||||
dev_dbg(component->dev, "Selected SAMPLE_RATE of %dHz\n",
|
||||
sample_rates[best].rate);
|
||||
clock1 |= (sample_rates[best].sample_rate
|
||||
<< WM8904_SAMPLE_RATE_SHIFT);
|
||||
|
@ -1373,30 +1373,30 @@ static int wm8904_hw_params(struct snd_pcm_substream *substream,
|
|||
}
|
||||
}
|
||||
wm8904->bclk = (wm8904->sysclk_rate * 10) / bclk_divs[best].div;
|
||||
dev_dbg(codec->dev, "Selected BCLK_DIV of %d for %dHz BCLK\n",
|
||||
dev_dbg(component->dev, "Selected BCLK_DIV of %d for %dHz BCLK\n",
|
||||
bclk_divs[best].div, wm8904->bclk);
|
||||
aif2 |= bclk_divs[best].bclk_div;
|
||||
|
||||
/* LRCLK is a simple fraction of BCLK */
|
||||
dev_dbg(codec->dev, "LRCLK_RATE is %d\n", wm8904->bclk / wm8904->fs);
|
||||
dev_dbg(component->dev, "LRCLK_RATE is %d\n", wm8904->bclk / wm8904->fs);
|
||||
aif3 |= wm8904->bclk / wm8904->fs;
|
||||
|
||||
/* Apply the settings */
|
||||
snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_1,
|
||||
snd_soc_component_update_bits(component, WM8904_DAC_DIGITAL_1,
|
||||
WM8904_DAC_SB_FILT, dac_digital1);
|
||||
snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_1,
|
||||
snd_soc_component_update_bits(component, WM8904_AUDIO_INTERFACE_1,
|
||||
WM8904_AIF_WL_MASK, aif1);
|
||||
snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_2,
|
||||
snd_soc_component_update_bits(component, WM8904_AUDIO_INTERFACE_2,
|
||||
WM8904_BCLK_DIV_MASK, aif2);
|
||||
snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_3,
|
||||
snd_soc_component_update_bits(component, WM8904_AUDIO_INTERFACE_3,
|
||||
WM8904_LRCLK_RATE_MASK, aif3);
|
||||
snd_soc_update_bits(codec, WM8904_CLOCK_RATES_1,
|
||||
snd_soc_component_update_bits(component, WM8904_CLOCK_RATES_1,
|
||||
WM8904_SAMPLE_RATE_MASK |
|
||||
WM8904_CLK_SYS_RATE_MASK, clock1);
|
||||
|
||||
/* Update filters for the new settings */
|
||||
wm8904_set_retune_mobile(codec);
|
||||
wm8904_set_deemph(codec);
|
||||
wm8904_set_retune_mobile(component);
|
||||
wm8904_set_deemph(component);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -1405,8 +1405,8 @@ static int wm8904_hw_params(struct snd_pcm_substream *substream,
|
|||
static int wm8904_set_sysclk(struct snd_soc_dai *dai, int clk_id,
|
||||
unsigned int freq, int dir)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
struct wm8904_priv *priv = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = dai->component;
|
||||
struct wm8904_priv *priv = snd_soc_component_get_drvdata(component);
|
||||
|
||||
switch (clk_id) {
|
||||
case WM8904_CLK_MCLK:
|
||||
|
@ -1424,14 +1424,14 @@ static int wm8904_set_sysclk(struct snd_soc_dai *dai, int clk_id,
|
|||
|
||||
dev_dbg(dai->dev, "Clock source is %d at %uHz\n", clk_id, freq);
|
||||
|
||||
wm8904_configure_clocking(codec);
|
||||
wm8904_configure_clocking(component);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wm8904_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
struct snd_soc_component *component = dai->component;
|
||||
unsigned int aif1 = 0;
|
||||
unsigned int aif3 = 0;
|
||||
|
||||
|
@ -1508,10 +1508,10 @@ static int wm8904_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_1,
|
||||
snd_soc_component_update_bits(component, WM8904_AUDIO_INTERFACE_1,
|
||||
WM8904_AIF_BCLK_INV | WM8904_AIF_LRCLK_INV |
|
||||
WM8904_AIF_FMT_MASK | WM8904_BCLK_DIR, aif1);
|
||||
snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_3,
|
||||
snd_soc_component_update_bits(component, WM8904_AUDIO_INTERFACE_3,
|
||||
WM8904_LRCLK_DIR, aif3);
|
||||
|
||||
return 0;
|
||||
|
@ -1521,8 +1521,8 @@ static int wm8904_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
|
|||
static int wm8904_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
|
||||
unsigned int rx_mask, int slots, int slot_width)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = dai->component;
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
int aif1 = 0;
|
||||
|
||||
/* Don't need to validate anything if we're turning off TDM */
|
||||
|
@ -1560,7 +1560,7 @@ static int wm8904_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
|
|||
wm8904->tdm_width = slot_width;
|
||||
wm8904->tdm_slots = slots / 2;
|
||||
|
||||
snd_soc_update_bits(codec, WM8904_AUDIO_INTERFACE_1,
|
||||
snd_soc_component_update_bits(component, WM8904_AUDIO_INTERFACE_1,
|
||||
WM8904_AIFADC_TDM | WM8904_AIFADC_TDM_CHAN |
|
||||
WM8904_AIFDAC_TDM | WM8904_AIFDAC_TDM_CHAN, aif1);
|
||||
|
||||
|
@ -1678,8 +1678,8 @@ static int fll_factors(struct _fll_div *fll_div, unsigned int Fref,
|
|||
static int wm8904_set_fll(struct snd_soc_dai *dai, int fll_id, int source,
|
||||
unsigned int Fref, unsigned int Fout)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = dai->component;
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
struct _fll_div fll_div;
|
||||
int ret, val;
|
||||
int clock2, fll1;
|
||||
|
@ -1689,19 +1689,19 @@ static int wm8904_set_fll(struct snd_soc_dai *dai, int fll_id, int source,
|
|||
Fout == wm8904->fll_fout)
|
||||
return 0;
|
||||
|
||||
clock2 = snd_soc_read(codec, WM8904_CLOCK_RATES_2);
|
||||
clock2 = snd_soc_component_read32(component, WM8904_CLOCK_RATES_2);
|
||||
|
||||
if (Fout == 0) {
|
||||
dev_dbg(codec->dev, "FLL disabled\n");
|
||||
dev_dbg(component->dev, "FLL disabled\n");
|
||||
|
||||
wm8904->fll_fref = 0;
|
||||
wm8904->fll_fout = 0;
|
||||
|
||||
/* Gate SYSCLK to avoid glitches */
|
||||
snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2,
|
||||
snd_soc_component_update_bits(component, WM8904_CLOCK_RATES_2,
|
||||
WM8904_CLK_SYS_ENA, 0);
|
||||
|
||||
snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1,
|
||||
snd_soc_component_update_bits(component, WM8904_FLL_CONTROL_1,
|
||||
WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0);
|
||||
|
||||
goto out;
|
||||
|
@ -1718,7 +1718,7 @@ static int wm8904_set_fll(struct snd_soc_dai *dai, int fll_id, int source,
|
|||
break;
|
||||
|
||||
case WM8904_FLL_FREE_RUNNING:
|
||||
dev_dbg(codec->dev, "Using free running FLL\n");
|
||||
dev_dbg(component->dev, "Using free running FLL\n");
|
||||
/* Force 12MHz and output/4 for now */
|
||||
Fout = 12000000;
|
||||
Fref = 12000000;
|
||||
|
@ -1728,20 +1728,20 @@ static int wm8904_set_fll(struct snd_soc_dai *dai, int fll_id, int source,
|
|||
break;
|
||||
|
||||
default:
|
||||
dev_err(codec->dev, "Unknown FLL ID %d\n", fll_id);
|
||||
dev_err(component->dev, "Unknown FLL ID %d\n", fll_id);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Save current state then disable the FLL and SYSCLK to avoid
|
||||
* misclocking */
|
||||
fll1 = snd_soc_read(codec, WM8904_FLL_CONTROL_1);
|
||||
snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2,
|
||||
fll1 = snd_soc_component_read32(component, WM8904_FLL_CONTROL_1);
|
||||
snd_soc_component_update_bits(component, WM8904_CLOCK_RATES_2,
|
||||
WM8904_CLK_SYS_ENA, 0);
|
||||
snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1,
|
||||
snd_soc_component_update_bits(component, WM8904_FLL_CONTROL_1,
|
||||
WM8904_FLL_OSC_ENA | WM8904_FLL_ENA, 0);
|
||||
|
||||
/* Unlock forced oscilator control to switch it on/off */
|
||||
snd_soc_update_bits(codec, WM8904_CONTROL_INTERFACE_TEST_1,
|
||||
snd_soc_component_update_bits(component, WM8904_CONTROL_INTERFACE_TEST_1,
|
||||
WM8904_USER_KEY, WM8904_USER_KEY);
|
||||
|
||||
if (fll_id == WM8904_FLL_FREE_RUNNING) {
|
||||
|
@ -1750,24 +1750,24 @@ static int wm8904_set_fll(struct snd_soc_dai *dai, int fll_id, int source,
|
|||
val = 0;
|
||||
}
|
||||
|
||||
snd_soc_update_bits(codec, WM8904_FLL_NCO_TEST_1, WM8904_FLL_FRC_NCO,
|
||||
snd_soc_component_update_bits(component, WM8904_FLL_NCO_TEST_1, WM8904_FLL_FRC_NCO,
|
||||
val);
|
||||
snd_soc_update_bits(codec, WM8904_CONTROL_INTERFACE_TEST_1,
|
||||
snd_soc_component_update_bits(component, WM8904_CONTROL_INTERFACE_TEST_1,
|
||||
WM8904_USER_KEY, 0);
|
||||
|
||||
switch (fll_id) {
|
||||
case WM8904_FLL_MCLK:
|
||||
snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5,
|
||||
snd_soc_component_update_bits(component, WM8904_FLL_CONTROL_5,
|
||||
WM8904_FLL_CLK_REF_SRC_MASK, 0);
|
||||
break;
|
||||
|
||||
case WM8904_FLL_LRCLK:
|
||||
snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5,
|
||||
snd_soc_component_update_bits(component, WM8904_FLL_CONTROL_5,
|
||||
WM8904_FLL_CLK_REF_SRC_MASK, 1);
|
||||
break;
|
||||
|
||||
case WM8904_FLL_BCLK:
|
||||
snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5,
|
||||
snd_soc_component_update_bits(component, WM8904_FLL_CONTROL_5,
|
||||
WM8904_FLL_CLK_REF_SRC_MASK, 2);
|
||||
break;
|
||||
}
|
||||
|
@ -1776,39 +1776,39 @@ static int wm8904_set_fll(struct snd_soc_dai *dai, int fll_id, int source,
|
|||
val = WM8904_FLL_FRACN_ENA;
|
||||
else
|
||||
val = 0;
|
||||
snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1,
|
||||
snd_soc_component_update_bits(component, WM8904_FLL_CONTROL_1,
|
||||
WM8904_FLL_FRACN_ENA, val);
|
||||
|
||||
snd_soc_update_bits(codec, WM8904_FLL_CONTROL_2,
|
||||
snd_soc_component_update_bits(component, WM8904_FLL_CONTROL_2,
|
||||
WM8904_FLL_OUTDIV_MASK | WM8904_FLL_FRATIO_MASK,
|
||||
(fll_div.fll_outdiv << WM8904_FLL_OUTDIV_SHIFT) |
|
||||
(fll_div.fll_fratio << WM8904_FLL_FRATIO_SHIFT));
|
||||
|
||||
snd_soc_write(codec, WM8904_FLL_CONTROL_3, fll_div.k);
|
||||
snd_soc_component_write(component, WM8904_FLL_CONTROL_3, fll_div.k);
|
||||
|
||||
snd_soc_update_bits(codec, WM8904_FLL_CONTROL_4, WM8904_FLL_N_MASK,
|
||||
snd_soc_component_update_bits(component, WM8904_FLL_CONTROL_4, WM8904_FLL_N_MASK,
|
||||
fll_div.n << WM8904_FLL_N_SHIFT);
|
||||
|
||||
snd_soc_update_bits(codec, WM8904_FLL_CONTROL_5,
|
||||
snd_soc_component_update_bits(component, WM8904_FLL_CONTROL_5,
|
||||
WM8904_FLL_CLK_REF_DIV_MASK,
|
||||
fll_div.fll_clk_ref_div
|
||||
<< WM8904_FLL_CLK_REF_DIV_SHIFT);
|
||||
|
||||
dev_dbg(codec->dev, "FLL configured for %dHz->%dHz\n", Fref, Fout);
|
||||
dev_dbg(component->dev, "FLL configured for %dHz->%dHz\n", Fref, Fout);
|
||||
|
||||
wm8904->fll_fref = Fref;
|
||||
wm8904->fll_fout = Fout;
|
||||
wm8904->fll_src = source;
|
||||
|
||||
/* Enable the FLL if it was previously active */
|
||||
snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1,
|
||||
snd_soc_component_update_bits(component, WM8904_FLL_CONTROL_1,
|
||||
WM8904_FLL_OSC_ENA, fll1);
|
||||
snd_soc_update_bits(codec, WM8904_FLL_CONTROL_1,
|
||||
snd_soc_component_update_bits(component, WM8904_FLL_CONTROL_1,
|
||||
WM8904_FLL_ENA, fll1);
|
||||
|
||||
out:
|
||||
/* Reenable SYSCLK if it was previously active */
|
||||
snd_soc_update_bits(codec, WM8904_CLOCK_RATES_2,
|
||||
snd_soc_component_update_bits(component, WM8904_CLOCK_RATES_2,
|
||||
WM8904_CLK_SYS_ENA, clock2);
|
||||
|
||||
return 0;
|
||||
|
@ -1816,7 +1816,7 @@ static int wm8904_set_fll(struct snd_soc_dai *dai, int fll_id, int source,
|
|||
|
||||
static int wm8904_digital_mute(struct snd_soc_dai *codec_dai, int mute)
|
||||
{
|
||||
struct snd_soc_codec *codec = codec_dai->codec;
|
||||
struct snd_soc_component *component = codec_dai->component;
|
||||
int val;
|
||||
|
||||
if (mute)
|
||||
|
@ -1824,15 +1824,15 @@ static int wm8904_digital_mute(struct snd_soc_dai *codec_dai, int mute)
|
|||
else
|
||||
val = 0;
|
||||
|
||||
snd_soc_update_bits(codec, WM8904_DAC_DIGITAL_1, WM8904_DAC_MUTE, val);
|
||||
snd_soc_component_update_bits(component, WM8904_DAC_DIGITAL_1, WM8904_DAC_MUTE, val);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wm8904_set_bias_level(struct snd_soc_codec *codec,
|
||||
static int wm8904_set_bias_level(struct snd_soc_component *component,
|
||||
enum snd_soc_bias_level level)
|
||||
{
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
int ret;
|
||||
|
||||
switch (level) {
|
||||
|
@ -1844,21 +1844,21 @@ static int wm8904_set_bias_level(struct snd_soc_codec *codec,
|
|||
|
||||
case SND_SOC_BIAS_PREPARE:
|
||||
/* VMID resistance 2*50k */
|
||||
snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8904_VMID_CONTROL_0,
|
||||
WM8904_VMID_RES_MASK,
|
||||
0x1 << WM8904_VMID_RES_SHIFT);
|
||||
|
||||
/* Normal bias current */
|
||||
snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8904_BIAS_CONTROL_0,
|
||||
WM8904_ISEL_MASK, 2 << WM8904_ISEL_SHIFT);
|
||||
break;
|
||||
|
||||
case SND_SOC_BIAS_STANDBY:
|
||||
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
|
||||
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
|
||||
ret = regulator_bulk_enable(ARRAY_SIZE(wm8904->supplies),
|
||||
wm8904->supplies);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev,
|
||||
dev_err(component->dev,
|
||||
"Failed to enable supplies: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
|
@ -1868,11 +1868,11 @@ static int wm8904_set_bias_level(struct snd_soc_codec *codec,
|
|||
regcache_sync(wm8904->regmap);
|
||||
|
||||
/* Enable bias */
|
||||
snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8904_BIAS_CONTROL_0,
|
||||
WM8904_BIAS_ENA, WM8904_BIAS_ENA);
|
||||
|
||||
/* Enable VMID, VMID buffering, 2*5k resistance */
|
||||
snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8904_VMID_CONTROL_0,
|
||||
WM8904_VMID_ENA |
|
||||
WM8904_VMID_RES_MASK,
|
||||
WM8904_VMID_ENA |
|
||||
|
@ -1883,22 +1883,22 @@ static int wm8904_set_bias_level(struct snd_soc_codec *codec,
|
|||
}
|
||||
|
||||
/* Maintain VMID with 2*250k */
|
||||
snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8904_VMID_CONTROL_0,
|
||||
WM8904_VMID_RES_MASK,
|
||||
0x2 << WM8904_VMID_RES_SHIFT);
|
||||
|
||||
/* Bias current *0.5 */
|
||||
snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8904_BIAS_CONTROL_0,
|
||||
WM8904_ISEL_MASK, 0);
|
||||
break;
|
||||
|
||||
case SND_SOC_BIAS_OFF:
|
||||
/* Turn off VMID */
|
||||
snd_soc_update_bits(codec, WM8904_VMID_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8904_VMID_CONTROL_0,
|
||||
WM8904_VMID_RES_MASK | WM8904_VMID_ENA, 0);
|
||||
|
||||
/* Stop bias generation */
|
||||
snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0,
|
||||
snd_soc_component_update_bits(component, WM8904_BIAS_CONTROL_0,
|
||||
WM8904_BIAS_ENA, 0);
|
||||
|
||||
regcache_cache_only(wm8904->regmap, true);
|
||||
|
@ -1946,9 +1946,9 @@ static struct snd_soc_dai_driver wm8904_dai = {
|
|||
.symmetric_rates = 1,
|
||||
};
|
||||
|
||||
static void wm8904_handle_retune_mobile_pdata(struct snd_soc_codec *codec)
|
||||
static void wm8904_handle_retune_mobile_pdata(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
struct wm8904_pdata *pdata = wm8904->pdata;
|
||||
struct snd_kcontrol_new control =
|
||||
SOC_ENUM_EXT("EQ Mode",
|
||||
|
@ -1991,31 +1991,31 @@ static void wm8904_handle_retune_mobile_pdata(struct snd_soc_codec *codec)
|
|||
wm8904->retune_mobile_texts = t;
|
||||
}
|
||||
|
||||
dev_dbg(codec->dev, "Allocated %d unique ReTune Mobile names\n",
|
||||
dev_dbg(component->dev, "Allocated %d unique ReTune Mobile names\n",
|
||||
wm8904->num_retune_mobile_texts);
|
||||
|
||||
wm8904->retune_mobile_enum.items = wm8904->num_retune_mobile_texts;
|
||||
wm8904->retune_mobile_enum.texts = wm8904->retune_mobile_texts;
|
||||
|
||||
ret = snd_soc_add_codec_controls(codec, &control, 1);
|
||||
ret = snd_soc_add_component_controls(component, &control, 1);
|
||||
if (ret != 0)
|
||||
dev_err(codec->dev,
|
||||
dev_err(component->dev,
|
||||
"Failed to add ReTune Mobile control: %d\n", ret);
|
||||
}
|
||||
|
||||
static void wm8904_handle_pdata(struct snd_soc_codec *codec)
|
||||
static void wm8904_handle_pdata(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
struct wm8904_pdata *pdata = wm8904->pdata;
|
||||
int ret, i;
|
||||
|
||||
if (!pdata) {
|
||||
snd_soc_add_codec_controls(codec, wm8904_eq_controls,
|
||||
snd_soc_add_component_controls(component, wm8904_eq_controls,
|
||||
ARRAY_SIZE(wm8904_eq_controls));
|
||||
return;
|
||||
}
|
||||
|
||||
dev_dbg(codec->dev, "%d DRC configurations\n", pdata->num_drc_cfgs);
|
||||
dev_dbg(component->dev, "%d DRC configurations\n", pdata->num_drc_cfgs);
|
||||
|
||||
if (pdata->num_drc_cfgs) {
|
||||
struct snd_kcontrol_new control =
|
||||
|
@ -2034,28 +2034,28 @@ static void wm8904_handle_pdata(struct snd_soc_codec *codec)
|
|||
wm8904->drc_enum.items = pdata->num_drc_cfgs;
|
||||
wm8904->drc_enum.texts = wm8904->drc_texts;
|
||||
|
||||
ret = snd_soc_add_codec_controls(codec, &control, 1);
|
||||
ret = snd_soc_add_component_controls(component, &control, 1);
|
||||
if (ret != 0)
|
||||
dev_err(codec->dev,
|
||||
dev_err(component->dev,
|
||||
"Failed to add DRC mode control: %d\n", ret);
|
||||
|
||||
wm8904_set_drc(codec);
|
||||
wm8904_set_drc(component);
|
||||
}
|
||||
|
||||
dev_dbg(codec->dev, "%d ReTune Mobile configurations\n",
|
||||
dev_dbg(component->dev, "%d ReTune Mobile configurations\n",
|
||||
pdata->num_retune_mobile_cfgs);
|
||||
|
||||
if (pdata->num_retune_mobile_cfgs)
|
||||
wm8904_handle_retune_mobile_pdata(codec);
|
||||
wm8904_handle_retune_mobile_pdata(component);
|
||||
else
|
||||
snd_soc_add_codec_controls(codec, wm8904_eq_controls,
|
||||
snd_soc_add_component_controls(component, wm8904_eq_controls,
|
||||
ARRAY_SIZE(wm8904_eq_controls));
|
||||
}
|
||||
|
||||
|
||||
static int wm8904_probe(struct snd_soc_codec *codec)
|
||||
static int wm8904_probe(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
|
||||
switch (wm8904->devtype) {
|
||||
case WM8904:
|
||||
|
@ -2064,33 +2064,33 @@ static int wm8904_probe(struct snd_soc_codec *codec)
|
|||
memset(&wm8904_dai.capture, 0, sizeof(wm8904_dai.capture));
|
||||
break;
|
||||
default:
|
||||
dev_err(codec->dev, "Unknown device type %d\n",
|
||||
dev_err(component->dev, "Unknown device type %d\n",
|
||||
wm8904->devtype);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
wm8904_handle_pdata(codec);
|
||||
wm8904_handle_pdata(component);
|
||||
|
||||
wm8904_add_widgets(codec);
|
||||
wm8904_add_widgets(component);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wm8904_remove(struct snd_soc_codec *codec)
|
||||
static void wm8904_remove(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8904_priv *wm8904 = snd_soc_component_get_drvdata(component);
|
||||
|
||||
kfree(wm8904->retune_mobile_texts);
|
||||
kfree(wm8904->drc_texts);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct snd_soc_codec_driver soc_codec_dev_wm8904 = {
|
||||
.probe = wm8904_probe,
|
||||
.remove = wm8904_remove,
|
||||
.set_bias_level = wm8904_set_bias_level,
|
||||
.idle_bias_off = true,
|
||||
static const struct snd_soc_component_driver soc_component_dev_wm8904 = {
|
||||
.probe = wm8904_probe,
|
||||
.remove = wm8904_remove,
|
||||
.set_bias_level = wm8904_set_bias_level,
|
||||
.use_pmdown_time = 1,
|
||||
.endianness = 1,
|
||||
.non_legacy_dai_naming = 1,
|
||||
};
|
||||
|
||||
static const struct regmap_config wm8904_regmap = {
|
||||
|
@ -2265,8 +2265,8 @@ static int wm8904_i2c_probe(struct i2c_client *i2c,
|
|||
regcache_cache_only(wm8904->regmap, true);
|
||||
regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), wm8904->supplies);
|
||||
|
||||
ret = snd_soc_register_codec(&i2c->dev,
|
||||
&soc_codec_dev_wm8904, &wm8904_dai, 1);
|
||||
ret = devm_snd_soc_register_component(&i2c->dev,
|
||||
&soc_component_dev_wm8904, &wm8904_dai, 1);
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
|
@ -2277,12 +2277,6 @@ static int wm8904_i2c_probe(struct i2c_client *i2c,
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int wm8904_i2c_remove(struct i2c_client *client)
|
||||
{
|
||||
snd_soc_unregister_codec(&client->dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct i2c_device_id wm8904_i2c_id[] = {
|
||||
{ "wm8904", WM8904 },
|
||||
{ "wm8912", WM8912 },
|
||||
|
@ -2297,7 +2291,6 @@ static struct i2c_driver wm8904_i2c_driver = {
|
|||
.of_match_table = of_match_ptr(wm8904_of_match),
|
||||
},
|
||||
.probe = wm8904_i2c_probe,
|
||||
.remove = wm8904_i2c_remove,
|
||||
.id_table = wm8904_i2c_id,
|
||||
};
|
||||
|
||||
|
|
|
@ -334,14 +334,14 @@ static const struct snd_soc_dapm_route wm8940_dapm_routes[] = {
|
|||
{"ADC", NULL, "Boost Mixer"},
|
||||
};
|
||||
|
||||
#define wm8940_reset(c) snd_soc_write(c, WM8940_SOFTRESET, 0);
|
||||
#define wm8940_reset(c) snd_soc_component_write(c, WM8940_SOFTRESET, 0);
|
||||
|
||||
static int wm8940_set_dai_fmt(struct snd_soc_dai *codec_dai,
|
||||
unsigned int fmt)
|
||||
{
|
||||
struct snd_soc_codec *codec = codec_dai->codec;
|
||||
u16 iface = snd_soc_read(codec, WM8940_IFACE) & 0xFE67;
|
||||
u16 clk = snd_soc_read(codec, WM8940_CLOCK) & 0x1fe;
|
||||
struct snd_soc_component *component = codec_dai->component;
|
||||
u16 iface = snd_soc_component_read32(component, WM8940_IFACE) & 0xFE67;
|
||||
u16 clk = snd_soc_component_read32(component, WM8940_CLOCK) & 0x1fe;
|
||||
|
||||
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
|
||||
case SND_SOC_DAIFMT_CBM_CFM:
|
||||
|
@ -352,7 +352,7 @@ static int wm8940_set_dai_fmt(struct snd_soc_dai *codec_dai,
|
|||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
snd_soc_write(codec, WM8940_CLOCK, clk);
|
||||
snd_soc_component_write(component, WM8940_CLOCK, clk);
|
||||
|
||||
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
|
||||
case SND_SOC_DAIFMT_I2S:
|
||||
|
@ -385,7 +385,7 @@ static int wm8940_set_dai_fmt(struct snd_soc_dai *codec_dai,
|
|||
break;
|
||||
}
|
||||
|
||||
snd_soc_write(codec, WM8940_IFACE, iface);
|
||||
snd_soc_component_write(component, WM8940_IFACE, iface);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -394,10 +394,10 @@ static int wm8940_i2s_hw_params(struct snd_pcm_substream *substream,
|
|||
struct snd_pcm_hw_params *params,
|
||||
struct snd_soc_dai *dai)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
u16 iface = snd_soc_read(codec, WM8940_IFACE) & 0xFD9F;
|
||||
u16 addcntrl = snd_soc_read(codec, WM8940_ADDCNTRL) & 0xFFF1;
|
||||
u16 companding = snd_soc_read(codec,
|
||||
struct snd_soc_component *component = dai->component;
|
||||
u16 iface = snd_soc_component_read32(component, WM8940_IFACE) & 0xFD9F;
|
||||
u16 addcntrl = snd_soc_component_read32(component, WM8940_ADDCNTRL) & 0xFFF1;
|
||||
u16 companding = snd_soc_component_read32(component,
|
||||
WM8940_COMPANDINGCTL) & 0xFFDF;
|
||||
int ret;
|
||||
|
||||
|
@ -426,7 +426,7 @@ static int wm8940_i2s_hw_params(struct snd_pcm_substream *substream,
|
|||
case 48000:
|
||||
break;
|
||||
}
|
||||
ret = snd_soc_write(codec, WM8940_ADDCNTRL, addcntrl);
|
||||
ret = snd_soc_component_write(component, WM8940_ADDCNTRL, addcntrl);
|
||||
if (ret)
|
||||
goto error_ret;
|
||||
|
||||
|
@ -446,10 +446,10 @@ static int wm8940_i2s_hw_params(struct snd_pcm_substream *substream,
|
|||
iface |= (3 << 5);
|
||||
break;
|
||||
}
|
||||
ret = snd_soc_write(codec, WM8940_COMPANDINGCTL, companding);
|
||||
ret = snd_soc_component_write(component, WM8940_COMPANDINGCTL, companding);
|
||||
if (ret)
|
||||
goto error_ret;
|
||||
ret = snd_soc_write(codec, WM8940_IFACE, iface);
|
||||
ret = snd_soc_component_write(component, WM8940_IFACE, iface);
|
||||
|
||||
error_ret:
|
||||
return ret;
|
||||
|
@ -457,21 +457,21 @@ static int wm8940_i2s_hw_params(struct snd_pcm_substream *substream,
|
|||
|
||||
static int wm8940_mute(struct snd_soc_dai *dai, int mute)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
u16 mute_reg = snd_soc_read(codec, WM8940_DAC) & 0xffbf;
|
||||
struct snd_soc_component *component = dai->component;
|
||||
u16 mute_reg = snd_soc_component_read32(component, WM8940_DAC) & 0xffbf;
|
||||
|
||||
if (mute)
|
||||
mute_reg |= 0x40;
|
||||
|
||||
return snd_soc_write(codec, WM8940_DAC, mute_reg);
|
||||
return snd_soc_component_write(component, WM8940_DAC, mute_reg);
|
||||
}
|
||||
|
||||
static int wm8940_set_bias_level(struct snd_soc_codec *codec,
|
||||
static int wm8940_set_bias_level(struct snd_soc_component *component,
|
||||
enum snd_soc_bias_level level)
|
||||
{
|
||||
struct wm8940_priv *wm8940 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8940_priv *wm8940 = snd_soc_component_get_drvdata(component);
|
||||
u16 val;
|
||||
u16 pwr_reg = snd_soc_read(codec, WM8940_POWER1) & 0x1F0;
|
||||
u16 pwr_reg = snd_soc_component_read32(component, WM8940_POWER1) & 0x1F0;
|
||||
int ret = 0;
|
||||
|
||||
switch (level) {
|
||||
|
@ -479,23 +479,23 @@ static int wm8940_set_bias_level(struct snd_soc_codec *codec,
|
|||
/* ensure bufioen and biasen */
|
||||
pwr_reg |= (1 << 2) | (1 << 3);
|
||||
/* Enable thermal shutdown */
|
||||
val = snd_soc_read(codec, WM8940_OUTPUTCTL);
|
||||
ret = snd_soc_write(codec, WM8940_OUTPUTCTL, val | 0x2);
|
||||
val = snd_soc_component_read32(component, WM8940_OUTPUTCTL);
|
||||
ret = snd_soc_component_write(component, WM8940_OUTPUTCTL, val | 0x2);
|
||||
if (ret)
|
||||
break;
|
||||
/* set vmid to 75k */
|
||||
ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x1);
|
||||
ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x1);
|
||||
break;
|
||||
case SND_SOC_BIAS_PREPARE:
|
||||
/* ensure bufioen and biasen */
|
||||
pwr_reg |= (1 << 2) | (1 << 3);
|
||||
ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x1);
|
||||
ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x1);
|
||||
break;
|
||||
case SND_SOC_BIAS_STANDBY:
|
||||
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
|
||||
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
|
||||
ret = regcache_sync(wm8940->regmap);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to sync cache: %d\n", ret);
|
||||
dev_err(component->dev, "Failed to sync cache: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
@ -503,10 +503,10 @@ static int wm8940_set_bias_level(struct snd_soc_codec *codec,
|
|||
/* ensure bufioen and biasen */
|
||||
pwr_reg |= (1 << 2) | (1 << 3);
|
||||
/* set vmid to 300k for standby */
|
||||
ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x2);
|
||||
ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x2);
|
||||
break;
|
||||
case SND_SOC_BIAS_OFF:
|
||||
ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg);
|
||||
ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg);
|
||||
break;
|
||||
}
|
||||
|
||||
|
@ -576,40 +576,40 @@ static void pll_factors(unsigned int target, unsigned int source)
|
|||
static int wm8940_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
|
||||
int source, unsigned int freq_in, unsigned int freq_out)
|
||||
{
|
||||
struct snd_soc_codec *codec = codec_dai->codec;
|
||||
struct snd_soc_component *component = codec_dai->component;
|
||||
u16 reg;
|
||||
|
||||
/* Turn off PLL */
|
||||
reg = snd_soc_read(codec, WM8940_POWER1);
|
||||
snd_soc_write(codec, WM8940_POWER1, reg & 0x1df);
|
||||
reg = snd_soc_component_read32(component, WM8940_POWER1);
|
||||
snd_soc_component_write(component, WM8940_POWER1, reg & 0x1df);
|
||||
|
||||
if (freq_in == 0 || freq_out == 0) {
|
||||
/* Clock CODEC directly from MCLK */
|
||||
reg = snd_soc_read(codec, WM8940_CLOCK);
|
||||
snd_soc_write(codec, WM8940_CLOCK, reg & 0x0ff);
|
||||
reg = snd_soc_component_read32(component, WM8940_CLOCK);
|
||||
snd_soc_component_write(component, WM8940_CLOCK, reg & 0x0ff);
|
||||
/* Pll power down */
|
||||
snd_soc_write(codec, WM8940_PLLN, (1 << 7));
|
||||
snd_soc_component_write(component, WM8940_PLLN, (1 << 7));
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Pll is followed by a frequency divide by 4 */
|
||||
pll_factors(freq_out*4, freq_in);
|
||||
if (pll_div.k)
|
||||
snd_soc_write(codec, WM8940_PLLN,
|
||||
snd_soc_component_write(component, WM8940_PLLN,
|
||||
(pll_div.pre_scale << 4) | pll_div.n | (1 << 6));
|
||||
else /* No factional component */
|
||||
snd_soc_write(codec, WM8940_PLLN,
|
||||
snd_soc_component_write(component, WM8940_PLLN,
|
||||
(pll_div.pre_scale << 4) | pll_div.n);
|
||||
snd_soc_write(codec, WM8940_PLLK1, pll_div.k >> 18);
|
||||
snd_soc_write(codec, WM8940_PLLK2, (pll_div.k >> 9) & 0x1ff);
|
||||
snd_soc_write(codec, WM8940_PLLK3, pll_div.k & 0x1ff);
|
||||
snd_soc_component_write(component, WM8940_PLLK1, pll_div.k >> 18);
|
||||
snd_soc_component_write(component, WM8940_PLLK2, (pll_div.k >> 9) & 0x1ff);
|
||||
snd_soc_component_write(component, WM8940_PLLK3, pll_div.k & 0x1ff);
|
||||
/* Enable the PLL */
|
||||
reg = snd_soc_read(codec, WM8940_POWER1);
|
||||
snd_soc_write(codec, WM8940_POWER1, reg | 0x020);
|
||||
reg = snd_soc_component_read32(component, WM8940_POWER1);
|
||||
snd_soc_component_write(component, WM8940_POWER1, reg | 0x020);
|
||||
|
||||
/* Run CODEC from PLL instead of MCLK */
|
||||
reg = snd_soc_read(codec, WM8940_CLOCK);
|
||||
snd_soc_write(codec, WM8940_CLOCK, reg | 0x100);
|
||||
reg = snd_soc_component_read32(component, WM8940_CLOCK);
|
||||
snd_soc_component_write(component, WM8940_CLOCK, reg | 0x100);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -617,8 +617,8 @@ static int wm8940_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
|
|||
static int wm8940_set_dai_sysclk(struct snd_soc_dai *codec_dai,
|
||||
int clk_id, unsigned int freq, int dir)
|
||||
{
|
||||
struct snd_soc_codec *codec = codec_dai->codec;
|
||||
struct wm8940_priv *wm8940 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = codec_dai->component;
|
||||
struct wm8940_priv *wm8940 = snd_soc_component_get_drvdata(component);
|
||||
|
||||
switch (freq) {
|
||||
case 11289600:
|
||||
|
@ -635,22 +635,22 @@ static int wm8940_set_dai_sysclk(struct snd_soc_dai *codec_dai,
|
|||
static int wm8940_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
|
||||
int div_id, int div)
|
||||
{
|
||||
struct snd_soc_codec *codec = codec_dai->codec;
|
||||
struct snd_soc_component *component = codec_dai->component;
|
||||
u16 reg;
|
||||
int ret = 0;
|
||||
|
||||
switch (div_id) {
|
||||
case WM8940_BCLKDIV:
|
||||
reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFFE3;
|
||||
ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 2));
|
||||
reg = snd_soc_component_read32(component, WM8940_CLOCK) & 0xFFE3;
|
||||
ret = snd_soc_component_write(component, WM8940_CLOCK, reg | (div << 2));
|
||||
break;
|
||||
case WM8940_MCLKDIV:
|
||||
reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFF1F;
|
||||
ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 5));
|
||||
reg = snd_soc_component_read32(component, WM8940_CLOCK) & 0xFF1F;
|
||||
ret = snd_soc_component_write(component, WM8940_CLOCK, reg | (div << 5));
|
||||
break;
|
||||
case WM8940_OPCLKDIV:
|
||||
reg = snd_soc_read(codec, WM8940_GPIO) & 0xFFCF;
|
||||
ret = snd_soc_write(codec, WM8940_GPIO, reg | (div << 4));
|
||||
reg = snd_soc_component_read32(component, WM8940_GPIO) & 0xFFCF;
|
||||
ret = snd_soc_component_write(component, WM8940_GPIO, reg | (div << 4));
|
||||
break;
|
||||
}
|
||||
return ret;
|
||||
|
@ -693,29 +693,29 @@ static struct snd_soc_dai_driver wm8940_dai = {
|
|||
.symmetric_rates = 1,
|
||||
};
|
||||
|
||||
static int wm8940_probe(struct snd_soc_codec *codec)
|
||||
static int wm8940_probe(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8940_setup_data *pdata = codec->dev->platform_data;
|
||||
struct wm8940_setup_data *pdata = component->dev->platform_data;
|
||||
int ret;
|
||||
u16 reg;
|
||||
|
||||
ret = wm8940_reset(codec);
|
||||
ret = wm8940_reset(component);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to issue reset\n");
|
||||
dev_err(component->dev, "Failed to issue reset\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
|
||||
|
||||
ret = snd_soc_write(codec, WM8940_POWER1, 0x180);
|
||||
ret = snd_soc_component_write(component, WM8940_POWER1, 0x180);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
if (!pdata)
|
||||
dev_warn(codec->dev, "No platform data supplied\n");
|
||||
dev_warn(component->dev, "No platform data supplied\n");
|
||||
else {
|
||||
reg = snd_soc_read(codec, WM8940_OUTPUTCTL);
|
||||
ret = snd_soc_write(codec, WM8940_OUTPUTCTL, reg | pdata->vroi);
|
||||
reg = snd_soc_component_read32(component, WM8940_OUTPUTCTL);
|
||||
ret = snd_soc_component_write(component, WM8940_OUTPUTCTL, reg | pdata->vroi);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
}
|
||||
|
@ -723,19 +723,20 @@ static int wm8940_probe(struct snd_soc_codec *codec)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static const struct snd_soc_codec_driver soc_codec_dev_wm8940 = {
|
||||
.probe = wm8940_probe,
|
||||
.set_bias_level = wm8940_set_bias_level,
|
||||
.suspend_bias_off = true,
|
||||
|
||||
.component_driver = {
|
||||
.controls = wm8940_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(wm8940_snd_controls),
|
||||
.dapm_widgets = wm8940_dapm_widgets,
|
||||
.num_dapm_widgets = ARRAY_SIZE(wm8940_dapm_widgets),
|
||||
.dapm_routes = wm8940_dapm_routes,
|
||||
.num_dapm_routes = ARRAY_SIZE(wm8940_dapm_routes),
|
||||
},
|
||||
static const struct snd_soc_component_driver soc_component_dev_wm8940 = {
|
||||
.probe = wm8940_probe,
|
||||
.set_bias_level = wm8940_set_bias_level,
|
||||
.controls = wm8940_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(wm8940_snd_controls),
|
||||
.dapm_widgets = wm8940_dapm_widgets,
|
||||
.num_dapm_widgets = ARRAY_SIZE(wm8940_dapm_widgets),
|
||||
.dapm_routes = wm8940_dapm_routes,
|
||||
.num_dapm_routes = ARRAY_SIZE(wm8940_dapm_routes),
|
||||
.suspend_bias_off = 1,
|
||||
.idle_bias_on = 1,
|
||||
.use_pmdown_time = 1,
|
||||
.endianness = 1,
|
||||
.non_legacy_dai_naming = 1,
|
||||
};
|
||||
|
||||
static const struct regmap_config wm8940_regmap = {
|
||||
|
@ -768,19 +769,12 @@ static int wm8940_i2c_probe(struct i2c_client *i2c,
|
|||
|
||||
i2c_set_clientdata(i2c, wm8940);
|
||||
|
||||
ret = snd_soc_register_codec(&i2c->dev,
|
||||
&soc_codec_dev_wm8940, &wm8940_dai, 1);
|
||||
ret = devm_snd_soc_register_component(&i2c->dev,
|
||||
&soc_component_dev_wm8940, &wm8940_dai, 1);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int wm8940_i2c_remove(struct i2c_client *client)
|
||||
{
|
||||
snd_soc_unregister_codec(&client->dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct i2c_device_id wm8940_i2c_id[] = {
|
||||
{ "wm8940", 0 },
|
||||
{ }
|
||||
|
@ -792,7 +786,6 @@ static struct i2c_driver wm8940_i2c_driver = {
|
|||
.name = "wm8940",
|
||||
},
|
||||
.probe = wm8940_i2c_probe,
|
||||
.remove = wm8940_i2c_remove,
|
||||
.id_table = wm8940_i2c_id,
|
||||
};
|
||||
|
||||
|
|
|
@ -128,9 +128,9 @@ static bool wm8955_volatile(struct device *dev, unsigned int reg)
|
|||
}
|
||||
}
|
||||
|
||||
static int wm8955_reset(struct snd_soc_codec *codec)
|
||||
static int wm8955_reset(struct snd_soc_component *component)
|
||||
{
|
||||
return snd_soc_write(codec, WM8955_RESET, 0);
|
||||
return snd_soc_component_write(component, WM8955_RESET, 0);
|
||||
}
|
||||
|
||||
struct pll_factors {
|
||||
|
@ -242,9 +242,9 @@ static struct {
|
|||
{ 11289600, 88200, 0, 31, },
|
||||
};
|
||||
|
||||
static int wm8955_configure_clocking(struct snd_soc_codec *codec)
|
||||
static int wm8955_configure_clocking(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
|
||||
int i, ret, val;
|
||||
int clocking = 0;
|
||||
int srate = 0;
|
||||
|
@ -267,7 +267,7 @@ static int wm8955_configure_clocking(struct snd_soc_codec *codec)
|
|||
|
||||
/* We should never get here with an unsupported sample rate */
|
||||
if (sr == -1) {
|
||||
dev_err(codec->dev, "Sample rate %dHz unsupported\n",
|
||||
dev_err(component->dev, "Sample rate %dHz unsupported\n",
|
||||
wm8955->fs);
|
||||
WARN_ON(sr == -1);
|
||||
return -EINVAL;
|
||||
|
@ -282,30 +282,30 @@ static int wm8955_configure_clocking(struct snd_soc_codec *codec)
|
|||
|
||||
/* Use the last divider configuration we saw for the
|
||||
* sample rate. */
|
||||
ret = wm8995_pll_factors(codec->dev, wm8955->mclk_rate,
|
||||
ret = wm8995_pll_factors(component->dev, wm8955->mclk_rate,
|
||||
clock_cfgs[sr].mclk, &pll);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev,
|
||||
dev_err(component->dev,
|
||||
"Unable to generate %dHz from %dHz MCLK\n",
|
||||
wm8955->fs, wm8955->mclk_rate);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
snd_soc_update_bits(codec, WM8955_PLL_CONTROL_1,
|
||||
snd_soc_component_update_bits(component, WM8955_PLL_CONTROL_1,
|
||||
WM8955_N_MASK | WM8955_K_21_18_MASK,
|
||||
(pll.n << WM8955_N_SHIFT) |
|
||||
pll.k >> 18);
|
||||
snd_soc_update_bits(codec, WM8955_PLL_CONTROL_2,
|
||||
snd_soc_component_update_bits(component, WM8955_PLL_CONTROL_2,
|
||||
WM8955_K_17_9_MASK,
|
||||
(pll.k >> 9) & WM8955_K_17_9_MASK);
|
||||
snd_soc_update_bits(codec, WM8955_PLL_CONTROL_3,
|
||||
snd_soc_component_update_bits(component, WM8955_PLL_CONTROL_3,
|
||||
WM8955_K_8_0_MASK,
|
||||
pll.k & WM8955_K_8_0_MASK);
|
||||
if (pll.k)
|
||||
snd_soc_update_bits(codec, WM8955_PLL_CONTROL_4,
|
||||
snd_soc_component_update_bits(component, WM8955_PLL_CONTROL_4,
|
||||
WM8955_KEN, WM8955_KEN);
|
||||
else
|
||||
snd_soc_update_bits(codec, WM8955_PLL_CONTROL_4,
|
||||
snd_soc_component_update_bits(component, WM8955_PLL_CONTROL_4,
|
||||
WM8955_KEN, 0);
|
||||
|
||||
if (pll.outdiv)
|
||||
|
@ -314,17 +314,17 @@ static int wm8955_configure_clocking(struct snd_soc_codec *codec)
|
|||
val = WM8955_PLL_RB;
|
||||
|
||||
/* Now start the PLL running */
|
||||
snd_soc_update_bits(codec, WM8955_CLOCKING_PLL,
|
||||
snd_soc_component_update_bits(component, WM8955_CLOCKING_PLL,
|
||||
WM8955_PLL_RB | WM8955_PLLOUTDIV2, val);
|
||||
snd_soc_update_bits(codec, WM8955_CLOCKING_PLL,
|
||||
snd_soc_component_update_bits(component, WM8955_CLOCKING_PLL,
|
||||
WM8955_PLLEN, WM8955_PLLEN);
|
||||
}
|
||||
|
||||
srate = clock_cfgs[sr].usb | (clock_cfgs[sr].sr << WM8955_SR_SHIFT);
|
||||
|
||||
snd_soc_update_bits(codec, WM8955_SAMPLE_RATE,
|
||||
snd_soc_component_update_bits(component, WM8955_SAMPLE_RATE,
|
||||
WM8955_USB | WM8955_SR_MASK, srate);
|
||||
snd_soc_update_bits(codec, WM8955_CLOCKING_PLL,
|
||||
snd_soc_component_update_bits(component, WM8955_CLOCKING_PLL,
|
||||
WM8955_MCLKSEL, clocking);
|
||||
|
||||
return 0;
|
||||
|
@ -333,22 +333,22 @@ static int wm8955_configure_clocking(struct snd_soc_codec *codec)
|
|||
static int wm8955_sysclk(struct snd_soc_dapm_widget *w,
|
||||
struct snd_kcontrol *kcontrol, int event)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
|
||||
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
|
||||
int ret = 0;
|
||||
|
||||
/* Always disable the clocks - if we're doing reconfiguration this
|
||||
* avoids misclocking.
|
||||
*/
|
||||
snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
|
||||
snd_soc_component_update_bits(component, WM8955_POWER_MANAGEMENT_1,
|
||||
WM8955_DIGENB, 0);
|
||||
snd_soc_update_bits(codec, WM8955_CLOCKING_PLL,
|
||||
snd_soc_component_update_bits(component, WM8955_CLOCKING_PLL,
|
||||
WM8955_PLL_RB | WM8955_PLLEN, 0);
|
||||
|
||||
switch (event) {
|
||||
case SND_SOC_DAPM_POST_PMD:
|
||||
break;
|
||||
case SND_SOC_DAPM_PRE_PMU:
|
||||
ret = wm8955_configure_clocking(codec);
|
||||
ret = wm8955_configure_clocking(component);
|
||||
break;
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
|
@ -360,9 +360,9 @@ static int wm8955_sysclk(struct snd_soc_dapm_widget *w,
|
|||
|
||||
static int deemph_settings[] = { 0, 32000, 44100, 48000 };
|
||||
|
||||
static int wm8955_set_deemph(struct snd_soc_codec *codec)
|
||||
static int wm8955_set_deemph(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
|
||||
int val, i, best;
|
||||
|
||||
/* If we're using deemphasis select the nearest available sample
|
||||
|
@ -381,17 +381,17 @@ static int wm8955_set_deemph(struct snd_soc_codec *codec)
|
|||
val = 0;
|
||||
}
|
||||
|
||||
dev_dbg(codec->dev, "Set deemphasis %d\n", val);
|
||||
dev_dbg(component->dev, "Set deemphasis %d\n", val);
|
||||
|
||||
return snd_soc_update_bits(codec, WM8955_DAC_CONTROL,
|
||||
return snd_soc_component_update_bits(component, WM8955_DAC_CONTROL,
|
||||
WM8955_DEEMPH_MASK, val);
|
||||
}
|
||||
|
||||
static int wm8955_get_deemph(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
|
||||
struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
|
||||
struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
|
||||
|
||||
ucontrol->value.integer.value[0] = wm8955->deemph;
|
||||
return 0;
|
||||
|
@ -400,8 +400,8 @@ static int wm8955_get_deemph(struct snd_kcontrol *kcontrol,
|
|||
static int wm8955_put_deemph(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
{
|
||||
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
|
||||
struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
|
||||
struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
|
||||
unsigned int deemph = ucontrol->value.integer.value[0];
|
||||
|
||||
if (deemph > 1)
|
||||
|
@ -409,7 +409,7 @@ static int wm8955_put_deemph(struct snd_kcontrol *kcontrol,
|
|||
|
||||
wm8955->deemph = deemph;
|
||||
|
||||
return wm8955_set_deemph(codec);
|
||||
return wm8955_set_deemph(component);
|
||||
}
|
||||
|
||||
static const char *bass_mode_text[] = {
|
||||
|
@ -592,8 +592,8 @@ static int wm8955_hw_params(struct snd_pcm_substream *substream,
|
|||
struct snd_pcm_hw_params *params,
|
||||
struct snd_soc_dai *dai)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = dai->component;
|
||||
struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
|
||||
int ret;
|
||||
int wl;
|
||||
|
||||
|
@ -613,25 +613,25 @@ static int wm8955_hw_params(struct snd_pcm_substream *substream,
|
|||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
snd_soc_update_bits(codec, WM8955_AUDIO_INTERFACE,
|
||||
snd_soc_component_update_bits(component, WM8955_AUDIO_INTERFACE,
|
||||
WM8955_WL_MASK, wl);
|
||||
|
||||
wm8955->fs = params_rate(params);
|
||||
wm8955_set_deemph(codec);
|
||||
wm8955_set_deemph(component);
|
||||
|
||||
/* If the chip is clocked then disable the clocks and force a
|
||||
* reconfiguration, otherwise DAPM will power up the
|
||||
* clocks for us later. */
|
||||
ret = snd_soc_read(codec, WM8955_POWER_MANAGEMENT_1);
|
||||
ret = snd_soc_component_read32(component, WM8955_POWER_MANAGEMENT_1);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
if (ret & WM8955_DIGENB) {
|
||||
snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
|
||||
snd_soc_component_update_bits(component, WM8955_POWER_MANAGEMENT_1,
|
||||
WM8955_DIGENB, 0);
|
||||
snd_soc_update_bits(codec, WM8955_CLOCKING_PLL,
|
||||
snd_soc_component_update_bits(component, WM8955_CLOCKING_PLL,
|
||||
WM8955_PLL_RB | WM8955_PLLEN, 0);
|
||||
|
||||
wm8955_configure_clocking(codec);
|
||||
wm8955_configure_clocking(component);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -641,8 +641,8 @@ static int wm8955_hw_params(struct snd_pcm_substream *substream,
|
|||
static int wm8955_set_sysclk(struct snd_soc_dai *dai, int clk_id,
|
||||
unsigned int freq, int dir)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
struct wm8955_priv *priv = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_component *component = dai->component;
|
||||
struct wm8955_priv *priv = snd_soc_component_get_drvdata(component);
|
||||
int div;
|
||||
|
||||
switch (clk_id) {
|
||||
|
@ -655,7 +655,7 @@ static int wm8955_set_sysclk(struct snd_soc_dai *dai, int clk_id,
|
|||
div = 0;
|
||||
}
|
||||
|
||||
snd_soc_update_bits(codec, WM8955_SAMPLE_RATE,
|
||||
snd_soc_component_update_bits(component, WM8955_SAMPLE_RATE,
|
||||
WM8955_MCLKDIV2, div);
|
||||
break;
|
||||
|
||||
|
@ -670,7 +670,7 @@ static int wm8955_set_sysclk(struct snd_soc_dai *dai, int clk_id,
|
|||
|
||||
static int wm8955_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
struct snd_soc_component *component = dai->component;
|
||||
u16 aif = 0;
|
||||
|
||||
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
|
||||
|
@ -739,7 +739,7 @@ static int wm8955_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
snd_soc_update_bits(codec, WM8955_AUDIO_INTERFACE,
|
||||
snd_soc_component_update_bits(component, WM8955_AUDIO_INTERFACE,
|
||||
WM8955_MS | WM8955_FORMAT_MASK | WM8955_BCLKINV |
|
||||
WM8955_LRP, aif);
|
||||
|
||||
|
@ -749,7 +749,7 @@ static int wm8955_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
|
|||
|
||||
static int wm8955_digital_mute(struct snd_soc_dai *codec_dai, int mute)
|
||||
{
|
||||
struct snd_soc_codec *codec = codec_dai->codec;
|
||||
struct snd_soc_component *component = codec_dai->component;
|
||||
int val;
|
||||
|
||||
if (mute)
|
||||
|
@ -757,15 +757,15 @@ static int wm8955_digital_mute(struct snd_soc_dai *codec_dai, int mute)
|
|||
else
|
||||
val = 0;
|
||||
|
||||
snd_soc_update_bits(codec, WM8955_DAC_CONTROL, WM8955_DACMU, val);
|
||||
snd_soc_component_update_bits(component, WM8955_DAC_CONTROL, WM8955_DACMU, val);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wm8955_set_bias_level(struct snd_soc_codec *codec,
|
||||
static int wm8955_set_bias_level(struct snd_soc_component *component,
|
||||
enum snd_soc_bias_level level)
|
||||
{
|
||||
struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
|
||||
int ret;
|
||||
|
||||
switch (level) {
|
||||
|
@ -774,22 +774,22 @@ static int wm8955_set_bias_level(struct snd_soc_codec *codec,
|
|||
|
||||
case SND_SOC_BIAS_PREPARE:
|
||||
/* VMID resistance 2*50k */
|
||||
snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
|
||||
snd_soc_component_update_bits(component, WM8955_POWER_MANAGEMENT_1,
|
||||
WM8955_VMIDSEL_MASK,
|
||||
0x1 << WM8955_VMIDSEL_SHIFT);
|
||||
|
||||
/* Default bias current */
|
||||
snd_soc_update_bits(codec, WM8955_ADDITIONAL_CONTROL_1,
|
||||
snd_soc_component_update_bits(component, WM8955_ADDITIONAL_CONTROL_1,
|
||||
WM8955_VSEL_MASK,
|
||||
0x2 << WM8955_VSEL_SHIFT);
|
||||
break;
|
||||
|
||||
case SND_SOC_BIAS_STANDBY:
|
||||
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
|
||||
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
|
||||
ret = regulator_bulk_enable(ARRAY_SIZE(wm8955->supplies),
|
||||
wm8955->supplies);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev,
|
||||
dev_err(component->dev,
|
||||
"Failed to enable supplies: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
|
@ -798,7 +798,7 @@ static int wm8955_set_bias_level(struct snd_soc_codec *codec,
|
|||
regcache_sync(wm8955->regmap);
|
||||
|
||||
/* Enable VREF and VMID */
|
||||
snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
|
||||
snd_soc_component_update_bits(component, WM8955_POWER_MANAGEMENT_1,
|
||||
WM8955_VREF |
|
||||
WM8955_VMIDSEL_MASK,
|
||||
WM8955_VREF |
|
||||
|
@ -808,29 +808,29 @@ static int wm8955_set_bias_level(struct snd_soc_codec *codec,
|
|||
msleep(500);
|
||||
|
||||
/* High resistance VROI to maintain outputs */
|
||||
snd_soc_update_bits(codec,
|
||||
snd_soc_component_update_bits(component,
|
||||
WM8955_ADDITIONAL_CONTROL_3,
|
||||
WM8955_VROI, WM8955_VROI);
|
||||
}
|
||||
|
||||
/* Maintain VMID with 2*250k */
|
||||
snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
|
||||
snd_soc_component_update_bits(component, WM8955_POWER_MANAGEMENT_1,
|
||||
WM8955_VMIDSEL_MASK,
|
||||
0x2 << WM8955_VMIDSEL_SHIFT);
|
||||
|
||||
/* Minimum bias current */
|
||||
snd_soc_update_bits(codec, WM8955_ADDITIONAL_CONTROL_1,
|
||||
snd_soc_component_update_bits(component, WM8955_ADDITIONAL_CONTROL_1,
|
||||
WM8955_VSEL_MASK, 0);
|
||||
break;
|
||||
|
||||
case SND_SOC_BIAS_OFF:
|
||||
/* Low resistance VROI to help discharge */
|
||||
snd_soc_update_bits(codec,
|
||||
snd_soc_component_update_bits(component,
|
||||
WM8955_ADDITIONAL_CONTROL_3,
|
||||
WM8955_VROI, 0);
|
||||
|
||||
/* Turn off VMID and VREF */
|
||||
snd_soc_update_bits(codec, WM8955_POWER_MANAGEMENT_1,
|
||||
snd_soc_component_update_bits(component, WM8955_POWER_MANAGEMENT_1,
|
||||
WM8955_VREF |
|
||||
WM8955_VMIDSEL_MASK, 0);
|
||||
|
||||
|
@ -865,70 +865,70 @@ static struct snd_soc_dai_driver wm8955_dai = {
|
|||
.ops = &wm8955_dai_ops,
|
||||
};
|
||||
|
||||
static int wm8955_probe(struct snd_soc_codec *codec)
|
||||
static int wm8955_probe(struct snd_soc_component *component)
|
||||
{
|
||||
struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
|
||||
struct wm8955_pdata *pdata = dev_get_platdata(codec->dev);
|
||||
struct wm8955_priv *wm8955 = snd_soc_component_get_drvdata(component);
|
||||
struct wm8955_pdata *pdata = dev_get_platdata(component->dev);
|
||||
int ret, i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(wm8955->supplies); i++)
|
||||
wm8955->supplies[i].supply = wm8955_supply_names[i];
|
||||
|
||||
ret = devm_regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8955->supplies),
|
||||
ret = devm_regulator_bulk_get(component->dev, ARRAY_SIZE(wm8955->supplies),
|
||||
wm8955->supplies);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
|
||||
dev_err(component->dev, "Failed to request supplies: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = regulator_bulk_enable(ARRAY_SIZE(wm8955->supplies),
|
||||
wm8955->supplies);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
|
||||
dev_err(component->dev, "Failed to enable supplies: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = wm8955_reset(codec);
|
||||
ret = wm8955_reset(component);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
|
||||
dev_err(component->dev, "Failed to issue reset: %d\n", ret);
|
||||
goto err_enable;
|
||||
}
|
||||
|
||||
/* Change some default settings - latch VU and enable ZC */
|
||||
snd_soc_update_bits(codec, WM8955_LEFT_DAC_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8955_LEFT_DAC_VOLUME,
|
||||
WM8955_LDVU, WM8955_LDVU);
|
||||
snd_soc_update_bits(codec, WM8955_RIGHT_DAC_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8955_RIGHT_DAC_VOLUME,
|
||||
WM8955_RDVU, WM8955_RDVU);
|
||||
snd_soc_update_bits(codec, WM8955_LOUT1_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8955_LOUT1_VOLUME,
|
||||
WM8955_LO1VU | WM8955_LO1ZC,
|
||||
WM8955_LO1VU | WM8955_LO1ZC);
|
||||
snd_soc_update_bits(codec, WM8955_ROUT1_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8955_ROUT1_VOLUME,
|
||||
WM8955_RO1VU | WM8955_RO1ZC,
|
||||
WM8955_RO1VU | WM8955_RO1ZC);
|
||||
snd_soc_update_bits(codec, WM8955_LOUT2_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8955_LOUT2_VOLUME,
|
||||
WM8955_LO2VU | WM8955_LO2ZC,
|
||||
WM8955_LO2VU | WM8955_LO2ZC);
|
||||
snd_soc_update_bits(codec, WM8955_ROUT2_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8955_ROUT2_VOLUME,
|
||||
WM8955_RO2VU | WM8955_RO2ZC,
|
||||
WM8955_RO2VU | WM8955_RO2ZC);
|
||||
snd_soc_update_bits(codec, WM8955_MONOOUT_VOLUME,
|
||||
snd_soc_component_update_bits(component, WM8955_MONOOUT_VOLUME,
|
||||
WM8955_MOZC, WM8955_MOZC);
|
||||
|
||||
/* Also enable adaptive bass boost by default */
|
||||
snd_soc_update_bits(codec, WM8955_BASS_CONTROL, WM8955_BB, WM8955_BB);
|
||||
snd_soc_component_update_bits(component, WM8955_BASS_CONTROL, WM8955_BB, WM8955_BB);
|
||||
|
||||
/* Set platform data values */
|
||||
if (pdata) {
|
||||
if (pdata->out2_speaker)
|
||||
snd_soc_update_bits(codec, WM8955_ADDITIONAL_CONTROL_2,
|
||||
snd_soc_component_update_bits(component, WM8955_ADDITIONAL_CONTROL_2,
|
||||
WM8955_ROUT2INV, WM8955_ROUT2INV);
|
||||
|
||||
if (pdata->monoin_diff)
|
||||
snd_soc_update_bits(codec, WM8955_MONO_OUT_MIX_1,
|
||||
snd_soc_component_update_bits(component, WM8955_MONO_OUT_MIX_1,
|
||||
WM8955_DMEN, WM8955_DMEN);
|
||||
}
|
||||
|
||||
snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
snd_soc_component_force_bias_level(component, SND_SOC_BIAS_STANDBY);
|
||||
|
||||
/* Bias level configuration will have done an extra enable */
|
||||
regulator_bulk_disable(ARRAY_SIZE(wm8955->supplies), wm8955->supplies);
|
||||
|
@ -940,19 +940,20 @@ static int wm8955_probe(struct snd_soc_codec *codec)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static const struct snd_soc_codec_driver soc_codec_dev_wm8955 = {
|
||||
.probe = wm8955_probe,
|
||||
.set_bias_level = wm8955_set_bias_level,
|
||||
.suspend_bias_off = true,
|
||||
|
||||
.component_driver = {
|
||||
.controls = wm8955_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(wm8955_snd_controls),
|
||||
.dapm_widgets = wm8955_dapm_widgets,
|
||||
.num_dapm_widgets = ARRAY_SIZE(wm8955_dapm_widgets),
|
||||
.dapm_routes = wm8955_dapm_routes,
|
||||
.num_dapm_routes = ARRAY_SIZE(wm8955_dapm_routes),
|
||||
},
|
||||
static const struct snd_soc_component_driver soc_component_dev_wm8955 = {
|
||||
.probe = wm8955_probe,
|
||||
.set_bias_level = wm8955_set_bias_level,
|
||||
.controls = wm8955_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(wm8955_snd_controls),
|
||||
.dapm_widgets = wm8955_dapm_widgets,
|
||||
.num_dapm_widgets = ARRAY_SIZE(wm8955_dapm_widgets),
|
||||
.dapm_routes = wm8955_dapm_routes,
|
||||
.num_dapm_routes = ARRAY_SIZE(wm8955_dapm_routes),
|
||||
.suspend_bias_off = 1,
|
||||
.idle_bias_on = 1,
|
||||
.use_pmdown_time = 1,
|
||||
.endianness = 1,
|
||||
.non_legacy_dai_naming = 1,
|
||||
};
|
||||
|
||||
static const struct regmap_config wm8955_regmap = {
|
||||
|
@ -989,19 +990,12 @@ static int wm8955_i2c_probe(struct i2c_client *i2c,
|
|||
|
||||
i2c_set_clientdata(i2c, wm8955);
|
||||
|
||||
ret = snd_soc_register_codec(&i2c->dev,
|
||||
&soc_codec_dev_wm8955, &wm8955_dai, 1);
|
||||
ret = devm_snd_soc_register_component(&i2c->dev,
|
||||
&soc_component_dev_wm8955, &wm8955_dai, 1);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int wm8955_i2c_remove(struct i2c_client *client)
|
||||
{
|
||||
snd_soc_unregister_codec(&client->dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct i2c_device_id wm8955_i2c_id[] = {
|
||||
{ "wm8955", 0 },
|
||||
{ }
|
||||
|
@ -1013,7 +1007,6 @@ static struct i2c_driver wm8955_i2c_driver = {
|
|||
.name = "wm8955",
|
||||
},
|
||||
.probe = wm8955_i2c_probe,
|
||||
.remove = wm8955_i2c_remove,
|
||||
.id_table = wm8955_i2c_id,
|
||||
};
|
||||
|
||||
|
|
|
@ -170,7 +170,7 @@ static const struct snd_kcontrol_new tegra_wm8903_controls[] = {
|
|||
static int tegra_wm8903_init(struct snd_soc_pcm_runtime *rtd)
|
||||
{
|
||||
struct snd_soc_dai *codec_dai = rtd->codec_dai;
|
||||
struct snd_soc_codec *codec = codec_dai->codec;
|
||||
struct snd_soc_component *component = codec_dai->component;
|
||||
struct snd_soc_card *card = rtd->card;
|
||||
struct tegra_wm8903 *machine = snd_soc_card_get_drvdata(card);
|
||||
|
||||
|
@ -189,7 +189,7 @@ static int tegra_wm8903_init(struct snd_soc_pcm_runtime *rtd)
|
|||
&tegra_wm8903_mic_jack,
|
||||
tegra_wm8903_mic_jack_pins,
|
||||
ARRAY_SIZE(tegra_wm8903_mic_jack_pins));
|
||||
wm8903_mic_detect(codec, &tegra_wm8903_mic_jack, SND_JACK_MICROPHONE,
|
||||
wm8903_mic_detect(component, &tegra_wm8903_mic_jack, SND_JACK_MICROPHONE,
|
||||
0);
|
||||
|
||||
snd_soc_dapm_force_enable_pin(&card->dapm, "MICBIAS");
|
||||
|
@ -202,9 +202,9 @@ static int tegra_wm8903_remove(struct snd_soc_card *card)
|
|||
struct snd_soc_pcm_runtime *rtd =
|
||||
snd_soc_get_pcm_runtime(card, card->dai_link[0].name);
|
||||
struct snd_soc_dai *codec_dai = rtd->codec_dai;
|
||||
struct snd_soc_codec *codec = codec_dai->codec;
|
||||
struct snd_soc_component *component = codec_dai->component;
|
||||
|
||||
wm8903_mic_detect(codec, NULL, 0, 0);
|
||||
wm8903_mic_detect(component, NULL, 0, 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
Loading…
Reference in a new issue