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mmc: sdhci: Optimize delay loops
The delay loops for reset and clock enable always take at least 1 ms because they use mdelay(1). However they can take a lot less time e.g. less than 50us. Use ktime and reduce the delay to 10 microseconds per loop. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
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1 changed files with 9 additions and 10 deletions
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@ -14,6 +14,7 @@
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*/
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#include <linux/delay.h>
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#include <linux/ktime.h>
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#include <linux/highmem.h>
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#include <linux/io.h>
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#include <linux/module.h>
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@ -165,7 +166,7 @@ static void sdhci_runtime_pm_bus_off(struct sdhci_host *host)
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void sdhci_reset(struct sdhci_host *host, u8 mask)
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{
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unsigned long timeout;
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ktime_t timeout;
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sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET);
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@ -177,18 +178,17 @@ void sdhci_reset(struct sdhci_host *host, u8 mask)
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}
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/* Wait max 100 ms */
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timeout = 100;
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timeout = ktime_add_ms(ktime_get(), 100);
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/* hw clears the bit when it's done */
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while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
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if (timeout == 0) {
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if (ktime_after(ktime_get(), timeout)) {
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pr_err("%s: Reset 0x%x never completed.\n",
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mmc_hostname(host->mmc), (int)mask);
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sdhci_dumpregs(host);
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return;
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}
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timeout--;
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mdelay(1);
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udelay(10);
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}
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}
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EXPORT_SYMBOL_GPL(sdhci_reset);
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@ -1346,24 +1346,23 @@ EXPORT_SYMBOL_GPL(sdhci_calc_clk);
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void sdhci_enable_clk(struct sdhci_host *host, u16 clk)
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{
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unsigned long timeout;
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ktime_t timeout;
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clk |= SDHCI_CLOCK_INT_EN;
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sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
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/* Wait max 20 ms */
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timeout = 20;
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timeout = ktime_add_ms(ktime_get(), 20);
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while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
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& SDHCI_CLOCK_INT_STABLE)) {
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if (timeout == 0) {
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if (ktime_after(ktime_get(), timeout)) {
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pr_err("%s: Internal clock never stabilised.\n",
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mmc_hostname(host->mmc));
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sdhci_dumpregs(host);
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return;
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}
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timeout--;
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spin_unlock_irq(&host->lock);
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usleep_range(900, 1100);
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udelay(10);
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spin_lock_irq(&host->lock);
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}
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