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i2c: iproc: Add i2c repeated start capability
Enable handling of i2c repeated start. The current code handles a multi msg i2c transfer as separate i2c bus transactions. This change will now handle this case using the i2c repeated start protocol. The number of msgs in a transfer is limited to two, and must be a write followed by a read. Signed-off-by: Lori Hikichi <lori.hikichi@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Icarus Chau <icarus.chau@broadcom.com> Signed-off-by: Ray Jui <ray.jui@broadcom.com> Signed-off-by: Shivaraj Shetty <sshetty1@broadcom.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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commit
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1 changed files with 50 additions and 13 deletions
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@ -81,6 +81,7 @@
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#define M_CMD_PROTOCOL_MASK 0xf
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#define M_CMD_PROTOCOL_BLK_WR 0x7
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#define M_CMD_PROTOCOL_BLK_RD 0x8
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#define M_CMD_PROTOCOL_PROCESS 0xa
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#define M_CMD_PEC_SHIFT 8
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#define M_CMD_RD_CNT_SHIFT 0
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#define M_CMD_RD_CNT_MASK 0xff
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@ -675,13 +676,20 @@ static int bcm_iproc_i2c_xfer_wait(struct bcm_iproc_i2c_dev *iproc_i2c,
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return 0;
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}
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static int bcm_iproc_i2c_xfer_single_msg(struct bcm_iproc_i2c_dev *iproc_i2c,
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struct i2c_msg *msg)
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/*
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* If 'process_call' is true, then this is a multi-msg transfer that requires
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* a repeated start between the messages.
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* More specifically, it must be a write (reg) followed by a read (data).
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* The i2c quirks are set to enforce this rule.
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*/
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static int bcm_iproc_i2c_xfer_internal(struct bcm_iproc_i2c_dev *iproc_i2c,
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struct i2c_msg *msgs, bool process_call)
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{
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int i;
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u8 addr;
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u32 val, tmp, val_intr_en;
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unsigned int tx_bytes;
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struct i2c_msg *msg = &msgs[0];
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/* check if bus is busy */
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if (!!(iproc_i2c_rd_reg(iproc_i2c,
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@ -707,14 +715,29 @@ static int bcm_iproc_i2c_xfer_single_msg(struct bcm_iproc_i2c_dev *iproc_i2c,
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val = msg->buf[i];
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/* mark the last byte */
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if (i == msg->len - 1)
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val |= BIT(M_TX_WR_STATUS_SHIFT);
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if (!process_call && (i == msg->len - 1))
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val |= 1 << M_TX_WR_STATUS_SHIFT;
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iproc_i2c_wr_reg(iproc_i2c, M_TX_OFFSET, val);
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}
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iproc_i2c->tx_bytes = tx_bytes;
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}
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/* Process the read message if this is process call */
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if (process_call) {
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msg++;
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iproc_i2c->msg = msg; /* point to second msg */
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/*
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* The last byte to be sent out should be a slave
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* address with read operation
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*/
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addr = i2c_8bit_addr_from_msg(msg);
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/* mark it the last byte out */
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val = addr | (1 << M_TX_WR_STATUS_SHIFT);
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iproc_i2c_wr_reg(iproc_i2c, M_TX_OFFSET, val);
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}
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/* mark as incomplete before starting the transaction */
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if (iproc_i2c->irq)
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reinit_completion(&iproc_i2c->done);
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@ -733,7 +756,7 @@ static int bcm_iproc_i2c_xfer_single_msg(struct bcm_iproc_i2c_dev *iproc_i2c,
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* underrun interrupt, which will be triggerred when the TX FIFO is
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* empty. When that happens we can then pump more data into the FIFO
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*/
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if (!(msg->flags & I2C_M_RD) &&
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if (!process_call && !(msg->flags & I2C_M_RD) &&
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msg->len > iproc_i2c->tx_bytes)
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val_intr_en |= BIT(IE_M_TX_UNDERRUN_SHIFT);
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@ -743,6 +766,8 @@ static int bcm_iproc_i2c_xfer_single_msg(struct bcm_iproc_i2c_dev *iproc_i2c,
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*/
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val = BIT(M_CMD_START_BUSY_SHIFT);
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if (msg->flags & I2C_M_RD) {
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u32 protocol;
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iproc_i2c->rx_bytes = 0;
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if (msg->len > M_RX_FIFO_MAX_THLD_VALUE)
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iproc_i2c->thld_bytes = M_RX_FIFO_THLD_VALUE;
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@ -758,7 +783,10 @@ static int bcm_iproc_i2c_xfer_single_msg(struct bcm_iproc_i2c_dev *iproc_i2c,
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/* enable the RX threshold interrupt */
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val_intr_en |= BIT(IE_M_RX_THLD_SHIFT);
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val |= (M_CMD_PROTOCOL_BLK_RD << M_CMD_PROTOCOL_SHIFT) |
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protocol = process_call ?
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M_CMD_PROTOCOL_PROCESS : M_CMD_PROTOCOL_BLK_RD;
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val |= (protocol << M_CMD_PROTOCOL_SHIFT) |
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(msg->len << M_CMD_RD_CNT_SHIFT);
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} else {
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val |= (M_CMD_PROTOCOL_BLK_WR << M_CMD_PROTOCOL_SHIFT);
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@ -774,17 +802,24 @@ static int bcm_iproc_i2c_xfer(struct i2c_adapter *adapter,
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struct i2c_msg msgs[], int num)
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{
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struct bcm_iproc_i2c_dev *iproc_i2c = i2c_get_adapdata(adapter);
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int ret, i;
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bool process_call = false;
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int ret;
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/* go through all messages */
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for (i = 0; i < num; i++) {
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ret = bcm_iproc_i2c_xfer_single_msg(iproc_i2c, &msgs[i]);
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if (ret) {
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dev_dbg(iproc_i2c->device, "xfer failed\n");
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return ret;
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if (num == 2) {
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/* Repeated start, use process call */
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process_call = true;
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if (msgs[1].flags & I2C_M_NOSTART) {
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dev_err(iproc_i2c->device, "Invalid repeated start\n");
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return -EOPNOTSUPP;
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}
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}
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ret = bcm_iproc_i2c_xfer_internal(iproc_i2c, msgs, process_call);
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if (ret) {
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dev_dbg(iproc_i2c->device, "xfer failed\n");
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return ret;
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}
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return num;
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}
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@ -809,6 +844,8 @@ static struct i2c_algorithm bcm_iproc_algo = {
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};
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static const struct i2c_adapter_quirks bcm_iproc_i2c_quirks = {
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.flags = I2C_AQ_COMB_WRITE_THEN_READ,
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.max_comb_1st_msg_len = M_TX_RX_FIFO_SIZE,
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.max_read_len = M_RX_MAX_READ_LEN,
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};
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