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ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk07.1-c1 board file 

Reviewed-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This commit is contained in:
Sricharan R 2018-05-25 11:41:18 +05:30 committed by Andy Gross
parent f97b2aaaf0
commit 5ade893ec0
2 changed files with 65 additions and 0 deletions
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1
arch/arm/boot/dts/Makefile
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@ -762,6 +762,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-ipq4019-ap.dk01.1-c1.dtb \
qcom-ipq4019-ap.dk04.1-c1.dtb \
qcom-ipq4019-ap.dk04.1-c3.dtb \
qcom-ipq4019-ap.dk07.1-c1.dtb \
qcom-ipq8064-ap148.dtb \
qcom-msm8660-surf.dtb \
qcom-msm8960-cdp.dtb \

64
arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts Normal file
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@ -0,0 +1,64 @@
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2018, The Linux Foundation. All rights reserved.
#include "qcom-ipq4019-ap.dk07.1.dtsi"
/ {
model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1-C1";
compatible = "qcom,ipq4019-ap-dk07.1-c1";
soc {
pci@40000000 {
status = "ok";
perst-gpio = <&tlmm 38 0x1>;
};
spi@78b6000 {
status = "ok";
};
pinctrl@1000000 {
serial_1_pins: serial1-pinmux {
pins = "gpio8", "gpio9",
"gpio10", "gpio11";
function = "blsp_uart1";
bias-disable;
};
spi_0_pins: spi-0-pinmux {
pinmux {
function = "blsp_spi0";
pins = "gpio13", "gpio14", "gpio15";
bias-disable;
};
pinmux_cs {
function = "gpio";
pins = "gpio12";
bias-disable;
output-high;
};
};
};
serial@78b0000 {
pinctrl-0 = <&serial_1_pins>;
pinctrl-names = "default";
status = "ok";
};
spi@78b5000 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "ok";
cs-gpios = <&tlmm 12 0>;
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
spi-max-frequency = <24000000>;
};
};
};
};