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mmc: sdhci-esdhc-imx: improve ESDHC_FLAG_ERR010450 

Errata ERR010450 only shows up if voltage is 1.8V, but if the device is
supplied by 3v3 the errata can be ignored. So let's check for if quirk
SDHCI_QUIRK2_NO_1_8_V is defined or not before limiting the frequency.

Cc: Jim Reinhart <jimr@tekvox.com>
Cc: James Autry <jautry@tekvox.com>
Cc: Matthew Maron <matthewm@tekvox.com>
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Acked-by: Haibo Chen <haibo.chen@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20230811214853.8623-1-giulio.benetti@benettiengineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Giulio Benetti 2023-08-11 23:48:53 +02:00 committed by Ulf Hansson
parent 899171dc4e
commit 5ae4b0d887
1 changed files with 4 additions and 3 deletions
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7
drivers/mmc/host/sdhci-esdhc-imx.c
View File

@ -171,8 +171,8 @@
#define ESDHC_FLAG_HS400 BIT(9)
/*
* The IP has errata ERR010450
* uSDHC: Due to the I/O timing limit, for SDR mode, SD card clock can't
* exceed 150MHz, for DDR mode, SD card clock can't exceed 45MHz.
* uSDHC: At 1.8V due to the I/O timing limit, for SDR mode, SD card
* clock can't exceed 150MHz, for DDR mode, SD card clock can't exceed 45MHz.
*/
#define ESDHC_FLAG_ERR010450 BIT(10)
/* The IP supports HS400ES mode */
@ -961,7 +961,8 @@ static inline void esdhc_pltfm_set_clock(struct sdhci_host *host,
| ESDHC_CLOCK_MASK);
sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
if (imx_data->socdata->flags & ESDHC_FLAG_ERR010450) {
if ((imx_data->socdata->flags & ESDHC_FLAG_ERR010450) &&
(!(host->quirks2 & SDHCI_QUIRK2_NO_1_8_V))) {
unsigned int max_clock;
max_clock = imx_data->is_ddr ? 45000000 : 150000000;