Enable initial ARM multi-platform support for highbank, mvebu,

socfpga, picoxcell, and vexpress.
 
 Multi-platform support is dependent on mach/gpio.h removal and
 restructuring of DEBUG_LL and dtb build rules included in this branch.
 
 This has been built for all defconfigs, and booted on highbank with
 all 5 platforms enabled.
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Merge tag 'multi-platform-for-3.7' of git://sources.calxeda.com/kernel/linux into next/multiplatform

Enable initial ARM multi-platform support for highbank, mvebu,
socfpga, picoxcell, and vexpress.

Multi-platform support is dependent on mach/gpio.h removal and
restructuring of DEBUG_LL and dtb build rules included in this branch.

This has been built for all defconfigs, and booted on highbank with
all 5 platforms enabled.

By Rob Herring (18) and Arnd Bergmann (1)
via Rob Herring
* tag 'multi-platform-for-3.7' of git://sources.calxeda.com/kernel/linux:
  ARM: vexpress: convert to multi-platform
  ARM: initial multiplatform support
  ARM: mvebu: move armada-370-xp.h in mach dir
  ARM: vexpress: remove dependency on mach/* headers
  ARM: picoxcell: remove dependency on mach/* headers
  ARM: move all dtb targets out of Makefile.boot
  ARM: picoxcell: move debug macros to include/debug
  ARM: socfpga: move debug macros to include/debug
  ARM: mvebu: move debug macros to include/debug
  ARM: vexpress: move debug macros to include/debug
  ARM: highbank: move debug macros to include/debug
  ARM: move debug macros to common location
  ARM: make mach/gpio.h headers optional
  ARM: orion: move custom gpio functions to orion-gpio.h
  ARM: shmobile: move custom gpio functions to sh-gpio.h
  ARM: pxa: use gpio_to_irq for sharppm_sl
  net: pxaficp_ir: add irq resources
  usb: pxa27x_udc: remove IRQ_USB define
  staging: ste_rmi4: remove gpio.h include

Conflicts due to addition of bcm2835 and removal of pnx4008 in:
	arch/arm/Kconfig
	arch/arm/Makefile

Conflicts due to new dtb targets, moved to arch/arm/boot/dts/Makefile in:
	arch/arm/mach-imx/Makefile.boot
	arch/arm/mach-mxs/Makefile.boot
	arch/arm/mach-tegra/Makefile.boot

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2012-09-20 22:53:18 -07:00
commit 5ae8d15f68
111 changed files with 573 additions and 880 deletions

View File

@ -202,6 +202,13 @@ config ARM_PATCH_PHYS_VIRT
this feature (eg, building a kernel for a single machine) and
you need to shrink the kernel to the minimal size.
config NEED_MACH_GPIO_H
bool
help
Select this when mach/gpio.h is required to provide special
definitions for this platform. The need for mach/gpio.h should
be avoided when possible.
config NEED_MACH_IO_H
bool
help
@ -247,26 +254,17 @@ config MMU
#
choice
prompt "ARM system type"
default ARCH_VERSATILE
default ARCH_MULTIPLATFORM
config ARCH_SOCFPGA
bool "Altera SOCFPGA family"
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_AMBA
select ARM_GIC
select CACHE_L2X0
select CLKDEV_LOOKUP
config ARCH_MULTIPLATFORM
bool "Allow multiple platforms to be selected"
select ARM_PATCH_PHYS_VIRT
select AUTO_ZRELADDR
select COMMON_CLK
select CPU_V7
select DW_APB_TIMER
select DW_APB_TIMER_OF
select GENERIC_CLOCKEVENTS
select GPIO_PL061 if GPIOLIB
select HAVE_ARM_SCU
select MULTI_IRQ_HANDLER
select SPARSE_IRQ
select USE_OF
help
This enables support for Altera SOCFPGA Cyclone V platform
depends on MMU
config ARCH_INTEGRATOR
bool "ARM Ltd. Integrator family"
@ -318,30 +316,13 @@ config ARCH_VERSATILE
help
This enables support for ARM Ltd Versatile board.
config ARCH_VEXPRESS
bool "ARM Ltd. Versatile Express family"
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_AMBA
select ARM_TIMER_SP804
select CLKDEV_LOOKUP
select COMMON_CLK
select GENERIC_CLOCKEVENTS
select HAVE_CLK
select HAVE_PATA_PLATFORM
select ICST
select NO_IOPORT
select PLAT_VERSATILE
select PLAT_VERSATILE_CLCD
select REGULATOR_FIXED_VOLTAGE if REGULATOR
help
This enables support for the ARM Ltd Versatile Express boards.
config ARCH_AT91
bool "Atmel AT91"
select ARCH_REQUIRE_GPIOLIB
select HAVE_CLK
select CLKDEV_LOOKUP
select IRQ_DOMAIN
select NEED_MACH_GPIO_H
select NEED_MACH_IO_H if PCCARD
help
This enables support for systems based on Atmel
@ -376,24 +357,6 @@ config ARCH_BCMRING
help
Support for Broadcom's BCMRing platform.
config ARCH_HIGHBANK
bool "Calxeda Highbank-based"
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_AMBA
select ARM_GIC
select ARM_TIMER_SP804
select CACHE_L2X0
select CLKDEV_LOOKUP
select COMMON_CLK
select CPU_V7
select GENERIC_CLOCKEVENTS
select HAVE_ARM_SCU
select HAVE_SMP
select SPARSE_IRQ
select USE_OF
help
Support for the Calxeda Highbank SoC based boards.
config ARCH_CLPS711X
bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
select CPU_ARM720T
@ -534,6 +497,8 @@ config ARCH_IOP32X
bool "IOP32x-based"
depends on MMU
select CPU_XSCALE
select NEED_MACH_GPIO_H
select NEED_MACH_IO_H
select NEED_RET_TO_USER
select PLAT_IOP
select PCI
@ -546,6 +511,8 @@ config ARCH_IOP33X
bool "IOP33x-based"
depends on MMU
select CPU_XSCALE
select NEED_MACH_GPIO_H
select NEED_MACH_IO_H
select NEED_RET_TO_USER
select PLAT_IOP
select PCI
@ -567,18 +534,6 @@ config ARCH_IXP4XX
help
Support for Intel's IXP4XX (XScale) family of processors.
config ARCH_MVEBU
bool "Marvell SOCs with Device Tree support"
select GENERIC_CLOCKEVENTS
select MULTI_IRQ_HANDLER
select SPARSE_IRQ
select CLKSRC_MMIO
select GENERIC_IRQ_CHIP
select IRQ_DOMAIN
select COMMON_CLK
help
Support for the Marvell SoC Family with device tree support
config ARCH_DOVE
bool "Marvell Dove"
select CPU_V7
@ -650,6 +605,7 @@ config ARCH_MMP
select PLAT_PXA
select SPARSE_IRQ
select GENERIC_ALLOCATOR
select NEED_MACH_GPIO_H
help
Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
@ -696,25 +652,6 @@ config ARCH_TEGRA
This enables support for NVIDIA Tegra based systems (Tegra APX,
Tegra 6xx and Tegra 2 series).
config ARCH_PICOXCELL
bool "Picochip picoXcell"
select ARCH_REQUIRE_GPIOLIB
select ARM_PATCH_PHYS_VIRT
select ARM_VIC
select CPU_V6K
select DW_APB_TIMER
select DW_APB_TIMER_OF
select GENERIC_CLOCKEVENTS
select GENERIC_GPIO
select HAVE_TCM
select NO_IOPORT
select SPARSE_IRQ
select USE_OF
help
This enables support for systems based on the Picochip picoXcell
family of Femtocell devices. The picoxcell support requires device tree
for all boards.
config ARCH_PXA
bool "PXA2xx/PXA3xx-based"
depends on MMU
@ -731,6 +668,7 @@ config ARCH_PXA
select MULTI_IRQ_HANDLER
select ARM_CPU_SUSPEND if PM
select HAVE_IDE
select NEED_MACH_GPIO_H
help
Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
@ -793,6 +731,7 @@ config ARCH_SA1100
select CLKDEV_LOOKUP
select ARCH_REQUIRE_GPIOLIB
select HAVE_IDE
select NEED_MACH_GPIO_H
select NEED_MACH_MEMORY_H
select SPARSE_IRQ
help
@ -808,6 +747,7 @@ config ARCH_S3C24XX
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C_RTC if RTC_CLASS
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select NEED_MACH_GPIO_H
select NEED_MACH_IO_H
help
Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
@ -835,6 +775,7 @@ config ARCH_S3C64XX
select SAMSUNG_GPIOLIB_4BIT
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select NEED_MACH_GPIO_H
help
Samsung S3C64XX series based systems
@ -849,6 +790,7 @@ config ARCH_S5P64X0
select GENERIC_CLOCKEVENTS
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C_RTC if RTC_CLASS
select NEED_MACH_GPIO_H
help
Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
SMDK6450.
@ -863,6 +805,7 @@ config ARCH_S5PC100
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C_RTC if RTC_CLASS
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select NEED_MACH_GPIO_H
help
Samsung S5PC100 series based systems
@ -880,6 +823,7 @@ config ARCH_S5PV210
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C_RTC if RTC_CLASS
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select NEED_MACH_GPIO_H
select NEED_MACH_MEMORY_H
help
Samsung S5PV210/S5PC110 series based systems
@ -897,6 +841,7 @@ config ARCH_EXYNOS
select HAVE_S3C_RTC if RTC_CLASS
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select NEED_MACH_GPIO_H
select NEED_MACH_MEMORY_H
help
Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
@ -969,6 +914,7 @@ config ARCH_DAVINCI
select GENERIC_ALLOCATOR
select GENERIC_IRQ_CHIP
select ARCH_HAS_HOLES_MEMORYMODEL
select NEED_MACH_GPIO_H
help
Support for TI's DaVinci platform.
@ -981,6 +927,7 @@ config ARCH_OMAP
select CLKSRC_MMIO
select GENERIC_CLOCKEVENTS
select ARCH_HAS_HOLES_MEMORYMODEL
select NEED_MACH_GPIO_H
help
Support for TI's OMAP platform (OMAP1/2/3/4).
@ -1020,6 +967,50 @@ config ARCH_ZYNQ
Support for Xilinx Zynq ARM Cortex A9 Platform
endchoice
menu "Multiple platform selection"
depends on ARCH_MULTIPLATFORM
comment "CPU Core family selection"
config ARCH_MULTI_V4
bool "ARMv4 based platforms (FA526, StrongARM)"
select ARCH_MULTI_V4_V5
depends on !ARCH_MULTI_V6_V7
config ARCH_MULTI_V4T
bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
select ARCH_MULTI_V4_V5
depends on !ARCH_MULTI_V6_V7
config ARCH_MULTI_V5
bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
select ARCH_MULTI_V4_V5
depends on !ARCH_MULTI_V6_V7
config ARCH_MULTI_V4_V5
bool
config ARCH_MULTI_V6
bool "ARMv6 based platforms (ARM11, Scorpion, ...)"
select CPU_V6
select ARCH_MULTI_V6_V7
config ARCH_MULTI_V7
bool "ARMv7 based platforms (Cortex-A, PJ4, Krait)"
select CPU_V7
select ARCH_VEXPRESS
default y
select ARCH_MULTI_V6_V7
config ARCH_MULTI_V6_V7
bool
config ARCH_MULTI_CPU_AUTO
def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
select ARCH_MULTI_V5
endmenu
#
# This is sorted alphabetically by mach-* pathname. However, plat-*
# Kconfigs may be included either alphabetically (according to the
@ -1047,6 +1038,8 @@ source "arch/arm/mach-gemini/Kconfig"
source "arch/arm/mach-h720x/Kconfig"
source "arch/arm/mach-highbank/Kconfig"
source "arch/arm/mach-integrator/Kconfig"
source "arch/arm/mach-iop32x/Kconfig"
@ -1082,6 +1075,8 @@ source "arch/arm/mach-omap2/Kconfig"
source "arch/arm/mach-orion5x/Kconfig"
source "arch/arm/mach-picoxcell/Kconfig"
source "arch/arm/mach-pxa/Kconfig"
source "arch/arm/plat-pxa/Kconfig"
@ -1094,6 +1089,8 @@ source "arch/arm/mach-sa1100/Kconfig"
source "arch/arm/plat-samsung/Kconfig"
source "arch/arm/plat-s3c24xx/Kconfig"
source "arch/arm/mach-socfpga/Kconfig"
source "arch/arm/plat-spear/Kconfig"
source "arch/arm/mach-s3c24xx/Kconfig"
@ -2054,7 +2051,7 @@ endchoice
config XIP_KERNEL
bool "Kernel Execute-In-Place from ROM"
depends on !ZBOOT_ROM && !ARM_LPAE
depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM
help
Execute-In-Place allows the kernel to run from non-volatile storage
directly addressable by the CPU, such as NOR flash. This saves RAM

View File

@ -261,6 +261,20 @@ choice
Say Y here if you want the debug print routines to direct
their output to the serial port on MSM 8960 devices.
config DEBUG_MVEBU_UART
bool "Kernel low-level debugging messages via MVEBU UART"
depends on ARCH_MVEBU
help
Say Y here if you want kernel low-level debugging support
on MVEBU based platforms.
config DEBUG_PICOXCELL_UART
depends on ARCH_PICOXCELL
bool "Use PicoXcell UART for low-level debug"
help
Say Y here if you want kernel low-level debugging support
on PicoXcell based platforms.
config DEBUG_REALVIEW_STD_PORT
bool "RealView Default UART"
depends on ARCH_REALVIEW
@ -310,6 +324,13 @@ choice
The uncompressor code port configuration is now handled
by CONFIG_S3C_LOWLEVEL_UART_PORT.
config DEBUG_SOCFPGA_UART
depends on ARCH_SOCFPGA
bool "Use SOCFPGA UART for low-level debug"
help
Say Y here if you want kernel low-level debugging support
on SOCFPGA based platforms.
config DEBUG_VEXPRESS_UART0_DETECT
bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
depends on ARCH_VEXPRESS && CPU_CP15_MMU
@ -338,6 +359,7 @@ choice
config DEBUG_LL_UART_NONE
bool "No low-level debugging UART"
depends on !ARCH_MULTIPLATFORM
help
Say Y here if your platform doesn't provide a UART option
below. This relies on your platform choosing the right UART
@ -373,6 +395,17 @@ choice
endchoice
config DEBUG_LL_INCLUDE
string
default "debug/icedcc.S" if DEBUG_ICEDCC
default "debug/highbank.S" if DEBUG_HIGHBANK_UART
default "debug/mvebu.S" if DEBUG_MVEBU_UART
default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
default "debug/socfpga.S" if DEBUG_SOCFPGA_UART
default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \
DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1
default "mach/debug-macro.S"
config EARLY_PRINTK
bool "Early printk"
depends on DEBUG_LL

View File

@ -135,84 +135,79 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
# Machine directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
machine-$(CONFIG_ARCH_AT91) := at91
machine-$(CONFIG_ARCH_BCM2835) := bcm2835
machine-$(CONFIG_ARCH_BCMRING) := bcmring
machine-$(CONFIG_ARCH_CLPS711X) := clps711x
machine-$(CONFIG_ARCH_CNS3XXX) := cns3xxx
machine-$(CONFIG_ARCH_DAVINCI) := davinci
machine-$(CONFIG_ARCH_DOVE) := dove
machine-$(CONFIG_ARCH_EBSA110) := ebsa110
machine-$(CONFIG_ARCH_EP93XX) := ep93xx
machine-$(CONFIG_ARCH_GEMINI) := gemini
machine-$(CONFIG_ARCH_H720X) := h720x
machine-$(CONFIG_ARCH_HIGHBANK) := highbank
machine-$(CONFIG_ARCH_INTEGRATOR) := integrator
machine-$(CONFIG_ARCH_IOP13XX) := iop13xx
machine-$(CONFIG_ARCH_IOP32X) := iop32x
machine-$(CONFIG_ARCH_IOP33X) := iop33x
machine-$(CONFIG_ARCH_IXP4XX) := ixp4xx
machine-$(CONFIG_ARCH_KIRKWOOD) := kirkwood
machine-$(CONFIG_ARCH_KS8695) := ks8695
machine-$(CONFIG_ARCH_LPC32XX) := lpc32xx
machine-$(CONFIG_ARCH_MMP) := mmp
machine-$(CONFIG_ARCH_MSM) := msm
machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0
machine-$(CONFIG_ARCH_IMX_V4_V5) := imx
machine-$(CONFIG_ARCH_IMX_V6_V7) := imx
machine-$(CONFIG_ARCH_MXS) := mxs
machine-$(CONFIG_ARCH_MVEBU) := mvebu
machine-$(CONFIG_ARCH_NETX) := netx
machine-$(CONFIG_ARCH_NOMADIK) := nomadik
machine-$(CONFIG_ARCH_OMAP1) := omap1
machine-$(CONFIG_ARCH_OMAP2PLUS) := omap2
machine-$(CONFIG_ARCH_ORION5X) := orion5x
machine-$(CONFIG_ARCH_PICOXCELL) := picoxcell
machine-$(CONFIG_ARCH_PRIMA2) := prima2
machine-$(CONFIG_ARCH_PXA) := pxa
machine-$(CONFIG_ARCH_REALVIEW) := realview
machine-$(CONFIG_ARCH_RPC) := rpc
machine-$(CONFIG_ARCH_S3C24XX) := s3c24xx s3c2412 s3c2440
machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx
machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0
machine-$(CONFIG_ARCH_S5PC100) := s5pc100
machine-$(CONFIG_ARCH_S5PV210) := s5pv210
machine-$(CONFIG_ARCH_EXYNOS4) := exynos
machine-$(CONFIG_ARCH_EXYNOS5) := exynos
machine-$(CONFIG_ARCH_SA1100) := sa1100
machine-$(CONFIG_ARCH_SHARK) := shark
machine-$(CONFIG_ARCH_SHMOBILE) := shmobile
machine-$(CONFIG_ARCH_TEGRA) := tegra
machine-$(CONFIG_ARCH_U300) := u300
machine-$(CONFIG_ARCH_U8500) := ux500
machine-$(CONFIG_ARCH_VERSATILE) := versatile
machine-$(CONFIG_ARCH_VEXPRESS) := vexpress
machine-$(CONFIG_ARCH_VT8500) := vt8500
machine-$(CONFIG_ARCH_W90X900) := w90x900
machine-$(CONFIG_FOOTBRIDGE) := footbridge
machine-$(CONFIG_ARCH_SOCFPGA) := socfpga
machine-$(CONFIG_MACH_SPEAR1310) := spear13xx
machine-$(CONFIG_MACH_SPEAR1340) := spear13xx
machine-$(CONFIG_MACH_SPEAR300) := spear3xx
machine-$(CONFIG_MACH_SPEAR310) := spear3xx
machine-$(CONFIG_MACH_SPEAR320) := spear3xx
machine-$(CONFIG_MACH_SPEAR600) := spear6xx
machine-$(CONFIG_ARCH_ZYNQ) := zynq
machine-$(CONFIG_ARCH_AT91) += at91
machine-$(CONFIG_ARCH_BCM2835) += bcm2835
machine-$(CONFIG_ARCH_BCMRING) += bcmring
machine-$(CONFIG_ARCH_CLPS711X) += clps711x
machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx
machine-$(CONFIG_ARCH_DAVINCI) += davinci
machine-$(CONFIG_ARCH_DOVE) += dove
machine-$(CONFIG_ARCH_EBSA110) += ebsa110
machine-$(CONFIG_ARCH_EP93XX) += ep93xx
machine-$(CONFIG_ARCH_GEMINI) += gemini
machine-$(CONFIG_ARCH_H720X) += h720x
machine-$(CONFIG_ARCH_HIGHBANK) += highbank
machine-$(CONFIG_ARCH_INTEGRATOR) += integrator
machine-$(CONFIG_ARCH_IOP13XX) += iop13xx
machine-$(CONFIG_ARCH_IOP32X) += iop32x
machine-$(CONFIG_ARCH_IOP33X) += iop33x
machine-$(CONFIG_ARCH_IXP4XX) += ixp4xx
machine-$(CONFIG_ARCH_KIRKWOOD) += kirkwood
machine-$(CONFIG_ARCH_KS8695) += ks8695
machine-$(CONFIG_ARCH_LPC32XX) += lpc32xx
machine-$(CONFIG_ARCH_MMP) += mmp
machine-$(CONFIG_ARCH_MSM) += msm
machine-$(CONFIG_ARCH_MV78XX0) += mv78xx0
machine-$(CONFIG_ARCH_MXC) += imx
machine-$(CONFIG_ARCH_MXS) += mxs
machine-$(CONFIG_ARCH_MVEBU) += mvebu
machine-$(CONFIG_ARCH_NETX) += netx
machine-$(CONFIG_ARCH_NOMADIK) += nomadik
machine-$(CONFIG_ARCH_OMAP1) += omap1
machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
machine-$(CONFIG_ARCH_ORION5X) += orion5x
machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell
machine-$(CONFIG_ARCH_PRIMA2) += prima2
machine-$(CONFIG_ARCH_PXA) += pxa
machine-$(CONFIG_ARCH_REALVIEW) += realview
machine-$(CONFIG_ARCH_RPC) += rpc
machine-$(CONFIG_ARCH_S3C24XX) += s3c24xx s3c2412 s3c2440
machine-$(CONFIG_ARCH_S3C64XX) += s3c64xx
machine-$(CONFIG_ARCH_S5P64X0) += s5p64x0
machine-$(CONFIG_ARCH_S5PC100) += s5pc100
machine-$(CONFIG_ARCH_S5PV210) += s5pv210
machine-$(CONFIG_ARCH_EXYNOS) += exynos
machine-$(CONFIG_ARCH_SA1100) += sa1100
machine-$(CONFIG_ARCH_SHARK) += shark
machine-$(CONFIG_ARCH_SHMOBILE) += shmobile
machine-$(CONFIG_ARCH_TEGRA) += tegra
machine-$(CONFIG_ARCH_U300) += u300
machine-$(CONFIG_ARCH_U8500) += ux500
machine-$(CONFIG_ARCH_VERSATILE) += versatile
machine-$(CONFIG_ARCH_VEXPRESS) += vexpress
machine-$(CONFIG_ARCH_VT8500) += vt8500
machine-$(CONFIG_ARCH_W90X900) += w90x900
machine-$(CONFIG_FOOTBRIDGE) += footbridge
machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
machine-$(CONFIG_ARCH_SPEAR13XX) += spear13xx
machine-$(CONFIG_ARCH_SPEAR3XX) += spear3xx
machine-$(CONFIG_MACH_SPEAR600) += spear6xx
machine-$(CONFIG_ARCH_ZYNQ) += zynq
# Platform directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
plat-$(CONFIG_ARCH_MXC) := mxc
plat-$(CONFIG_ARCH_OMAP) := omap
plat-$(CONFIG_ARCH_S3C64XX) := samsung
plat-$(CONFIG_ARCH_ZYNQ) := versatile
plat-$(CONFIG_PLAT_IOP) := iop
plat-$(CONFIG_PLAT_NOMADIK) := nomadik
plat-$(CONFIG_PLAT_ORION) := orion
plat-$(CONFIG_PLAT_PXA) := pxa
plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx samsung
plat-$(CONFIG_PLAT_S5P) := samsung
plat-$(CONFIG_PLAT_SPEAR) := spear
plat-$(CONFIG_PLAT_VERSATILE) := versatile
plat-$(CONFIG_ARCH_MXC) += mxc
plat-$(CONFIG_ARCH_OMAP) += omap
plat-$(CONFIG_ARCH_S3C64XX) += samsung
plat-$(CONFIG_ARCH_ZYNQ) += versatile
plat-$(CONFIG_PLAT_IOP) += iop
plat-$(CONFIG_PLAT_NOMADIK) += nomadik
plat-$(CONFIG_PLAT_ORION) += orion
plat-$(CONFIG_PLAT_PXA) += pxa
plat-$(CONFIG_PLAT_S3C24XX) += s3c24xx samsung
plat-$(CONFIG_PLAT_S5P) += samsung
plat-$(CONFIG_PLAT_SPEAR) += spear
plat-$(CONFIG_PLAT_VERSATILE) += versatile
ifeq ($(CONFIG_ARCH_EBSA110),y)
# This is what happens if you forget the IOCS16 line.
@ -230,15 +225,20 @@ MACHINE := arch/arm/mach-$(word 1,$(machine-y))/
else
MACHINE :=
endif
ifeq ($(CONFIG_ARCH_MULTIPLATFORM),y)
MACHINE :=
endif
machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
platdirs := $(patsubst %,arch/arm/plat-%/,$(plat-y))
ifneq ($(CONFIG_ARCH_MULTIPLATFORM),y)
ifeq ($(KBUILD_SRC),)
KBUILD_CPPFLAGS += $(patsubst %,-I%include,$(machdirs) $(platdirs))
else
KBUILD_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs) $(platdirs))
endif
endif
export TEXT_OFFSET GZFLAGS MMUEXT

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@ -15,6 +15,8 @@ ifneq ($(MACHINE),)
include $(srctree)/$(MACHINE)/Makefile.boot
endif
include $(srctree)/arch/arm/boot/dts/Makefile
# Note: the following conditions must always be true:
# ZRELADDR == virt_to_phys(PAGE_OFFSET + TEXT_OFFSET)
# PARAMS_PHYS must be within 4MB of ZRELADDR

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@ -25,7 +25,13 @@ unsigned int __machine_arch_type;
static void putstr(const char *ptr);
extern void error(char *x);
#ifdef CONFIG_ARCH_MULTIPLATFORM
static inline void putc(int c) {}
static inline void flush(void) {}
static inline void arch_decomp_setup(void) {}
#else
#include <mach/uncompress.h>
#endif
#ifdef CONFIG_DEBUG_ICEDCC

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@ -0,0 +1,84 @@
ifeq ($(CONFIG_OF),y)
dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb \
at91sam9263ek.dtb \
at91sam9g20ek_2mmc.dtb \
at91sam9g20ek.dtb \
at91sam9g25ek.dtb \
at91sam9m10g45ek.dtb \
at91sam9n12ek.dtb \
ethernut5.dtb \
evk-pro3.dtb \
kizbox.dtb \
tny_a9260.dtb \
tny_a9263.dtb \
tny_a9g20.dtb \
usb_a9260.dtb \
usb_a9263.dtb \
usb_a9g20.dtb
dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
exynos4210-smdkv310.dtb \
exynos5250-smdk5250.dtb
dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb
dtb-$(CONFIG_ARCH_IMX5) += imx51-babbage.dtb \
imx53-ard.dtb \
imx53-evk.dtb \
imx53-qsb.dtb \
imx53-smd.dtb
dtb-$(CONFIG_SOC_IMX6Q) += imx6q-arm2.dtb \
imx6q-sabrelite.dtb \
imx6q-sabresd.dtb
dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \
kirkwood-dns325.dtb \
kirkwood-dreamplug.dtb \
kirkwood-goflexnet.dtb \
kirkwood-ib62x0.dtb \
kirkwood-iconnect.dtb \
kirkwood-lschlv2.dtb \
kirkwood-lsxhl.dtb \
kirkwood-ts219-6281.dtb \
kirkwood-ts219-6282.dtb
dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
armada-xp-db.dtb
dtb-$(CONFIG_ARCH_MXC) += imx51-babbage.dtb \
imx53-ard.dtb \
imx53-evk.dtb \
imx53-qsb.dtb \
imx53-smd.dtb \
imx6q-arm2.dtb \
imx6q-sabrelite.dtb \
imx6q-sabresd.dtb
dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
imx23-olinuxino.dtb \
imx23-stmp378x_devb.dtb \
imx28-apx4devkit.dtb \
imx28-cfa10036.dtb \
imx28-cfa10049.dtb \
imx28-evk.dtb \
imx28-m28evk.dtb \
imx28-tx28.dtb
dtb-$(CONFIG_ARCH_U8500) += snowball.dtb
dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \
spear1340-evb.dtb
dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \
spear310-evb.dtb \
spear320-evb.dtb
dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
tegra20-plutux.dtb \
tegra20-seaboard.dtb \
tegra20-tec.dtb \
tegra20-trimslice.dtb \
tegra20-ventana.dtb \
tegra20-whistler.dtb \
tegra30-cardhu-a02.dtb \
tegra30-cardhu-a04.dtb
dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
vexpress-v2p-ca9.dtb \
vexpress-v2p-ca15-tc1.dtb \
vexpress-v2p-ca15_a7.dtb
endif

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@ -6,7 +6,9 @@
#endif
/* not all ARM platforms necessarily support this API ... */
#ifdef CONFIG_NEED_MACH_GPIO_H
#include <mach/gpio.h>
#endif
#ifndef __ARM_GPIOLIB_COMPLEX
/* Note: this may rely upon the value of ARCH_NR_GPIOS set in mach/gpio.h */

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@ -13,7 +13,11 @@
#define _ASMARM_TIMEX_H
#include <asm/arch_timer.h>
#ifdef CONFIG_ARCH_MULTIPLATFORM
#define CLOCK_TICK_RATE 1000000
#else
#include <mach/timex.h>
#endif
typedef unsigned long cycles_t;

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@ -10,10 +10,8 @@
*/
.macro addruart,rp,rv,tmp
movw \rv, #0x6000
movt \rv, #0xfee3
movw \rp, #0x6000
movt \rp, #0xfff3
ldr \rv, =0xfee36000
ldr \rp, =0xfff36000
.endm
#include <asm/hardware/debug-pl01x.S>

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@ -0,0 +1,90 @@
/*
* arch/arm/include/debug/icedcc.S
*
* Copyright (C) 1994-1999 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
@@ debug using ARM EmbeddedICE DCC channel
.macro addruart, rp, rv, tmp
.endm
#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
.macro senduart, rd, rx
mcr p14, 0, \rd, c0, c5, 0
.endm
.macro busyuart, rd, rx
1001:
mrc p14, 0, \rx, c0, c1, 0
tst \rx, #0x20000000
beq 1001b
.endm
.macro waituart, rd, rx
mov \rd, #0x2000000
1001:
subs \rd, \rd, #1
bmi 1002f
mrc p14, 0, \rx, c0, c1, 0
tst \rx, #0x20000000
bne 1001b
1002:
.endm
#elif defined(CONFIG_CPU_XSCALE)
.macro senduart, rd, rx
mcr p14, 0, \rd, c8, c0, 0
.endm
.macro busyuart, rd, rx
1001:
mrc p14, 0, \rx, c14, c0, 0
tst \rx, #0x10000000
beq 1001b
.endm
.macro waituart, rd, rx
mov \rd, #0x10000000
1001:
subs \rd, \rd, #1
bmi 1002f
mrc p14, 0, \rx, c14, c0, 0
tst \rx, #0x10000000
bne 1001b
1002:
.endm
#else
.macro senduart, rd, rx
mcr p14, 0, \rd, c1, c0, 0
.endm
.macro busyuart, rd, rx
1001:
mrc p14, 0, \rx, c0, c0, 0
tst \rx, #2
beq 1001b
.endm
.macro waituart, rd, rx
mov \rd, #0x2000000
1001:
subs \rd, \rd, #1
bmi 1002f
mrc p14, 0, \rx, c0, c0, 0
tst \rx, #2
bne 1001b
1002:
.endm
#endif /* CONFIG_CPU_V6 */

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@ -11,7 +11,8 @@
* published by the Free Software Foundation.
*/
#include <mach/armada-370-xp.h>
#define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000
#define ARMADA_370_XP_REGS_VIRT_BASE 0xfeb00000
.macro addruart, rp, rv, tmp
ldr \rp, =ARMADA_370_XP_REGS_PHYS_BASE

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@ -9,10 +9,10 @@
* accesses to the 8250.
*/
#include <linux/serial_reg.h>
#include <mach/hardware.h>
#include <mach/map.h>
#define UART_SHIFT 2
#define PICOXCELL_UART1_BASE 0x80230000
#define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000)
.macro addruart, rp, rv, tmp
ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE)

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@ -20,90 +20,9 @@
* references to these in a production kernel!
*/
#if defined(CONFIG_DEBUG_ICEDCC)
@@ debug using ARM EmbeddedICE DCC channel
.macro addruart, rp, rv, tmp
.endm
#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
.macro senduart, rd, rx
mcr p14, 0, \rd, c0, c5, 0
.endm
.macro busyuart, rd, rx
1001:
mrc p14, 0, \rx, c0, c1, 0
tst \rx, #0x20000000
beq 1001b
.endm
.macro waituart, rd, rx
mov \rd, #0x2000000
1001:
subs \rd, \rd, #1
bmi 1002f
mrc p14, 0, \rx, c0, c1, 0
tst \rx, #0x20000000
bne 1001b
1002:
.endm
#elif defined(CONFIG_CPU_XSCALE)
.macro senduart, rd, rx
mcr p14, 0, \rd, c8, c0, 0
.endm
.macro busyuart, rd, rx
1001:
mrc p14, 0, \rx, c14, c0, 0
tst \rx, #0x10000000
beq 1001b
.endm
.macro waituart, rd, rx
mov \rd, #0x10000000
1001:
subs \rd, \rd, #1
bmi 1002f
mrc p14, 0, \rx, c14, c0, 0
tst \rx, #0x10000000
bne 1001b
1002:
.endm
#else
.macro senduart, rd, rx
mcr p14, 0, \rd, c1, c0, 0
.endm
.macro busyuart, rd, rx
1001:
mrc p14, 0, \rx, c0, c0, 0
tst \rx, #2
beq 1001b
.endm
.macro waituart, rd, rx
mov \rd, #0x2000000
1001:
subs \rd, \rd, #1
bmi 1002f
mrc p14, 0, \rx, c0, c0, 0
tst \rx, #2
bne 1001b
1002:
.endm
#endif /* CONFIG_CPU_V6 */
#elif !defined(CONFIG_DEBUG_SEMIHOSTING)
#include <mach/debug-macro.S>
#endif /* CONFIG_DEBUG_ICEDCC */
#if !defined(CONFIG_DEBUG_SEMIHOSTING)
#include CONFIG_DEBUG_LL_INCLUDE
#endif
#ifdef CONFIG_MMU
.macro addruart_current, rx, tmp1, tmp2

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@ -23,8 +23,8 @@
#include <asm/thread_info.h>
#include <asm/pgtable.h>
#ifdef CONFIG_DEBUG_LL
#include <mach/debug-macro.S>
#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_SEMIHOSTING)
#include CONFIG_DEBUG_LL_INCLUDE
#endif
/*

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@ -12,27 +12,3 @@ else
params_phys-y := 0x20000100
initrd_phys-y := 0x20410000
endif
# Keep dtb files sorted alphabetically for each SoC
# sam9260
dtb-$(CONFIG_MACH_AT91SAM_DT) += aks-cdu.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += ethernut5.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += evk-pro3.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += tny_a9260.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += usb_a9260.dtb
# sam9263
dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9263ek.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += tny_a9263.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += usb_a9263.dtb
# sam9g20
dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9g20ek.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9g20ek_2mmc.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += kizbox.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += tny_a9g20.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += usb_a9g20.dtb
# sam9g45
dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9m10g45ek.dtb
# sam9n12
dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9n12ek.dtb
# sam9x5
dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9g25ek.dtb

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@ -1,9 +0,0 @@
/*
* arch/arm/mach-dove/include/mach/gpio.h
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <plat/gpio.h>

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@ -18,6 +18,7 @@
#include <asm/mach/irq.h>
#include <mach/pm.h>
#include <mach/bridge-regs.h>
#include <plat/orion-gpio.h>
#include "common.h"
static void pmu_irq_mask(struct irq_data *d)

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@ -13,6 +13,7 @@
#include <linux/io.h>
#include <plat/mpp.h>
#include <mach/dove.h>
#include <plat/orion-gpio.h>
#include "mpp.h"
struct dove_mpp_grp {

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@ -1 +0,0 @@
/* empty */

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@ -1,5 +1,2 @@
zreladdr-y += 0x40008000
params_phys-y := 0x40000100
dtb-$(CONFIG_MACH_EXYNOS4_DT) += exynos4210-origen.dtb exynos4210-smdkv310.dtb
dtb-$(CONFIG_MACH_EXYNOS5_DT) += exynos5250-smdk5250.dtb

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@ -0,0 +1,15 @@
config ARCH_HIGHBANK
bool "Calxeda ECX-1000 (Highbank)" if ARCH_MULTI_V7
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_AMBA
select ARM_GIC
select ARM_TIMER_SP804
select CACHE_L2X0
select CLKDEV_LOOKUP
select COMMON_CLK
select CPU_V7
select GENERIC_CLOCKEVENTS
select HAVE_ARM_SCU
select HAVE_SMP
select SPARSE_IRQ
select USE_OF

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@ -1 +0,0 @@
zreladdr-y := 0x00008000

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@ -1 +0,0 @@
/* empty */

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@ -1,6 +0,0 @@
#ifndef __MACH_TIMEX_H
#define __MACH_TIMEX_H
#define CLOCK_TICK_RATE 1000000
#endif

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@ -1,9 +0,0 @@
#ifndef __MACH_UNCOMPRESS_H
#define __MACH_UNCOMPRESS_H
#define putc(c)
#define flush()
#define arch_decomp_setup()
#define arch_decomp_wdog()
#endif

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@ -37,14 +37,3 @@ initrd_phys-$(CONFIG_SOC_IMX53) := 0x70800000
zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000
params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100
initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000
dtb-$(CONFIG_MACH_IMX51_DT) += imx51-babbage.dtb
dtb-$(CONFIG_SOC_IMX53) += imx53-ard.dtb \
imx53-evk.dtb \
imx53-qsb.dtb \
imx53-smd.dtb \
dtb-$(CONFIG_SOC_IMX6Q) += imx6q-arm2.dtb \
imx6q-sabrelite.dtb \
imx6q-sabresd.dtb \

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@ -1,2 +0,0 @@
/* empty */

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@ -1,14 +1,3 @@
zreladdr-y += 0x00008000
params_phys-y := 0x00000100
initrd_phys-y := 0x00800000
dtb-$(CONFIG_MACH_DREAMPLUG_DT) += kirkwood-dreamplug.dtb
dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns320.dtb
dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns325.dtb
dtb-$(CONFIG_MACH_ICONNECT_DT) += kirkwood-iconnect.dtb
dtb-$(CONFIG_MACH_IB62X0_DT) += kirkwood-ib62x0.dtb
dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-ts219-6281.dtb
dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-ts219-6282.dtb
dtb-$(CONFIG_MACH_GOFLEXNET_DT) += kirkwood-goflexnet.dtb
dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lschlv2.dtb
dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lsxhl.dtb

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@ -1,9 +0,0 @@
/*
* arch/asm-arm/mach-kirkwood/include/mach/gpio.h
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <plat/gpio.h>

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@ -11,6 +11,7 @@
#include <linux/kernel.h>
#include <linux/irq.h>
#include <mach/bridge-regs.h>
#include <plat/orion-gpio.h>
#include <plat/irq.h>
static int __initdata gpio0_irqs[4] = {

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@ -19,6 +19,7 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/kirkwood.h>
#include <plat/orion-gpio.h>
#include "common.h"
#define RD88F6192_GPIO_USB_VBUS 10

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@ -1,5 +1,3 @@
zreladdr-y += 0x80008000
params_phys-y := 0x80000100
initrd_phys-y := 0x82000000
dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb

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@ -1 +0,0 @@
/* empty */

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@ -11,6 +11,7 @@
#include <linux/kernel.h>
#include <linux/irq.h>
#include <mach/bridge-regs.h>
#include <plat/orion-gpio.h>
#include <plat/irq.h>
#include "common.h"

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@ -1,3 +1,13 @@
config ARCH_MVEBU
bool "Marvell SOCs with Device Tree support" if ARCH_MULTI_V7
select CLKSRC_MMIO
select COMMON_CLK
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_CHIP
select IRQ_DOMAIN
select MULTI_IRQ_HANDLER
select SPARSE_IRQ
if ARCH_MVEBU
menu "Marvell SOC with device tree"

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@ -1,2 +1,4 @@
ccflags-$(ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
obj-y += system-controller.o
obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o irq-armada-370-xp.o

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@ -1,3 +0,0 @@
zreladdr-y := 0x00008000
dtb-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-db.dtb
dtb-$(CONFIG_MACH_ARMADA_370_XP) += armada-xp-db.dtb

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@ -20,7 +20,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <mach/armada-370-xp.h>
#include "armada-370-xp.h"
#include "common.h"
static struct map_desc armada_370_xp_io_desc[] __initdata = {

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@ -1,13 +0,0 @@
/*
* Marvell Armada SoC time definitions
*
* Copyright (C) 2012 Marvell
*
* Lior Amsalem <alior@marvell.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#define CLOCK_TICK_RATE (100 * HZ)

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@ -1,43 +0,0 @@
/*
* Marvell Armada SoC kernel uncompression UART routines
*
* Copyright (C) 2012 Marvell
*
* Lior Amsalem <alior@marvell.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <mach/armada-370-xp.h>
#define UART_THR ((volatile unsigned char *)(ARMADA_370_XP_REGS_PHYS_BASE\
+ 0x12000))
#define UART_LSR ((volatile unsigned char *)(ARMADA_370_XP_REGS_PHYS_BASE\
+ 0x12014))
#define LSR_THRE 0x20
static void putc(const char c)
{
int i;
for (i = 0; i < 0x1000; i++) {
/* Transmit fifo not full? */
if (*UART_LSR & LSR_THRE)
break;
}
*UART_THR = c;
}
static void flush(void)
{
}
/*
* nothing to do
*/
#define arch_decomp_setup()
#define arch_decomp_wdog()

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@ -1,11 +1 @@
zreladdr-y += 0x40008000
dtb-y += imx23-evk.dtb \
imx23-olinuxino.dtb \
imx23-stmp378x_devb.dtb \
imx28-apx4devkit.dtb \
imx28-cfa10036.dtb \
imx28-cfa10049.dtb \
imx28-evk.dtb \
imx28-m28evk.dtb \
imx28-tx28.dtb \

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@ -1 +0,0 @@
/* empty */

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@ -1,4 +0,0 @@
#ifndef __ASM_ARCH_GPIO_H
#define __ASM_ARCH_GPIO_H
#endif /* __ASM_ARCH_GPIO_H */

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@ -27,6 +27,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
#include <plat/orion-gpio.h>
#include "common.h"
#include "mpp.h"

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@ -34,6 +34,7 @@
#include <asm/mach/pci.h>
#include <asm/system_info.h>
#include <mach/orion5x.h>
#include <plat/orion-gpio.h>
#include "common.h"
#include "mpp.h"

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@ -1,9 +0,0 @@
/*
* arch/arm/mach-orion5x/include/mach/gpio.h
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <plat/gpio.h>

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@ -13,6 +13,7 @@
#include <linux/kernel.h>
#include <linux/irq.h>
#include <mach/bridge-regs.h>
#include <plat/orion-gpio.h>
#include <plat/irq.h>
static int __initdata gpio0_irqs[4] = {

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@ -25,6 +25,7 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/orion5x.h>
#include <plat/orion-gpio.h>
#include "common.h"
#include "mpp.h"

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@ -0,0 +1,14 @@
config ARCH_PICOXCELL
bool "Picochip PicoXcell" if ARCH_MULTI_V6
select ARCH_REQUIRE_GPIOLIB
select ARM_PATCH_PHYS_VIRT
select ARM_VIC
select CPU_V6K
select DW_APB_TIMER
select DW_APB_TIMER_OF
select GENERIC_CLOCKEVENTS
select GENERIC_GPIO
select HAVE_TCM
select NO_IOPORT
select SPARSE_IRQ
select USE_OF

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@ -1 +0,0 @@
zreladdr-y := 0x00008000

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@ -20,14 +20,15 @@
#include <asm/hardware/vic.h>
#include <asm/mach/map.h>
#include <mach/map.h>
#include <mach/picoxcell_soc.h>
#include "common.h"
#define WDT_CTRL_REG_EN_MASK (1 << 0)
#define WDT_CTRL_REG_OFFS (0x00)
#define WDT_TIMEOUT_REG_OFFS (0x04)
#define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000)
#define PICOXCELL_PERIPH_BASE 0x80000000
#define PICOXCELL_PERIPH_LENGTH SZ_4M
#define WDT_CTRL_REG_EN_MASK (1 << 0)
#define WDT_CTRL_REG_OFFS (0x00)
#define WDT_TIMEOUT_REG_OFFS (0x04)
static void __iomem *wdt_regs;
/*

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@ -1 +0,0 @@
/* empty */

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@ -1,21 +0,0 @@
/*
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
*
* This file contains the hardware definitions of the picoXcell SoC devices.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
#include <mach/picoxcell_soc.h>
#endif

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@ -1,25 +0,0 @@
/*
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __PICOXCELL_MAP_H__
#define __PICOXCELL_MAP_H__
#define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000)
#ifdef __ASSEMBLY__
#define IO_ADDRESS(x) PHYS_TO_IO((x))
#else
#define IO_ADDRESS(x) (void __iomem __force *)(PHYS_TO_IO((x)))
#endif
#endif /* __PICOXCELL_MAP_H__ */

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@ -1,25 +0,0 @@
/*
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
*
* This file contains the hardware definitions of the picoXcell SoC devices.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __PICOXCELL_SOC_H__
#define __PICOXCELL_SOC_H__
#define PICOXCELL_UART1_BASE 0x80230000
#define PICOXCELL_PERIPH_BASE 0x80000000
#define PICOXCELL_PERIPH_LENGTH SZ_4M
#define PICOXCELL_VIC0_BASE 0x80060000
#define PICOXCELL_VIC1_BASE 0x80064000
#endif /* __PICOXCELL_SOC_H__ */

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@ -1,25 +0,0 @@
/*
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __TIMEX_H__
#define __TIMEX_H__
/* Bogus value to allow the kernel to compile. */
#define CLOCK_TICK_RATE 1000000
#endif /* __TIMEX_H__ */

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@ -1,21 +0,0 @@
/*
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#define putc(c)
#define flush()
#define arch_decomp_setup()
#define arch_decomp_wdog()

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@ -383,9 +383,24 @@ struct platform_device pxa_device_asoc_platform = {
static u64 pxaficp_dmamask = ~(u32)0;
static struct resource pxa_ir_resources[] = {
[0] = {
.start = IRQ_STUART,
.end = IRQ_STUART,
.flags = IORESOURCE_IRQ,
},
[1] = {
.start = IRQ_ICP,
.end = IRQ_ICP,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device pxa_device_ficp = {
.name = "pxa2xx-ir",
.id = -1,
.num_resources = ARRAY_SIZE(pxa_ir_resources),
.resource = pxa_ir_resources,
.dev = {
.dma_mask = &pxaficp_dmamask,
.coherent_dma_mask = 0xffffffff,

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@ -879,7 +879,7 @@ static const struct platform_suspend_ops sharpsl_pm_ops = {
static int __devinit sharpsl_pm_probe(struct platform_device *pdev)
{
int ret;
int ret, irq;
if (!pdev->dev.platform_data)
return -EINVAL;
@ -907,24 +907,28 @@ static int __devinit sharpsl_pm_probe(struct platform_device *pdev)
gpio_direction_input(sharpsl_pm.machinfo->gpio_batlock);
/* Register interrupt handlers */
if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) {
dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin));
irq = gpio_to_irq(sharpsl_pm.machinfo->gpio_acin);
if (request_irq(irq, sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) {
dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", irq);
}
if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) {
dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock));
irq = gpio_to_irq(sharpsl_pm.machinfo->gpio_batlock);
if (request_irq(irq, sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) {
dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", irq);
}
if (sharpsl_pm.machinfo->gpio_fatal) {
if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) {
dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal));
irq = gpio_to_irq(sharpsl_pm.machinfo->gpio_fatal);
if (request_irq(irq, sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) {
dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", irq);
}
}
if (sharpsl_pm.machinfo->batfull_irq) {
/* Register interrupt handler. */
if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) {
dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull));
irq = gpio_to_irq(sharpsl_pm.machinfo->gpio_batfull);
if (request_irq(irq, sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) {
dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", irq);
}
}
@ -953,14 +957,14 @@ static int sharpsl_pm_remove(struct platform_device *pdev)
led_trigger_unregister_simple(sharpsl_charge_led_trigger);
free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr);
free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr);
free_irq(gpio_to_irq(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr);
free_irq(gpio_to_irq(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr);
if (sharpsl_pm.machinfo->gpio_fatal)
free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr);
free_irq(gpio_to_irq(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr);
if (sharpsl_pm.machinfo->batfull_irq)
free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr);
free_irq(gpio_to_irq(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr);
gpio_free(sharpsl_pm.machinfo->gpio_batlock);
gpio_free(sharpsl_pm.machinfo->gpio_batfull);

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@ -1 +0,0 @@
/* empty */

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@ -66,6 +66,8 @@
#include <asm/mach/arch.h>
#include <asm/setup.h>
#include "sh-gpio.h"
/*
* Address Interface BusWidth note
* ------------------------------------------------------------------

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@ -54,6 +54,8 @@
#include <sound/sh_fsi.h>
#include <sound/simple_card.h>
#include "sh-gpio.h"
/*
* CON1 Camera Module
* CON2 Extension Bus

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@ -42,6 +42,8 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include "sh-gpio.h"
/*
* SDHI
*

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@ -64,6 +64,8 @@
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include "sh-gpio.h"
/*
* Address Interface BusWidth note
* ------------------------------------------------------------------

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@ -20,7 +20,7 @@
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/gpio.h>
#include <linux/sh_pfc.h>
#include <mach/r8a7740.h>
#include <mach/irqs.h>

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@ -19,7 +19,7 @@
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/gpio.h>
#include <linux/sh_pfc.h>
#include <linux/ioport.h>
#include <mach/r8a7779.h>

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@ -18,7 +18,7 @@
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/gpio.h>
#include <linux/sh_pfc.h>
#include <mach/sh7367.h>
#define CPU_ALL_PORT(fn, pfx, sfx) \

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@ -22,7 +22,7 @@
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/gpio.h>
#include <linux/sh_pfc.h>
#include <mach/irqs.h>
#include <mach/sh7372.h>

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@ -19,7 +19,7 @@
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/gpio.h>
#include <linux/sh_pfc.h>
#include <mach/sh7377.h>
#define CPU_ALL_PORT(fn, pfx, sfx) \

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@ -20,7 +20,7 @@
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/gpio.h>
#include <linux/sh_pfc.h>
#include <mach/sh73a0.h>
#include <mach/irqs.h>

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@ -12,22 +12,8 @@
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/sh_pfc.h>
#include <linux/io.h>
#ifdef CONFIG_GPIOLIB
static inline int irq_to_gpio(unsigned int irq)
{
return -ENOSYS;
}
#else
#define __ARM_GPIOLIB_COMPLEX
#endif /* CONFIG_GPIOLIB */
/*
* FIXME !!
*

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@ -0,0 +1,16 @@
config ARCH_SOCFPGA
bool "Altera SOCFPGA family" if ARCH_MULTI_V7
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_AMBA
select ARM_GIC
select CACHE_L2X0
select CLKDEV_LOOKUP
select COMMON_CLK
select CPU_V7
select DW_APB_TIMER
select DW_APB_TIMER_OF
select GENERIC_CLOCKEVENTS
select GPIO_PL061 if GPIOLIB
select HAVE_ARM_SCU
select SPARSE_IRQ
select USE_OF

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@ -1 +0,0 @@
zreladdr-y := 0x00008000

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@ -1,19 +0,0 @@
/*
* Copyright (C) 2003 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#define CLOCK_TICK_RATE (50000000 / 16)

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@ -1,9 +0,0 @@
#ifndef __MACH_UNCOMPRESS_H
#define __MACH_UNCOMPRESS_H
#define putc(c)
#define flush()
#define arch_decomp_setup()
#define arch_decomp_wdog()
#endif

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@ -1,6 +1,3 @@
zreladdr-y += 0x00008000
params_phys-y := 0x00000100
initrd_phys-y := 0x00800000
dtb-$(CONFIG_MACH_SPEAR1310) += spear1310-evb.dtb
dtb-$(CONFIG_MACH_SPEAR1340) += spear1340-evb.dtb

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@ -1,19 +0,0 @@
/*
* arch/arm/mach-spear13xx/include/mach/gpio.h
*
* GPIO macros for SPEAr13xx machine family
*
* Copyright (C) 2012 ST Microelectronics
* Viresh Kumar <viresh.linux@gmail.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __MACH_GPIO_H
#define __MACH_GPIO_H
#include <plat/gpio.h>
#endif /* __MACH_GPIO_H */

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@ -1,7 +1,3 @@
zreladdr-y += 0x00008000
params_phys-y := 0x00000100
initrd_phys-y := 0x00800000
dtb-$(CONFIG_MACH_SPEAR300) += spear300-evb.dtb
dtb-$(CONFIG_MACH_SPEAR310) += spear310-evb.dtb
dtb-$(CONFIG_MACH_SPEAR320) += spear320-evb.dtb

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@ -1,19 +0,0 @@
/*
* arch/arm/mach-spear3xx/include/mach/gpio.h
*
* GPIO macros for SPEAr3xx machine family
*
* Copyright (C) 2009 ST Microelectronics
* Viresh Kumar<viresh.linux@gmail.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __MACH_GPIO_H
#define __MACH_GPIO_H
#include <plat/gpio.h>
#endif /* __MACH_GPIO_H */

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@ -1,5 +1,3 @@
zreladdr-y += 0x00008000
params_phys-y := 0x00000100
initrd_phys-y := 0x00800000
dtb-$(CONFIG_BOARD_SPEAR600_DT) += spear600-evb.dtb

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@ -1,19 +0,0 @@
/*
* arch/arm/mach-spear6xx/include/mach/gpio.h
*
* GPIO macros for SPEAr6xx machine family
*
* Copyright (C) 2009 ST Microelectronics
* Viresh Kumar <viresh.linux@gmail.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __MACH_GPIO_H
#define __MACH_GPIO_H
#include <plat/gpio.h>
#endif /* __MACH_GPIO_H */

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@ -1,15 +1,3 @@
zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) += 0x00008000
params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100
initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-harmony.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-medcom-wide.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-paz00.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-plutux.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-seaboard.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-tec.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-trimslice.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-ventana.dtb
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-whistler.dtb
dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30-cardhu-a02.dtb
dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30-cardhu-a04.dtb

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@ -1 +0,0 @@
/* empty */

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@ -1 +0,0 @@
/* empty */

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@ -1,5 +1,3 @@
zreladdr-y += 0x00008000
params_phys-y := 0x00000100
initrd_phys-y := 0x00800000
dtb-$(CONFIG_MACH_SNOWBALL) += snowball.dtb

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@ -1,5 +0,0 @@
#ifndef __ASM_ARCH_GPIO_H
#define __ASM_ARCH_GPIO_H
#endif /* __ASM_ARCH_GPIO_H */

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@ -1 +0,0 @@
/* empty */

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@ -1,3 +1,38 @@
config ARCH_VEXPRESS
bool "ARM Ltd. Versatile Express family" if ARCH_MULTI_V7
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_AMBA
select ARM_GIC
select ARM_TIMER_SP804
select CLKDEV_LOOKUP
select COMMON_CLK
select CPU_V7
select GENERIC_CLOCKEVENTS
select HAVE_CLK
select HAVE_PATA_PLATFORM
select HAVE_SMP
select ICST
select MIGHT_HAVE_CACHE_L2X0
select NO_IOPORT
select PLAT_VERSATILE
select PLAT_VERSATILE_CLCD
select REGULATOR_FIXED_VOLTAGE if REGULATOR
help
This option enables support for systems using Cortex processor based
ARM core and logic (FPGA) tiles on the Versatile Express motherboard,
for example:
- CoreTile Express A5x2 (V2P-CA5s)
- CoreTile Express A9x4 (V2P-CA9)
- CoreTile Express A15x2 (V2P-CA15)
- LogicTile Express 13MG (V2F-2XV6) with A5, A7, A9 or A15 SMMs
(Soft Macrocell Models)
- Versatile Express RTSMs (Models)
You must boot using a Flattened Device Tree in order to use these
platforms. The traditional (ATAGs) boot method is not usable on
these boards with this option.
menu "Versatile Express platform type"
depends on ARCH_VEXPRESS
@ -15,40 +50,5 @@ config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA
config ARCH_VEXPRESS_CA9X4
bool "Versatile Express Cortex-A9x4 tile"
select ARM_GIC
select CPU_V7
select HAVE_SMP
select MIGHT_HAVE_CACHE_L2X0
config ARCH_VEXPRESS_DT
bool "Device Tree support for Versatile Express platforms"
select ARM_GIC
select ARM_PATCH_PHYS_VIRT
select AUTO_ZRELADDR
select CPU_V7
select HAVE_SMP
select MIGHT_HAVE_CACHE_L2X0
select USE_OF
help
New Versatile Express platforms require Flattened Device Tree to
be passed to the kernel.
This option enables support for systems using Cortex processor based
ARM core and logic (FPGA) tiles on the Versatile Express motherboard,
for example:
- CoreTile Express A5x2 (V2P-CA5s)
- CoreTile Express A9x4 (V2P-CA9)
- CoreTile Express A15x2 (V2P-CA15)
- LogicTile Express 13MG (V2F-2XV6) with A5, A7, A9 or A15 SMMs
(Soft Macrocell Models)
- Versatile Express RTSMs (Models)
You must boot using a Flattened Device Tree in order to use these
platforms. The traditional (ATAGs) boot method is not usable on
these boards with this option.
If your bootloader supports Flattened Device Tree based booting,
say Y here.
endmenu

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@ -1,6 +1,8 @@
#
# Makefile for the linux kernel.
#
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \
-I$(srctree)/arch/arm/plat-versatile/include
obj-y := v2m.o
obj-$(CONFIG_ARCH_VEXPRESS_CA9X4) += ct-ca9x4.o

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@ -1,10 +0,0 @@
# Those numbers are used only by the non-DT V2P-CA9 platform
# The DT-enabled ones require CONFIG_AUTO_ZRELADDR=y
zreladdr-y += 0x60008000
params_phys-y := 0x60000100
initrd_phys-y := 0x60800000
dtb-$(CONFIG_ARCH_VEXPRESS_DT) += vexpress-v2p-ca5s.dtb \
vexpress-v2p-ca9.dtb \
vexpress-v2p-ca15-tc1.dtb \
vexpress-v2p-ca15_a7.dtb

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@ -26,6 +26,7 @@
#include "core.h"
#include <mach/motherboard.h>
#include <mach/irqs.h>
#include <plat/clcd.h>

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@ -1 +0,0 @@
/* empty */

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@ -1,4 +1,6 @@
#define IRQ_LOCALTIMER 29
#define IRQ_LOCALWDOG 30
#ifndef CONFIG_SPARSE_IRQ
#define NR_IRQS 256
#endif

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@ -1,23 +0,0 @@
/*
* arch/arm/mach-vexpress/include/mach/timex.h
*
* RealView architecture timex specifications
*
* Copyright (C) 2003 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#define CLOCK_TICK_RATE (50000000 / 16)

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@ -1,86 +0,0 @@
/*
* arch/arm/mach-vexpress/include/mach/uncompress.h
*
* Copyright (C) 2003 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c))
#define AMBA_UART_CR(base) (*(volatile unsigned char *)((base) + 0x30))
#define AMBA_UART_FR(base) (*(volatile unsigned char *)((base) + 0x18))
#define UART_BASE 0x10009000
#define UART_BASE_RS1 0x1c090000
static unsigned long get_uart_base(void)
{
#if defined(CONFIG_DEBUG_VEXPRESS_UART0_DETECT)
unsigned long mpcore_periph;
/*
* Make an educated guess regarding the memory map:
* - the original A9 core tile, which has MPCore peripherals
* located at 0x1e000000, should use UART at 0x10009000
* - all other (RS1 complaint) tiles use UART mapped
* at 0x1c090000
*/
asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (mpcore_periph));
if (mpcore_periph == 0x1e000000)
return UART_BASE;
else
return UART_BASE_RS1;
#elif defined(CONFIG_DEBUG_VEXPRESS_UART0_CA9)
return UART_BASE;
#elif defined(CONFIG_DEBUG_VEXPRESS_UART0_RS1)
return UART_BASE_RS1;
#else
return 0;
#endif
}
/*
* This does not append a newline
*/
static inline void putc(int c)
{
unsigned long base = get_uart_base();
if (!base)
return;
while (AMBA_UART_FR(base) & (1 << 5))
barrier();
AMBA_UART_DR(base) = c;
}
static inline void flush(void)
{
unsigned long base = get_uart_base();
if (!base)
return;
while (AMBA_UART_FR(base) & (1 << 3))
barrier();
}
/*
* nothing to do
*/
#define arch_decomp_setup()
#define arch_decomp_wdog()

View File

@ -539,8 +539,6 @@ MACHINE_START(VEXPRESS, "ARM-Versatile Express")
.restart = v2m_restart,
MACHINE_END
#if defined(CONFIG_ARCH_VEXPRESS_DT)
static struct map_desc v2m_rs1_io_desc __initdata = {
.virtual = V2M_PERIPH,
.pfn = __phys_to_pfn(0x1c000000),
@ -671,5 +669,3 @@ DT_MACHINE_START(VEXPRESS_DT, "ARM-Versatile Express")
.handle_irq = gic_handle_irq,
.restart = v2m_restart,
MACHINE_END
#endif

View File

@ -1 +0,0 @@
/* empty */

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