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scsi: ufs: ufs-exynos: Use device parameter initialization function

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Use common device parameter initialization function instead of initializing
those parameters by vendor driver itself.

Link: https://lore.kernel.org/r/20201116065054.7658-6-stanley.chu@mediatek.com
Reviewed-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Stanley Chu 2020-11-16 14:50:50 +08:00 committed by Martin K. Petersen
parent 8beef54716
commit 5b3573d68d
2 changed files with 1 additions and 27 deletions
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15
drivers/scsi/ufs/ufs-exynos.c
View file

@ -617,20 +617,7 @@ static int exynos_ufs_pre_pwr_mode(struct ufs_hba *hba,
goto out;
}
ufs_exynos_cap.tx_lanes = UFS_EXYNOS_LIMIT_NUM_LANES_TX;
ufs_exynos_cap.rx_lanes = UFS_EXYNOS_LIMIT_NUM_LANES_RX;
ufs_exynos_cap.hs_rx_gear = UFS_EXYNOS_LIMIT_HSGEAR_RX;
ufs_exynos_cap.hs_tx_gear = UFS_EXYNOS_LIMIT_HSGEAR_TX;
ufs_exynos_cap.pwm_rx_gear = UFS_EXYNOS_LIMIT_PWMGEAR_RX;
ufs_exynos_cap.pwm_tx_gear = UFS_EXYNOS_LIMIT_PWMGEAR_TX;
ufs_exynos_cap.rx_pwr_pwm = UFS_EXYNOS_LIMIT_RX_PWR_PWM;
ufs_exynos_cap.tx_pwr_pwm = UFS_EXYNOS_LIMIT_TX_PWR_PWM;
ufs_exynos_cap.rx_pwr_hs = UFS_EXYNOS_LIMIT_RX_PWR_HS;
ufs_exynos_cap.tx_pwr_hs = UFS_EXYNOS_LIMIT_TX_PWR_HS;
ufs_exynos_cap.hs_rate = UFS_EXYNOS_LIMIT_HS_RATE;
ufs_exynos_cap.desired_working_mode =
UFS_EXYNOS_LIMIT_DESIRED_MODE;
ufshcd_init_pwr_dev_param(&ufs_exynos_cap);
ret = ufshcd_get_pwr_dev_param(&ufs_exynos_cap,
dev_max_params, dev_req_params);

13
drivers/scsi/ufs/ufs-exynos.h
View file

@ -90,19 +90,6 @@ struct exynos_ufs;
#define SLOW 1
#define FAST 2
#define UFS_EXYNOS_LIMIT_NUM_LANES_RX 2
#define UFS_EXYNOS_LIMIT_NUM_LANES_TX 2
#define UFS_EXYNOS_LIMIT_HSGEAR_RX UFS_HS_G3
#define UFS_EXYNOS_LIMIT_HSGEAR_TX UFS_HS_G3
#define UFS_EXYNOS_LIMIT_PWMGEAR_RX UFS_PWM_G4
#define UFS_EXYNOS_LIMIT_PWMGEAR_TX UFS_PWM_G4
#define UFS_EXYNOS_LIMIT_RX_PWR_PWM SLOW_MODE
#define UFS_EXYNOS_LIMIT_TX_PWR_PWM SLOW_MODE
#define UFS_EXYNOS_LIMIT_RX_PWR_HS FAST_MODE
#define UFS_EXYNOS_LIMIT_TX_PWR_HS FAST_MODE
#define UFS_EXYNOS_LIMIT_HS_RATE PA_HS_MODE_B
#define UFS_EXYNOS_LIMIT_DESIRED_MODE FAST
#define RX_ADV_FINE_GRAN_SUP_EN 0x1
#define RX_ADV_FINE_GRAN_STEP_VAL 0x3
#define RX_ADV_MIN_ACTV_TIME_CAP 0x9