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Merge branch 'remotes/lorenzo/pci/misc'
- Fix mvebu prefetchable BAR regression caused by common bridge emulation that assumed all bridges had prefetchable windows (Thomas Petazzoni) - Make advk_pci_bridge_emul_ops static (Wei Yongjun) * remotes/lorenzo/pci/misc: PCI: aardvark: Make symbol 'advk_pci_bridge_emul_ops' static PCI: pci-bridge-emul: Extend pci_bridge_emul_init() with flags PCI: pci-bridge-emul: Create per-bridge copy of register behavior
This commit is contained in:
commit
5b90fc562c
4 changed files with 74 additions and 31 deletions
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@ -466,7 +466,7 @@ advk_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
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}
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}
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struct pci_bridge_emul_ops advk_pci_bridge_emul_ops = {
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static struct pci_bridge_emul_ops advk_pci_bridge_emul_ops = {
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.read_pcie = advk_pci_bridge_emul_pcie_conf_read,
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.write_pcie = advk_pci_bridge_emul_pcie_conf_write,
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};
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@ -499,7 +499,7 @@ static void advk_sw_pci_bridge_init(struct advk_pcie *pcie)
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bridge->data = pcie;
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bridge->ops = &advk_pci_bridge_emul_ops;
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pci_bridge_emul_init(bridge);
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pci_bridge_emul_init(bridge, 0);
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}
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@ -583,7 +583,7 @@ static void mvebu_pci_bridge_emul_init(struct mvebu_pcie_port *port)
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bridge->data = port;
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bridge->ops = &mvebu_pci_bridge_emul_ops;
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pci_bridge_emul_init(bridge);
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pci_bridge_emul_init(bridge, PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR);
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}
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static inline struct mvebu_pcie *sys_to_pcie(struct pci_sys_data *sys)
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@ -24,29 +24,6 @@
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#define PCI_CAP_PCIE_START PCI_BRIDGE_CONF_END
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#define PCI_CAP_PCIE_END (PCI_CAP_PCIE_START + PCI_EXP_SLTSTA2 + 2)
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/*
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* Initialize a pci_bridge_emul structure to represent a fake PCI
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* bridge configuration space. The caller needs to have initialized
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* the PCI configuration space with whatever values make sense
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* (typically at least vendor, device, revision), the ->ops pointer,
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* and optionally ->data and ->has_pcie.
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*/
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void pci_bridge_emul_init(struct pci_bridge_emul *bridge)
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{
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bridge->conf.class_revision |= PCI_CLASS_BRIDGE_PCI << 16;
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bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE;
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bridge->conf.cache_line_size = 0x10;
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bridge->conf.status = PCI_STATUS_CAP_LIST;
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if (bridge->has_pcie) {
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bridge->conf.capabilities_pointer = PCI_CAP_PCIE_START;
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bridge->pcie_conf.cap_id = PCI_CAP_ID_EXP;
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/* Set PCIe v2, root port, slot support */
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bridge->pcie_conf.cap = PCI_EXP_TYPE_ROOT_PORT << 4 | 2 |
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PCI_EXP_FLAGS_SLOT;
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}
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}
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struct pci_bridge_reg_behavior {
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/* Read-only bits */
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u32 ro;
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@ -283,6 +260,61 @@ const static struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
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},
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};
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/*
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* Initialize a pci_bridge_emul structure to represent a fake PCI
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* bridge configuration space. The caller needs to have initialized
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* the PCI configuration space with whatever values make sense
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* (typically at least vendor, device, revision), the ->ops pointer,
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* and optionally ->data and ->has_pcie.
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*/
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int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
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unsigned int flags)
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{
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bridge->conf.class_revision |= PCI_CLASS_BRIDGE_PCI << 16;
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bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE;
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bridge->conf.cache_line_size = 0x10;
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bridge->conf.status = PCI_STATUS_CAP_LIST;
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bridge->pci_regs_behavior = kmemdup(pci_regs_behavior,
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sizeof(pci_regs_behavior),
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GFP_KERNEL);
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if (!bridge->pci_regs_behavior)
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return -ENOMEM;
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if (bridge->has_pcie) {
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bridge->conf.capabilities_pointer = PCI_CAP_PCIE_START;
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bridge->pcie_conf.cap_id = PCI_CAP_ID_EXP;
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/* Set PCIe v2, root port, slot support */
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bridge->pcie_conf.cap = PCI_EXP_TYPE_ROOT_PORT << 4 | 2 |
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PCI_EXP_FLAGS_SLOT;
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bridge->pcie_cap_regs_behavior =
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kmemdup(pcie_cap_regs_behavior,
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sizeof(pcie_cap_regs_behavior),
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GFP_KERNEL);
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if (!bridge->pcie_cap_regs_behavior) {
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kfree(bridge->pci_regs_behavior);
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return -ENOMEM;
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}
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}
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if (flags & PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR) {
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bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].ro = ~0;
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bridge->pci_regs_behavior[PCI_PREF_MEMORY_BASE / 4].rw = 0;
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}
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return 0;
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}
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/*
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* Cleanup a pci_bridge_emul structure that was previously initilized
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* using pci_bridge_emul_init().
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*/
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void pci_bridge_emul_cleanup(struct pci_bridge_emul *bridge)
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{
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if (bridge->has_pcie)
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kfree(bridge->pcie_cap_regs_behavior);
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kfree(bridge->pci_regs_behavior);
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}
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/*
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* Should be called by the PCI controller driver when reading the PCI
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* configuration space of the fake bridge. It will call back the
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@ -312,11 +344,11 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where,
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reg -= PCI_CAP_PCIE_START;
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read_op = bridge->ops->read_pcie;
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cfgspace = (u32 *) &bridge->pcie_conf;
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behavior = pcie_cap_regs_behavior;
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behavior = bridge->pcie_cap_regs_behavior;
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} else {
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read_op = bridge->ops->read_base;
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cfgspace = (u32 *) &bridge->conf;
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behavior = pci_regs_behavior;
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behavior = bridge->pci_regs_behavior;
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}
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if (read_op)
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@ -383,11 +415,11 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where,
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reg -= PCI_CAP_PCIE_START;
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write_op = bridge->ops->write_pcie;
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cfgspace = (u32 *) &bridge->pcie_conf;
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behavior = pcie_cap_regs_behavior;
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behavior = bridge->pcie_cap_regs_behavior;
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} else {
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write_op = bridge->ops->write_base;
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cfgspace = (u32 *) &bridge->conf;
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behavior = pci_regs_behavior;
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behavior = bridge->pci_regs_behavior;
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}
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/* Keep all bits, except the RW bits */
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@ -107,15 +107,26 @@ struct pci_bridge_emul_ops {
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u32 old, u32 new, u32 mask);
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};
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struct pci_bridge_reg_behavior;
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struct pci_bridge_emul {
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struct pci_bridge_emul_conf conf;
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struct pci_bridge_emul_pcie_conf pcie_conf;
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struct pci_bridge_emul_ops *ops;
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struct pci_bridge_reg_behavior *pci_regs_behavior;
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struct pci_bridge_reg_behavior *pcie_cap_regs_behavior;
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void *data;
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bool has_pcie;
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};
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void pci_bridge_emul_init(struct pci_bridge_emul *bridge);
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enum {
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PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR = BIT(0),
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};
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int pci_bridge_emul_init(struct pci_bridge_emul *bridge,
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unsigned int flags);
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void pci_bridge_emul_cleanup(struct pci_bridge_emul *bridge);
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int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where,
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int size, u32 *value);
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int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where,
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