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drm/i915: Serialise updates to GGTT with access through GGTT on Braswell
When accessing through the GTT from one CPU whilst concurrently updating the GGTT PTEs in another thread, the hardware likes to return random data. As we have strong serialisation prevent us from modifying the PTE of an active GTT mmapping, we have to conclude that it whilst modifying other PTE's that error occurs. (I have not looked for any pattern such as modifying PTE within the same page or cacheline as active PTE - though checking whether revoking neighbouring objects should be enough to test that theory.) The corruption also seems restricted to Braswell and disappears with maxcpus=0. This patch stops all access through the GTT by other CPUs when we update any PTE by stopping the machine around the GGTT update. Note that splitting up the 64 bit write into two 32 bit writes was tried and found to fail too. Testcase: igt/gem_concurrent_blit Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89079 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> [danvet: Add note about 2x 32bits failing too.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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2 changed files with 25 additions and 0 deletions
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@ -10,6 +10,7 @@ config DRM_I915
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# the shmem_readpage() which depends upon tmpfs
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select SHMEM
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select TMPFS
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select STOP_MACHINE
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select DRM_KMS_HELPER
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select DRM_PANEL
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select DRM_MIPI_DSI
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@ -24,6 +24,7 @@
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*/
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#include <linux/seq_file.h>
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#include <linux/stop_machine.h>
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#include <drm/drmP.h>
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#include <drm/i915_drm.h>
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#include "i915_drv.h"
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@ -2533,6 +2534,26 @@ static int ggtt_bind_vma(struct i915_vma *vma,
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return 0;
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}
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struct ggtt_bind_vma__cb {
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struct i915_vma *vma;
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enum i915_cache_level cache_level;
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u32 flags;
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};
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static int ggtt_bind_vma__cb(void *_arg)
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{
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struct ggtt_bind_vma__cb *arg = _arg;
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return ggtt_bind_vma(arg->vma, arg->cache_level, arg->flags);
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}
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static int ggtt_bind_vma__BKL(struct i915_vma *vma,
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enum i915_cache_level cache_level,
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u32 flags)
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{
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struct ggtt_bind_vma__cb arg = { vma, cache_level, flags };
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return stop_machine(ggtt_bind_vma__cb, &arg, NULL);
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}
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static int aliasing_gtt_bind_vma(struct i915_vma *vma,
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enum i915_cache_level cache_level,
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u32 flags)
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@ -3000,6 +3021,9 @@ static int gen8_gmch_probe(struct drm_device *dev,
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dev_priv->gtt.base.bind_vma = ggtt_bind_vma;
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dev_priv->gtt.base.unbind_vma = ggtt_unbind_vma;
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if (IS_CHERRYVIEW(dev))
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dev_priv->gtt.base.bind_vma = ggtt_bind_vma__BKL;
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return ret;
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}
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