mirrors/linux-stable
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git synced 2024-10-01 22:54:01 +00:00
Code Issues Releases Wiki Activity

dts: vt8500: Populate missing PLL nodes

Browse source 
Add the missing devicetree nodes for PLL's found on the WM8505, WM8650
and WM8850 SoCs.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
This commit is contained in:
Tony Prisk 2013-05-10 17:35:11 +12:00
parent 7d4c6f3c5f
commit 5c2b0a8531
3 changed files with 77 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

21
arch/arm/boot/dts/wm8505.dtsi
View file

@ -81,6 +81,13 @@ ref25: ref25M {
clock-frequency = <25000000>;
};
plla: plla {
#clock-cells = <0>;
compatible = "via,vt8500-pll-clock";
clocks = <&ref25>;
reg = <0x200>;
};
pllb: pllb {
#clock-cells = <0>;
compatible = "via,vt8500-pll-clock";
@ -88,6 +95,20 @@ pllb: pllb {
reg = <0x204>;
};
pllc: pllc {
#clock-cells = <0>;
compatible = "via,vt8500-pll-clock";
clocks = <&ref25>;
reg = <0x208>;
};
plld: plld {
#clock-cells = <0>;
compatible = "via,vt8500-pll-clock";
clocks = <&ref25>;
reg = <0x20c>;
};
clkuart0: uart0 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";

21
arch/arm/boot/dts/wm8650.dtsi
View file

@ -92,6 +92,27 @@ pllb: pllb {
reg = <0x204>;
};
pllc: pllc {
#clock-cells = <0>;
compatible = "wm,wm8650-pll-clock";
clocks = <&ref25>;
reg = <0x208>;
};
plld: plld {
#clock-cells = <0>;
compatible = "wm,wm8650-pll-clock";
clocks = <&ref25>;
reg = <0x20c>;
};
plle: plle {
#clock-cells = <0>;
compatible = "wm,wm8650-pll-clock";
clocks = <&ref25>;
reg = <0x210>;
};
clkuart0: uart0 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";

35
arch/arm/boot/dts/wm8850.dtsi
View file

@ -95,6 +95,41 @@ pllb: pllb {
reg = <0x204>;
};
pllc: pllc {
#clock-cells = <0>;
compatible = "wm,wm8850-pll-clock";
clocks = <&ref25>;
reg = <0x208>;
};
plld: plld {
#clock-cells = <0>;
compatible = "wm,wm8850-pll-clock";
clocks = <&ref25>;
reg = <0x20c>;
};
plle: plle {
#clock-cells = <0>;
compatible = "wm,wm8850-pll-clock";
clocks = <&ref25>;
reg = <0x210>;
};
pllf: pllf {
#clock-cells = <0>;
compatible = "wm,wm8850-pll-clock";
clocks = <&ref25>;
reg = <0x214>;
};
pllg: pllg {
#clock-cells = <0>;
compatible = "wm,wm8850-pll-clock";
clocks = <&ref25>;
reg = <0x218>;
};
clkuart0: uart0 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";