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drm/amd/display: Return last used DRR VTOTAL from DC
[How] Add call to get the last used VTOTAL from DC Signed-off-by: Jayendran Ramani <Jayendran.Ramani@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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593397a18c
commit
5c69cc559a
12 changed files with 75 additions and 6 deletions
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@ -325,6 +325,48 @@ bool dc_stream_adjust_vmin_vmax(struct dc *dc,
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return ret;
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}
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/**
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*****************************************************************************
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* Function: dc_stream_get_last_vrr_vtotal
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*
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* @brief
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* Looks up the pipe context of dc_stream_state and gets the
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* last VTOTAL used by DRR (Dynamic Refresh Rate)
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*
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* @param [in] dc: dc reference
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* @param [in] stream: Initial dc stream state
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* @param [in] adjust: Updated parameters for vertical_total_min and
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* vertical_total_max
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*****************************************************************************
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*/
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bool dc_stream_get_last_used_drr_vtotal(struct dc *dc,
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struct dc_stream_state *stream,
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uint32_t *refresh_rate)
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{
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bool status = false;
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int i = 0;
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for (i = 0; i < MAX_PIPES; i++) {
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struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i];
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if (pipe->stream == stream && pipe->stream_res.tg) {
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/* Only execute if a function pointer has been defined for
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* the DC version in question
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*/
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if (pipe->stream_res.tg->funcs->get_last_used_drr_vtotal) {
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pipe->stream_res.tg->funcs->get_last_used_drr_vtotal(pipe->stream_res.tg, refresh_rate);
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status = true;
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break;
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}
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}
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}
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return status;
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}
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bool dc_stream_get_crtc_position(struct dc *dc,
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struct dc_stream_state **streams, int num_streams,
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unsigned int *v_pos, unsigned int *nom_v_pos)
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@ -465,6 +465,10 @@ bool dc_stream_adjust_vmin_vmax(struct dc *dc,
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struct dc_stream_state *stream,
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struct dc_crtc_timing_adjust *adjust);
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bool dc_stream_get_last_used_drr_vtotal(struct dc *dc,
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struct dc_stream_state *stream,
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uint32_t *refresh_rate);
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bool dc_stream_get_crtc_position(struct dc *dc,
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struct dc_stream_state **stream,
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int num_streams,
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@ -2231,6 +2231,7 @@ static const struct timing_generator_funcs dce110_tg_funcs = {
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dce110_timing_generator_enable_advanced_request,
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.set_drr =
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dce110_timing_generator_set_drr,
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.get_last_used_drr_vtotal = NULL,
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.set_static_screen_control =
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dce110_timing_generator_set_static_screen_control,
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.set_test_pattern = dce110_timing_generator_set_test_pattern,
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@ -1190,6 +1190,7 @@ static const struct timing_generator_funcs dce120_tg_funcs = {
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.tear_down_global_swap_lock = dce120_timing_generator_tear_down_global_swap_lock,
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.enable_advanced_request = dce120_timing_generator_enable_advanced_request,
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.set_drr = dce120_timing_generator_set_drr,
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.get_last_used_drr_vtotal = NULL,
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.set_static_screen_control = dce120_timing_generator_set_static_screen_control,
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.set_test_pattern = dce120_timing_generator_set_test_pattern,
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.arm_vert_intr = dce120_arm_vert_intr,
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@ -209,6 +209,7 @@ static const struct timing_generator_funcs dce80_tg_funcs = {
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.tear_down_global_swap_lock =
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dce110_timing_generator_tear_down_global_swap_lock,
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.set_drr = dce110_timing_generator_set_drr,
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.get_last_used_drr_vtotal = NULL,
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.set_static_screen_control =
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dce110_timing_generator_set_static_screen_control,
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.set_test_pattern = dce110_timing_generator_set_test_pattern,
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@ -1554,6 +1554,7 @@ static const struct timing_generator_funcs dcn10_tg_funcs = {
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.unlock = optc1_unlock,
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.enable_optc_clock = optc1_enable_optc_clock,
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.set_drr = optc1_set_drr,
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.get_last_used_drr_vtotal = NULL,
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.set_static_screen_control = optc1_set_static_screen_control,
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.set_test_pattern = optc1_set_test_pattern,
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.program_stereo = optc1_program_stereo,
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@ -171,6 +171,7 @@ struct dcn_optc_registers {
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uint32_t OPTC_DATA_FORMAT_CONTROL;
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uint32_t OPTC_BYTES_PER_PIXEL;
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uint32_t OPTC_WIDTH_CONTROL;
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uint32_t OTG_DRR_CONTROL;
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uint32_t OTG_BLANK_DATA_COLOR;
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uint32_t OTG_BLANK_DATA_COLOR_EXT;
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uint32_t OTG_DRR_TRIGGER_WINDOW;
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@ -517,7 +518,8 @@ struct dcn_optc_registers {
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type OTG_CRC_DSC_MODE;\
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type OTG_CRC_DATA_STREAM_COMBINE_MODE;\
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type OTG_CRC_DATA_STREAM_SPLIT_MODE;\
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type OTG_CRC_DATA_FORMAT;
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type OTG_CRC_DATA_FORMAT;\
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type OTG_V_TOTAL_LAST_USED_BY_DRR;
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struct dcn_optc_shift {
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@ -520,6 +520,14 @@ bool optc2_configure_crc(struct timing_generator *optc,
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return optc1_configure_crc(optc, params);
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}
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void optc2_get_last_used_drr_vtotal(struct timing_generator *optc, uint32_t *refresh_rate)
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{
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struct optc *optc1 = DCN10TG_FROM_TG(optc);
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REG_GET(OTG_DRR_CONTROL, OTG_V_TOTAL_LAST_USED_BY_DRR, refresh_rate);
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}
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static struct timing_generator_funcs dcn20_tg_funcs = {
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.validate_timing = optc1_validate_timing,
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.program_timing = optc1_program_timing,
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@ -553,6 +561,7 @@ static struct timing_generator_funcs dcn20_tg_funcs = {
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.lock_doublebuffer_disable = optc2_lock_doublebuffer_disable,
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.enable_optc_clock = optc1_enable_optc_clock,
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.set_drr = optc1_set_drr,
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.get_last_used_drr_vtotal = optc2_get_last_used_drr_vtotal,
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.set_static_screen_control = optc1_set_static_screen_control,
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.program_stereo = optc1_program_stereo,
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.is_stereo_left_eye = optc1_is_stereo_left_eye,
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@ -591,4 +600,3 @@ void dcn20_timing_generator_init(struct optc *optc1)
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optc1->min_h_sync_width = 4;// Minimum HSYNC = 8 pixels asked By HW in the first place for no actual reason. Oculus Rift S will not light up with 8 as it's hsyncWidth is 6. Changing it to 4 to fix that issue.
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optc1->min_v_sync_width = 1;
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}
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@ -42,7 +42,8 @@
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SRI(OPTC_WIDTH_CONTROL, ODM, inst),\
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SRI(OPTC_MEMORY_CONFIG, ODM, inst),\
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SR(DWB_SOURCE_SELECT),\
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SRI(OTG_MANUAL_FLOW_CONTROL, OTG, inst)
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SRI(OTG_MANUAL_FLOW_CONTROL, OTG, inst), \
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SRI(OTG_DRR_CONTROL, OTG, inst)
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#define TG_COMMON_MASK_SH_LIST_DCN2_0(mask_sh)\
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TG_COMMON_MASK_SH_LIST_DCN(mask_sh),\
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@ -75,10 +76,14 @@
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SF(ODM0_OPTC_WIDTH_CONTROL, OPTC_SEGMENT_WIDTH, mask_sh),\
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SF(DWB_SOURCE_SELECT, OPTC_DWB0_SOURCE_SELECT, mask_sh),\
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SF(DWB_SOURCE_SELECT, OPTC_DWB1_SOURCE_SELECT, mask_sh),\
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SF(OTG0_OTG_MANUAL_FLOW_CONTROL, MANUAL_FLOW_CONTROL, mask_sh)
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SF(OTG0_OTG_MANUAL_FLOW_CONTROL, MANUAL_FLOW_CONTROL, mask_sh), \
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SF(OTG0_OTG_DRR_CONTROL, OTG_V_TOTAL_LAST_USED_BY_DRR, mask_sh)
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void dcn20_timing_generator_init(struct optc *optc);
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void optc2_get_last_used_drr_vtotal(struct timing_generator *optc,
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uint32_t *refresh_rate);
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bool optc2_enable_crtc(struct timing_generator *optc);
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void optc2_set_gsl(struct timing_generator *optc,
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@ -315,6 +315,7 @@ static struct timing_generator_funcs dcn30_tg_funcs = {
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.lock_doublebuffer_disable = optc3_lock_doublebuffer_disable,
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.enable_optc_clock = optc1_enable_optc_clock,
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.set_drr = optc1_set_drr,
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.get_last_used_drr_vtotal = optc2_get_last_used_drr_vtotal,
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.set_static_screen_control = optc1_set_static_screen_control,
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.program_stereo = optc1_program_stereo,
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.is_stereo_left_eye = optc1_is_stereo_left_eye,
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@ -87,7 +87,8 @@
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SRI(OTG_CRC0_WINDOWB_X_CONTROL, OTG, inst),\
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SRI(OTG_CRC0_WINDOWB_Y_CONTROL, OTG, inst),\
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SR(GSL_SOURCE_SELECT),\
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SRI(OTG_TRIGA_MANUAL_TRIG, OTG, inst)
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SRI(OTG_TRIGA_MANUAL_TRIG, OTG, inst),\
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SRI(OTG_DRR_CONTROL, OTG, inst)
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#define OPTC_COMMON_REG_LIST_DCN3_0(inst) \
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@ -233,7 +234,8 @@
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SF(GSL_SOURCE_SELECT, GSL0_READY_SOURCE_SEL, mask_sh),\
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SF(GSL_SOURCE_SELECT, GSL1_READY_SOURCE_SEL, mask_sh),\
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SF(GSL_SOURCE_SELECT, GSL2_READY_SOURCE_SEL, mask_sh),\
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SF(OTG0_OTG_GLOBAL_CONTROL2, MANUAL_FLOW_CONTROL_SEL, mask_sh)
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SF(OTG0_OTG_GLOBAL_CONTROL2, MANUAL_FLOW_CONTROL_SEL, mask_sh),\
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SF(OTG0_OTG_DRR_CONTROL, OTG_V_TOTAL_LAST_USED_BY_DRR, mask_sh)
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#define OPTC_COMMON_MASK_SH_LIST_DCN3_0(mask_sh)\
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OPTC_COMMON_MASK_SH_LIST_DCN3_BASE(mask_sh),\
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@ -227,6 +227,7 @@ struct timing_generator_funcs {
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bool enable, const struct dc_crtc_timing *timing);
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void (*set_drr)(struct timing_generator *tg, const struct drr_params *params);
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void (*set_vtotal_min_max)(struct timing_generator *optc, int vtotal_min, int vtotal_max);
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void (*get_last_used_drr_vtotal)(struct timing_generator *optc, uint32_t *refresh_rate);
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void (*set_static_screen_control)(struct timing_generator *tg,
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uint32_t event_triggers,
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uint32_t num_frames);
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