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This pull request contains Broadcom ARM-based SoC Device Tree fixes for
4.12, please pull the following: - Baruch provides several fixes for the Raspberry Pi (BCM2835) Device Tree source include file: uart0 pinctrl node names, pin number for i2c0, uart0 rts/cts pins and invalid uart1 pin, missing numbers for ethernet aliases -----BEGIN PGP SIGNATURE----- iQIcBAABCAAGBQJZF8+xAAoJEIfQlpxEBwcERmUP/iAf5euX/RPb3eJ8QmDhn2ap bnU4Puh5aT16fwqK/fohpzqcxhlkqsPhIvl6gwi6UHzNbZOqhz2gwXBjP7DuDsPx rNF7qJE0zFCy/jmhiSbMWiC62Q7UbIR+TmtP3cFzXw8edM6Tjp+IFkE8fuSmQkdd /djp+3k16KNRsSu+iyNDJSu4jNjigKP1DYPFJi0cMceQZ2Hr6KHO7r2mHXmZ8Cf7 cxIPw38ZRiwIU6gbyPrVSLjJJ1X3O3QAyqlTbeooJn5bZ6cEc7jt2LlUUoLY2JTQ +2HoT2DsrDX8SfkJmyBr41/awsHq2wx+++zss3qd9LHKqRyKBZgY6HVea05+z1T9 +FtWZ74zmOzHrjqwB5a3fN4+EfY4HKqSDVnrgbNu9Y59LCZPeVSLcFK1rpuLnu62 ZaeTTOmwhwzetOGi96+2LhnMihFbGoB5te+y8nZtf9vAONp6nLsDgQ30gqGC6/19 JeR+5z+z++7TpsghLJ+YlE4HjxMRV5zFYTLmHHI76DJOCb8i48wMURDizPHZYuaq +aRiBJkmweZtu1KJea867UIDblgk2K9QosL35lomrD518VeTIgSrmBrux7fwlMC/ r8Z0B3z632gNYi+ZrR/Fr+9lmHpq7NBqEai5BAwI1DkwW3HfdeSAczZ5Tij42eGA U2qLiZSH7U/8cb6mCp0H =6jUO -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-4.12/devicetree-fixes' of http://github.com/Broadcom/stblinux into fixes This pull request contains Broadcom ARM-based SoC Device Tree fixes for 4.12, please pull the following: - Baruch provides several fixes for the Raspberry Pi (BCM2835) Device Tree source include file: uart0 pinctrl node names, pin number for i2c0, uart0 rts/cts pins and invalid uart1 pin, missing numbers for ethernet aliases * tag 'arm-soc/for-4.12/devicetree-fixes' of http://github.com/Broadcom/stblinux: ARM: dts: bcm2835: add index to the ethernet alias ARM: dts: bcm2835: fix uart0/uart1 pins ARM: dts: bcm2835: fix i2c0 pins ARM: dts: bcm2835: fix uart0 pinctrl node names Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
5cb1ac0f79
3 changed files with 15 additions and 11 deletions
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@ -1,6 +1,6 @@
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/ {
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aliases {
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ethernet = ðernet;
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ethernet0 = ðernet;
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};
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};
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@ -1,6 +1,6 @@
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/ {
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aliases {
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ethernet = ðernet;
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ethernet0 = ðernet;
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};
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};
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@ -198,8 +198,8 @@ i2c0_gpio0: i2c0_gpio0 {
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brcm,pins = <0 1>;
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brcm,function = <BCM2835_FSEL_ALT0>;
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};
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i2c0_gpio32: i2c0_gpio32 {
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brcm,pins = <32 34>;
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i2c0_gpio28: i2c0_gpio28 {
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brcm,pins = <28 29>;
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brcm,function = <BCM2835_FSEL_ALT0>;
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};
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i2c0_gpio44: i2c0_gpio44 {
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@ -295,20 +295,28 @@ uart0_gpio14: uart0_gpio14 {
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/* Separate from the uart0_gpio14 group
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* because it conflicts with spi1_gpio16, and
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* people often run uart0 on the two pins
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* without flow contrl.
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* without flow control.
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*/
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uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
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brcm,pins = <16 17>;
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brcm,function = <BCM2835_FSEL_ALT3>;
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};
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uart0_gpio30: uart0_gpio30 {
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uart0_ctsrts_gpio30: uart0_ctsrts_gpio30 {
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brcm,pins = <30 31>;
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brcm,function = <BCM2835_FSEL_ALT3>;
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};
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uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 {
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uart0_gpio32: uart0_gpio32 {
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brcm,pins = <32 33>;
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brcm,function = <BCM2835_FSEL_ALT3>;
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};
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uart0_gpio36: uart0_gpio36 {
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brcm,pins = <36 37>;
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brcm,function = <BCM2835_FSEL_ALT2>;
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};
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uart0_ctsrts_gpio38: uart0_ctsrts_gpio38 {
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brcm,pins = <38 39>;
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brcm,function = <BCM2835_FSEL_ALT2>;
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};
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uart1_gpio14: uart1_gpio14 {
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brcm,pins = <14 15>;
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@ -326,10 +334,6 @@ uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
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brcm,pins = <30 31>;
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brcm,function = <BCM2835_FSEL_ALT5>;
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};
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uart1_gpio36: uart1_gpio36 {
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brcm,pins = <36 37 38 39>;
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brcm,function = <BCM2835_FSEL_ALT2>;
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};
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uart1_gpio40: uart1_gpio40 {
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brcm,pins = <40 41>;
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brcm,function = <BCM2835_FSEL_ALT5>;
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