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video: fbdev: nvidia: deprecate pci_get_bus_and_slot()
pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as where a PCI device is present. This restricts the device drivers to be reused for other domain numbers. Getting ready to remove pci_get_bus_and_slot() function in favor of pci_get_domain_bus_and_slot(). struct nvidia_par has a pointer to struct pci_dev. Use the pci_dev member to extract the domain information and pass it to pci_get_domain_bus_and_slot() function. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Bjorn Helgaas <helgaas@kernel.org> Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
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2 changed files with 8 additions and 6 deletions
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@ -683,10 +683,11 @@ static void nForceUpdateArbitrationSettings(unsigned VClk,
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nv10_sim_state sim_data;
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unsigned int M, N, P, pll, MClk, NVClk, memctrl;
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struct pci_dev *dev;
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int domain = pci_domain_nr(par->pci_dev->bus);
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if ((par->Chipset & 0x0FF0) == 0x01A0) {
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unsigned int uMClkPostDiv;
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dev = pci_get_bus_and_slot(0, 3);
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dev = pci_get_domain_bus_and_slot(domain, 0, 3);
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pci_read_config_dword(dev, 0x6C, &uMClkPostDiv);
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uMClkPostDiv = (uMClkPostDiv >> 8) & 0xf;
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@ -694,7 +695,7 @@ static void nForceUpdateArbitrationSettings(unsigned VClk,
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uMClkPostDiv = 4;
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MClk = 400000 / uMClkPostDiv;
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} else {
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dev = pci_get_bus_and_slot(0, 5);
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dev = pci_get_domain_bus_and_slot(domain, 0, 5);
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pci_read_config_dword(dev, 0x4c, &MClk);
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MClk /= 1000;
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}
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@ -707,13 +708,13 @@ static void nForceUpdateArbitrationSettings(unsigned VClk,
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sim_data.pix_bpp = (char)pixelDepth;
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sim_data.enable_video = 0;
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sim_data.enable_mp = 0;
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dev = pci_get_bus_and_slot(0, 1);
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dev = pci_get_domain_bus_and_slot(domain, 0, 1);
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pci_read_config_dword(dev, 0x7C, &sim_data.memory_type);
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pci_dev_put(dev);
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sim_data.memory_type = (sim_data.memory_type >> 12) & 1;
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sim_data.memory_width = 64;
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dev = pci_get_bus_and_slot(0, 3);
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dev = pci_get_domain_bus_and_slot(domain, 0, 3);
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pci_read_config_dword(dev, 0, &memctrl);
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pci_dev_put(dev);
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memctrl >>= 16;
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@ -721,7 +722,7 @@ static void nForceUpdateArbitrationSettings(unsigned VClk,
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if ((memctrl == 0x1A9) || (memctrl == 0x1AB) || (memctrl == 0x1ED)) {
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u32 dimm[3];
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dev = pci_get_bus_and_slot(0, 2);
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dev = pci_get_domain_bus_and_slot(domain, 0, 2);
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pci_read_config_dword(dev, 0x40, &dimm[0]);
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dimm[0] = (dimm[0] >> 8) & 0x4f;
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pci_read_config_dword(dev, 0x44, &dimm[1]);
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@ -264,7 +264,8 @@ static void nv10GetConfig(struct nvidia_par *par)
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}
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#endif
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dev = pci_get_bus_and_slot(0, 1);
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dev = pci_get_domain_bus_and_slot(pci_domain_nr(par->pci_dev->bus),
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0, 1);
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if ((par->Chipset & 0xffff) == 0x01a0) {
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u32 amt;
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