diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
index 99b2738c204f..5f5d468c1efe 100644
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c
@@ -192,7 +192,7 @@ static const struct pll_rate_table axg_gp0_pll_rate_table[] = {
 	{ /* sentinel */ },
 };
 
-const struct reg_sequence axg_gp0_init_regs[] = {
+static const struct reg_sequence axg_gp0_init_regs[] = {
 	{ .reg = HHI_GP0_PLL_CNTL1,	.def = 0xc084b000 },
 	{ .reg = HHI_GP0_PLL_CNTL2,	.def = 0xb75020be },
 	{ .reg = HHI_GP0_PLL_CNTL3,	.def = 0x0a59a288 },
@@ -245,7 +245,7 @@ static struct clk_regmap axg_gp0_pll = {
 	},
 };
 
-const struct reg_sequence axg_hifi_init_regs[] = {
+static const struct reg_sequence axg_hifi_init_regs[] = {
 	{ .reg = HHI_HIFI_PLL_CNTL1,	.def = 0xc084b000 },
 	{ .reg = HHI_HIFI_PLL_CNTL2,	.def = 0xb75020be },
 	{ .reg = HHI_HIFI_PLL_CNTL3,	.def = 0x0a6a3a88 },
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index db5e0dcbb5aa..b1e4d9557610 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -389,7 +389,7 @@ static struct clk_regmap gxbb_sys_pll = {
 	},
 };
 
-const struct reg_sequence gxbb_gp0_init_regs[] = {
+static const struct reg_sequence gxbb_gp0_init_regs[] = {
 	{ .reg = HHI_GP0_PLL_CNTL2,	.def = 0x69c80000 },
 	{ .reg = HHI_GP0_PLL_CNTL3,	.def = 0x0a5590c4 },
 	{ .reg = HHI_GP0_PLL_CNTL4,	.def = 0x0000500d },
@@ -436,7 +436,7 @@ static struct clk_regmap gxbb_gp0_pll = {
 	},
 };
 
-const struct reg_sequence gxl_gp0_init_regs[] = {
+static const struct reg_sequence gxl_gp0_init_regs[] = {
 	{ .reg = HHI_GP0_PLL_CNTL1,	.def = 0xc084b000 },
 	{ .reg = HHI_GP0_PLL_CNTL2,	.def = 0xb75020be },
 	{ .reg = HHI_GP0_PLL_CNTL3,	.def = 0x0a59a288 },
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
index b324c44d36eb..cc2992493e0b 100644
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c
@@ -509,7 +509,7 @@ static struct clk_regmap meson8b_mpeg_clk_sel = {
 	},
 };
 
-struct clk_regmap meson8b_mpeg_clk_div = {
+static struct clk_regmap meson8b_mpeg_clk_div = {
 	.data = &(struct clk_regmap_div_data){
 		.offset = HHI_MPEG_CLK_CNTL,
 		.shift = 0,
@@ -523,7 +523,7 @@ struct clk_regmap meson8b_mpeg_clk_div = {
 	},
 };
 
-struct clk_regmap meson8b_clk81 = {
+static struct clk_regmap meson8b_clk81 = {
 	.data = &(struct clk_regmap_gate_data){
 		.offset = HHI_MPEG_CLK_CNTL,
 		.bit_idx = 7,
@@ -537,7 +537,7 @@ struct clk_regmap meson8b_clk81 = {
 	},
 };
 
-struct clk_regmap meson8b_cpu_in_sel = {
+static struct clk_regmap meson8b_cpu_in_sel = {
 	.data = &(struct clk_regmap_mux_data){
 		.offset = HHI_SYS_CPU_CLK_CNTL0,
 		.mask = 0x1,
@@ -588,7 +588,7 @@ static const struct clk_div_table cpu_scale_table[] = {
 	{ /* sentinel */ },
 };
 
-struct clk_regmap meson8b_cpu_scale_div = {
+static struct clk_regmap meson8b_cpu_scale_div = {
 	.data = &(struct clk_regmap_div_data){
 		.offset =  HHI_SYS_CPU_CLK_CNTL1,
 		.shift = 20,
@@ -605,7 +605,7 @@ struct clk_regmap meson8b_cpu_scale_div = {
 	},
 };
 
-struct clk_regmap meson8b_cpu_scale_out_sel = {
+static struct clk_regmap meson8b_cpu_scale_out_sel = {
 	.data = &(struct clk_regmap_mux_data){
 		.offset = HHI_SYS_CPU_CLK_CNTL0,
 		.mask = 0x3,
@@ -623,7 +623,7 @@ struct clk_regmap meson8b_cpu_scale_out_sel = {
 	},
 };
 
-struct clk_regmap meson8b_cpu_clk = {
+static struct clk_regmap meson8b_cpu_clk = {
 	.data = &(struct clk_regmap_mux_data){
 		.offset = HHI_SYS_CPU_CLK_CNTL0,
 		.mask = 0x1,
@@ -1049,7 +1049,6 @@ static const struct regmap_config clkc_regmap_config = {
 static int meson8b_clkc_probe(struct platform_device *pdev)
 {
 	int ret, i;
-	struct clk *clk;
 	struct device *dev = &pdev->dev;
 	struct regmap *map;