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mlx5-fixes-2024-01-24
-----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEGhZs6bAKwk/OTgTpSD+KveBX+j4FAmWwxyoACgkQSD+KveBX +j5yIwgAm37qO63rmb+1SVWy8FHmY7W4UUq6NEnReDRncVfnCazZ1Vh/ki0Qzzck 4fEjqIfacV2NSQdCuRlQzWU6SH/N+QlLUHF0gL8fSAgDq/tCuMg8Ln9ZCMbobRpZ 31qLKkkPQ1HIcadmoOuHNN8nslOxWm1Vlkqxj9CqUkV9OT3S6Hu1SWmBCzlSN8sN vvoDNkR8uTg+229HEf3visTpuyezu2fnBL5rNzkByb4TMn0ns0lcF79bYPh8Xa7p dszLpQw/gYQqzmo+Kh3bG6lUOKEZjbN8IUoa+nlNKQlyQIhxAegNzakSQ4ocgcLd aRZMqqfFpk5OhukevnLa/0wYTy1ScA== =bU/e -----END PGP SIGNATURE----- Merge tag 'mlx5-fixes-2024-01-24' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux Saeed Mahameed says: ==================== mlx5 fixes 2024-01-24 This series provides bug fixes to mlx5 driver. Please pull and let me know if there is any problem. * tag 'mlx5-fixes-2024-01-24' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux: net/mlx5e: fix a potential double-free in fs_any_create_groups net/mlx5e: fix a double-free in arfs_create_groups net/mlx5e: Ignore IPsec replay window values on sender side net/mlx5e: Allow software parsing when IPsec crypto is enabled net/mlx5: Use mlx5 device constant for selecting CQ period mode for ASO net/mlx5: DR, Can't go to uplink vport on RX rule net/mlx5: DR, Use the right GVMI number for drop action net/mlx5: Bridge, fix multicast packets sent to uplink net/mlx5: Fix a WARN upon a callback command failure net/mlx5e: Fix peer flow lists handling net/mlx5e: Fix inconsistent hairpin RQT sizes net/mlx5e: Fix operation precedence bug in port timestamping napi_poll context net/mlx5: Fix query of sd_group field net/mlx5e: Use the correct lag ports number when creating TISes ==================== Link: https://lore.kernel.org/r/20240124081855.115410-1-saeed@kernel.org Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
commit
5da4597163
20 changed files with 99 additions and 41 deletions
|
@ -1923,6 +1923,7 @@ static void cmd_status_log(struct mlx5_core_dev *dev, u16 opcode, u8 status,
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{
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const char *namep = mlx5_command_str(opcode);
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struct mlx5_cmd_stats *stats;
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unsigned long flags;
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if (!err || !(strcmp(namep, "unknown command opcode")))
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return;
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@ -1930,7 +1931,7 @@ static void cmd_status_log(struct mlx5_core_dev *dev, u16 opcode, u8 status,
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stats = xa_load(&dev->cmd.stats, opcode);
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if (!stats)
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return;
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spin_lock_irq(&stats->lock);
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spin_lock_irqsave(&stats->lock, flags);
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stats->failed++;
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if (err < 0)
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stats->last_failed_errno = -err;
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@ -1939,7 +1940,7 @@ static void cmd_status_log(struct mlx5_core_dev *dev, u16 opcode, u8 status,
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stats->last_failed_mbox_status = status;
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stats->last_failed_syndrome = syndrome;
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}
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spin_unlock_irq(&stats->lock);
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spin_unlock_irqrestore(&stats->lock, flags);
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}
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/* preserve -EREMOTEIO for outbox.status != OK, otherwise return err as is */
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@ -1124,7 +1124,7 @@ static inline bool mlx5_tx_swp_supported(struct mlx5_core_dev *mdev)
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extern const struct ethtool_ops mlx5e_ethtool_ops;
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int mlx5e_create_mkey(struct mlx5_core_dev *mdev, u32 pdn, u32 *mkey);
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int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev);
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int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev, bool create_tises);
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void mlx5e_destroy_mdev_resources(struct mlx5_core_dev *mdev);
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int mlx5e_refresh_tirs(struct mlx5e_priv *priv, bool enable_uc_lb,
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bool enable_mc_lb);
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@ -436,6 +436,7 @@ static int fs_any_create_groups(struct mlx5e_flow_table *ft)
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in = kvzalloc(inlen, GFP_KERNEL);
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if (!in || !ft->g) {
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kfree(ft->g);
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ft->g = NULL;
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kvfree(in);
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return -ENOMEM;
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}
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@ -1064,8 +1064,8 @@ void mlx5e_build_sq_param(struct mlx5_core_dev *mdev,
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void *wq = MLX5_ADDR_OF(sqc, sqc, wq);
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bool allow_swp;
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allow_swp =
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mlx5_geneve_tx_allowed(mdev) || !!mlx5_ipsec_device_caps(mdev);
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allow_swp = mlx5_geneve_tx_allowed(mdev) ||
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(mlx5_ipsec_device_caps(mdev) & MLX5_IPSEC_CAP_CRYPTO);
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mlx5e_build_sq_param_common(mdev, param);
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MLX5_SET(wq, wq, log_wq_sz, params->log_sq_size);
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MLX5_SET(sqc, sqc, allow_swp, allow_swp);
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@ -213,7 +213,7 @@ static void mlx5e_ptp_handle_ts_cqe(struct mlx5e_ptpsq *ptpsq,
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mlx5e_ptpsq_mark_ts_cqes_undelivered(ptpsq, hwtstamp);
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out:
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napi_consume_skb(skb, budget);
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md_buff[*md_buff_sz++] = metadata_id;
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md_buff[(*md_buff_sz)++] = metadata_id;
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if (unlikely(mlx5e_ptp_metadata_map_unhealthy(&ptpsq->metadata_map)) &&
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!test_and_set_bit(MLX5E_SQ_STATE_RECOVERING, &sq->state))
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queue_work(ptpsq->txqsq.priv->wq, &ptpsq->report_unhealthy_work);
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@ -336,12 +336,17 @@ void mlx5e_ipsec_build_accel_xfrm_attrs(struct mlx5e_ipsec_sa_entry *sa_entry,
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/* iv len */
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aes_gcm->icv_len = x->aead->alg_icv_len;
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attrs->dir = x->xso.dir;
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/* esn */
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if (x->props.flags & XFRM_STATE_ESN) {
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attrs->replay_esn.trigger = true;
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attrs->replay_esn.esn = sa_entry->esn_state.esn;
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attrs->replay_esn.esn_msb = sa_entry->esn_state.esn_msb;
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attrs->replay_esn.overlap = sa_entry->esn_state.overlap;
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if (attrs->dir == XFRM_DEV_OFFLOAD_OUT)
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goto skip_replay_window;
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switch (x->replay_esn->replay_window) {
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case 32:
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attrs->replay_esn.replay_window =
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@ -365,7 +370,7 @@ void mlx5e_ipsec_build_accel_xfrm_attrs(struct mlx5e_ipsec_sa_entry *sa_entry,
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}
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}
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attrs->dir = x->xso.dir;
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skip_replay_window:
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/* spi */
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attrs->spi = be32_to_cpu(x->id.spi);
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@ -501,7 +506,8 @@ static int mlx5e_xfrm_validate_state(struct mlx5_core_dev *mdev,
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return -EINVAL;
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}
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if (x->replay_esn && x->replay_esn->replay_window != 32 &&
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if (x->replay_esn && x->xso.dir == XFRM_DEV_OFFLOAD_IN &&
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x->replay_esn->replay_window != 32 &&
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x->replay_esn->replay_window != 64 &&
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x->replay_esn->replay_window != 128 &&
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x->replay_esn->replay_window != 256) {
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@ -254,11 +254,13 @@ static int arfs_create_groups(struct mlx5e_flow_table *ft,
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ft->g = kcalloc(MLX5E_ARFS_NUM_GROUPS,
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sizeof(*ft->g), GFP_KERNEL);
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in = kvzalloc(inlen, GFP_KERNEL);
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if (!in || !ft->g) {
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kfree(ft->g);
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kvfree(in);
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if (!ft->g)
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return -ENOMEM;
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in = kvzalloc(inlen, GFP_KERNEL);
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if (!in) {
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err = -ENOMEM;
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goto err_free_g;
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}
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mc = MLX5_ADDR_OF(create_flow_group_in, in, match_criteria);
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@ -278,7 +280,7 @@ static int arfs_create_groups(struct mlx5e_flow_table *ft,
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break;
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default:
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err = -EINVAL;
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goto out;
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goto err_free_in;
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}
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switch (type) {
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@ -300,7 +302,7 @@ static int arfs_create_groups(struct mlx5e_flow_table *ft,
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break;
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default:
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err = -EINVAL;
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goto out;
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goto err_free_in;
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}
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MLX5_SET_CFG(in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);
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@ -309,7 +311,7 @@ static int arfs_create_groups(struct mlx5e_flow_table *ft,
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MLX5_SET_CFG(in, end_flow_index, ix - 1);
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ft->g[ft->num_groups] = mlx5_create_flow_group(ft->t, in);
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if (IS_ERR(ft->g[ft->num_groups]))
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goto err;
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goto err_clean_group;
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ft->num_groups++;
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memset(in, 0, inlen);
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@ -318,18 +320,20 @@ static int arfs_create_groups(struct mlx5e_flow_table *ft,
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MLX5_SET_CFG(in, end_flow_index, ix - 1);
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ft->g[ft->num_groups] = mlx5_create_flow_group(ft->t, in);
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if (IS_ERR(ft->g[ft->num_groups]))
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goto err;
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goto err_clean_group;
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ft->num_groups++;
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kvfree(in);
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return 0;
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err:
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err_clean_group:
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err = PTR_ERR(ft->g[ft->num_groups]);
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ft->g[ft->num_groups] = NULL;
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out:
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err_free_in:
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kvfree(in);
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err_free_g:
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kfree(ft->g);
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ft->g = NULL;
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return err;
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}
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@ -95,7 +95,7 @@ static void mlx5e_destroy_tises(struct mlx5_core_dev *mdev, u32 tisn[MLX5_MAX_PO
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{
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int tc, i;
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for (i = 0; i < MLX5_MAX_PORTS; i++)
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for (i = 0; i < mlx5e_get_num_lag_ports(mdev); i++)
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for (tc = 0; tc < MLX5_MAX_NUM_TC; tc++)
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mlx5e_destroy_tis(mdev, tisn[i][tc]);
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}
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@ -110,7 +110,7 @@ static int mlx5e_create_tises(struct mlx5_core_dev *mdev, u32 tisn[MLX5_MAX_PORT
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int tc, i;
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int err;
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for (i = 0; i < MLX5_MAX_PORTS; i++) {
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for (i = 0; i < mlx5e_get_num_lag_ports(mdev); i++) {
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for (tc = 0; tc < MLX5_MAX_NUM_TC; tc++) {
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u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {};
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void *tisc;
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@ -140,7 +140,7 @@ static int mlx5e_create_tises(struct mlx5_core_dev *mdev, u32 tisn[MLX5_MAX_PORT
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return err;
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}
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int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev)
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int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev, bool create_tises)
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{
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struct mlx5e_hw_objs *res = &mdev->mlx5e_res.hw_objs;
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int err;
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@ -169,11 +169,15 @@ int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev)
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goto err_destroy_mkey;
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}
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err = mlx5e_create_tises(mdev, res->tisn);
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if (err) {
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mlx5_core_err(mdev, "alloc tises failed, %d\n", err);
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goto err_destroy_bfreg;
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if (create_tises) {
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err = mlx5e_create_tises(mdev, res->tisn);
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if (err) {
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mlx5_core_err(mdev, "alloc tises failed, %d\n", err);
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goto err_destroy_bfreg;
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}
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res->tisn_valid = true;
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}
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INIT_LIST_HEAD(&res->td.tirs_list);
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mutex_init(&res->td.list_lock);
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@ -203,7 +207,8 @@ void mlx5e_destroy_mdev_resources(struct mlx5_core_dev *mdev)
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mlx5_crypto_dek_cleanup(mdev->mlx5e_res.dek_priv);
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mdev->mlx5e_res.dek_priv = NULL;
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mlx5e_destroy_tises(mdev, res->tisn);
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if (res->tisn_valid)
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mlx5e_destroy_tises(mdev, res->tisn);
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mlx5_free_bfreg(mdev, &res->bfreg);
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mlx5_core_destroy_mkey(mdev, res->mkey);
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mlx5_core_dealloc_transport_domain(mdev, res->td.tdn);
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|
|
|
@ -5992,7 +5992,7 @@ static int mlx5e_resume(struct auxiliary_device *adev)
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if (netif_device_present(netdev))
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return 0;
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err = mlx5e_create_mdev_resources(mdev);
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err = mlx5e_create_mdev_resources(mdev, true);
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if (err)
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return err;
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|
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|
|
|
@ -761,7 +761,7 @@ static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
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|
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err = mlx5e_rss_params_indir_init(&indir, mdev,
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mlx5e_rqt_size(mdev, hp->num_channels),
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mlx5e_rqt_size(mdev, priv->max_nch));
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mlx5e_rqt_size(mdev, hp->num_channels));
|
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if (err)
|
||||
return err;
|
||||
|
||||
|
@ -2014,9 +2014,10 @@ static void mlx5e_tc_del_fdb_peer_flow(struct mlx5e_tc_flow *flow,
|
|||
list_for_each_entry_safe(peer_flow, tmp, &flow->peer_flows, peer_flows) {
|
||||
if (peer_index != mlx5_get_dev_index(peer_flow->priv->mdev))
|
||||
continue;
|
||||
|
||||
list_del(&peer_flow->peer_flows);
|
||||
if (refcount_dec_and_test(&peer_flow->refcnt)) {
|
||||
mlx5e_tc_del_fdb_flow(peer_flow->priv, peer_flow);
|
||||
list_del(&peer_flow->peer_flows);
|
||||
kfree(peer_flow);
|
||||
}
|
||||
}
|
||||
|
|
|
@ -83,6 +83,7 @@ mlx5_esw_bridge_mdb_flow_create(u16 esw_owner_vhca_id, struct mlx5_esw_bridge_md
|
|||
i++;
|
||||
}
|
||||
|
||||
rule_spec->flow_context.flags |= FLOW_CONTEXT_UPLINK_HAIRPIN_EN;
|
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rule_spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
|
||||
dmac_v = MLX5_ADDR_OF(fte_match_param, rule_spec->match_value, outer_headers.dmac_47_16);
|
||||
ether_addr_copy(dmac_v, entry->key.addr);
|
||||
|
@ -587,6 +588,7 @@ mlx5_esw_bridge_mcast_vlan_flow_create(u16 vlan_proto, struct mlx5_esw_bridge_po
|
|||
if (!rule_spec)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
rule_spec->flow_context.flags |= FLOW_CONTEXT_UPLINK_HAIRPIN_EN;
|
||||
rule_spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
|
||||
|
||||
flow_act.action |= MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT;
|
||||
|
@ -662,6 +664,7 @@ mlx5_esw_bridge_mcast_fwd_flow_create(struct mlx5_esw_bridge_port *port)
|
|||
dest.vport.flags = MLX5_FLOW_DEST_VPORT_VHCA_ID;
|
||||
dest.vport.vhca_id = port->esw_owner_vhca_id;
|
||||
}
|
||||
rule_spec->flow_context.flags |= FLOW_CONTEXT_UPLINK_HAIRPIN_EN;
|
||||
handle = mlx5_add_flow_rules(port->mcast.ft, rule_spec, &flow_act, &dest, 1);
|
||||
|
||||
kvfree(rule_spec);
|
||||
|
|
|
@ -566,6 +566,8 @@ static int mlx5_cmd_set_fte(struct mlx5_core_dev *dev,
|
|||
fte->flow_context.flow_tag);
|
||||
MLX5_SET(flow_context, in_flow_context, flow_source,
|
||||
fte->flow_context.flow_source);
|
||||
MLX5_SET(flow_context, in_flow_context, uplink_hairpin_en,
|
||||
!!(fte->flow_context.flags & FLOW_CONTEXT_UPLINK_HAIRPIN_EN));
|
||||
|
||||
MLX5_SET(flow_context, in_flow_context, extended_destination,
|
||||
extended_dest);
|
||||
|
|
|
@ -783,7 +783,7 @@ static int mlx5_rdma_setup_rn(struct ib_device *ibdev, u32 port_num,
|
|||
}
|
||||
|
||||
/* This should only be called once per mdev */
|
||||
err = mlx5e_create_mdev_resources(mdev);
|
||||
err = mlx5e_create_mdev_resources(mdev, false);
|
||||
if (err)
|
||||
goto destroy_ht;
|
||||
}
|
||||
|
|
|
@ -98,7 +98,7 @@ static int create_aso_cq(struct mlx5_aso_cq *cq, void *cqc_data)
|
|||
mlx5_fill_page_frag_array(&cq->wq_ctrl.buf,
|
||||
(__be64 *)MLX5_ADDR_OF(create_cq_in, in, pas));
|
||||
|
||||
MLX5_SET(cqc, cqc, cq_period_mode, DIM_CQ_PERIOD_MODE_START_FROM_EQE);
|
||||
MLX5_SET(cqc, cqc, cq_period_mode, MLX5_CQ_PERIOD_MODE_START_FROM_EQE);
|
||||
MLX5_SET(cqc, cqc, c_eqn_or_apu_element, eqn);
|
||||
MLX5_SET(cqc, cqc, uar_page, mdev->priv.uar->index);
|
||||
MLX5_SET(cqc, cqc, log_page_size, cq->wq_ctrl.buf.page_shift -
|
||||
|
|
|
@ -788,6 +788,7 @@ int mlx5dr_actions_build_ste_arr(struct mlx5dr_matcher *matcher,
|
|||
switch (action_type) {
|
||||
case DR_ACTION_TYP_DROP:
|
||||
attr.final_icm_addr = nic_dmn->drop_icm_addr;
|
||||
attr.hit_gvmi = nic_dmn->drop_icm_addr >> 48;
|
||||
break;
|
||||
case DR_ACTION_TYP_FT:
|
||||
dest_action = action;
|
||||
|
@ -873,11 +874,17 @@ int mlx5dr_actions_build_ste_arr(struct mlx5dr_matcher *matcher,
|
|||
action->sampler->tx_icm_addr;
|
||||
break;
|
||||
case DR_ACTION_TYP_VPORT:
|
||||
attr.hit_gvmi = action->vport->caps->vhca_gvmi;
|
||||
dest_action = action;
|
||||
attr.final_icm_addr = rx_rule ?
|
||||
action->vport->caps->icm_address_rx :
|
||||
action->vport->caps->icm_address_tx;
|
||||
if (unlikely(rx_rule && action->vport->caps->num == MLX5_VPORT_UPLINK)) {
|
||||
/* can't go to uplink on RX rule - dropping instead */
|
||||
attr.final_icm_addr = nic_dmn->drop_icm_addr;
|
||||
attr.hit_gvmi = nic_dmn->drop_icm_addr >> 48;
|
||||
} else {
|
||||
attr.hit_gvmi = action->vport->caps->vhca_gvmi;
|
||||
dest_action = action;
|
||||
attr.final_icm_addr = rx_rule ?
|
||||
action->vport->caps->icm_address_rx :
|
||||
action->vport->caps->icm_address_tx;
|
||||
}
|
||||
break;
|
||||
case DR_ACTION_TYP_POP_VLAN:
|
||||
if (!rx_rule && !(dmn->ste_ctx->actions_caps &
|
||||
|
|
|
@ -440,6 +440,27 @@ int mlx5_query_nic_vport_system_image_guid(struct mlx5_core_dev *mdev,
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_system_image_guid);
|
||||
|
||||
int mlx5_query_nic_vport_sd_group(struct mlx5_core_dev *mdev, u8 *sd_group)
|
||||
{
|
||||
int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
|
||||
u32 *out;
|
||||
int err;
|
||||
|
||||
out = kvzalloc(outlen, GFP_KERNEL);
|
||||
if (!out)
|
||||
return -ENOMEM;
|
||||
|
||||
err = mlx5_query_nic_vport_context(mdev, 0, out);
|
||||
if (err)
|
||||
goto out;
|
||||
|
||||
*sd_group = MLX5_GET(query_nic_vport_context_out, out,
|
||||
nic_vport_context.sd_group);
|
||||
out:
|
||||
kvfree(out);
|
||||
return err;
|
||||
}
|
||||
|
||||
int mlx5_query_nic_vport_node_guid(struct mlx5_core_dev *mdev, u64 *node_guid)
|
||||
{
|
||||
u32 *out;
|
||||
|
|
|
@ -681,6 +681,7 @@ struct mlx5e_resources {
|
|||
struct mlx5_sq_bfreg bfreg;
|
||||
#define MLX5_MAX_NUM_TC 8
|
||||
u32 tisn[MLX5_MAX_PORTS][MLX5_MAX_NUM_TC];
|
||||
bool tisn_valid;
|
||||
} hw_objs;
|
||||
struct net_device *uplink_netdev;
|
||||
struct mutex uplink_netdev_lock;
|
||||
|
|
|
@ -132,6 +132,7 @@ struct mlx5_flow_handle;
|
|||
|
||||
enum {
|
||||
FLOW_CONTEXT_HAS_TAG = BIT(0),
|
||||
FLOW_CONTEXT_UPLINK_HAIRPIN_EN = BIT(1),
|
||||
};
|
||||
|
||||
struct mlx5_flow_context {
|
||||
|
|
|
@ -3576,7 +3576,7 @@ struct mlx5_ifc_flow_context_bits {
|
|||
u8 action[0x10];
|
||||
|
||||
u8 extended_destination[0x1];
|
||||
u8 reserved_at_81[0x1];
|
||||
u8 uplink_hairpin_en[0x1];
|
||||
u8 flow_source[0x2];
|
||||
u8 encrypt_decrypt_type[0x4];
|
||||
u8 destination_list_size[0x18];
|
||||
|
@ -4036,8 +4036,13 @@ struct mlx5_ifc_nic_vport_context_bits {
|
|||
u8 affiliation_criteria[0x4];
|
||||
u8 affiliated_vhca_id[0x10];
|
||||
|
||||
u8 reserved_at_60[0xd0];
|
||||
u8 reserved_at_60[0xa0];
|
||||
|
||||
u8 reserved_at_100[0x1];
|
||||
u8 sd_group[0x3];
|
||||
u8 reserved_at_104[0x1c];
|
||||
|
||||
u8 reserved_at_120[0x10];
|
||||
u8 mtu[0x10];
|
||||
|
||||
u8 system_image_guid[0x40];
|
||||
|
@ -10122,8 +10127,7 @@ struct mlx5_ifc_mpir_reg_bits {
|
|||
u8 reserved_at_20[0x20];
|
||||
|
||||
u8 local_port[0x8];
|
||||
u8 reserved_at_28[0x15];
|
||||
u8 sd_group[0x3];
|
||||
u8 reserved_at_28[0x18];
|
||||
|
||||
u8 reserved_at_60[0x20];
|
||||
};
|
||||
|
|
|
@ -72,6 +72,7 @@ int mlx5_query_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 *mtu);
|
|||
int mlx5_modify_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 mtu);
|
||||
int mlx5_query_nic_vport_system_image_guid(struct mlx5_core_dev *mdev,
|
||||
u64 *system_image_guid);
|
||||
int mlx5_query_nic_vport_sd_group(struct mlx5_core_dev *mdev, u8 *sd_group);
|
||||
int mlx5_query_nic_vport_node_guid(struct mlx5_core_dev *mdev, u64 *node_guid);
|
||||
int mlx5_modify_nic_vport_node_guid(struct mlx5_core_dev *mdev,
|
||||
u16 vport, u64 node_guid);
|
||||
|
|
Loading…
Reference in a new issue