mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-27 22:51:31 +00:00
KVM: ia64: Add some debug points to provide crash infomation
Use printk infrastructure to print out some debug info once VM crashes. Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com> Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
parent
7d63797815
commit
5e2be19832
5 changed files with 87 additions and 32 deletions
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@ -66,31 +66,25 @@ void lsapic_write(struct kvm_vcpu *v, unsigned long addr,
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switch (addr) {
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switch (addr) {
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case PIB_OFST_INTA:
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case PIB_OFST_INTA:
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/*panic_domain(NULL, "Undefined write on PIB INTA\n");*/
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panic_vm(v, "Undefined write on PIB INTA\n");
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panic_vm(v);
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break;
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break;
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case PIB_OFST_XTP:
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case PIB_OFST_XTP:
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if (length == 1) {
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if (length == 1) {
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vlsapic_write_xtp(v, val);
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vlsapic_write_xtp(v, val);
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} else {
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} else {
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/*panic_domain(NULL,
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panic_vm(v, "Undefined write on PIB XTP\n");
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"Undefined write on PIB XTP\n");*/
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panic_vm(v);
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}
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}
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break;
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break;
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default:
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default:
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if (PIB_LOW_HALF(addr)) {
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if (PIB_LOW_HALF(addr)) {
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/*lower half */
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/*Lower half */
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if (length != 8)
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if (length != 8)
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/*panic_domain(NULL,
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panic_vm(v, "Can't LHF write with size %ld!\n",
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"Can't LHF write with size %ld!\n",
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length);
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length);*/
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panic_vm(v);
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else
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else
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vlsapic_write_ipi(v, addr, val);
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vlsapic_write_ipi(v, addr, val);
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} else { /* upper half
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} else { /*Upper half */
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printk("IPI-UHF write %lx\n",addr);*/
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panic_vm(v, "IPI-UHF write %lx\n", addr);
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panic_vm(v);
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}
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}
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break;
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break;
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}
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}
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@ -108,22 +102,18 @@ unsigned long lsapic_read(struct kvm_vcpu *v, unsigned long addr,
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if (length == 1) /* 1 byte load */
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if (length == 1) /* 1 byte load */
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; /* There is no i8259, there is no INTA access*/
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; /* There is no i8259, there is no INTA access*/
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else
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else
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/*panic_domain(NULL,"Undefined read on PIB INTA\n"); */
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panic_vm(v, "Undefined read on PIB INTA\n");
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panic_vm(v);
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break;
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break;
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case PIB_OFST_XTP:
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case PIB_OFST_XTP:
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if (length == 1) {
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if (length == 1) {
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result = VLSAPIC_XTP(v);
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result = VLSAPIC_XTP(v);
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/* printk("read xtp %lx\n", result); */
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} else {
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} else {
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/*panic_domain(NULL,
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panic_vm(v, "Undefined read on PIB XTP\n");
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"Undefined read on PIB XTP\n");*/
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panic_vm(v);
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}
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}
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break;
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break;
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default:
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default:
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panic_vm(v);
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panic_vm(v, "Undefined addr access for lsapic!\n");
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break;
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break;
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}
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}
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return result;
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return result;
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@ -162,7 +152,7 @@ static void mmio_access(struct kvm_vcpu *vcpu, u64 src_pa, u64 *dest,
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/* it's necessary to ensure zero extending */
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/* it's necessary to ensure zero extending */
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*dest = p->u.ioreq.data & (~0UL >> (64-(s*8)));
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*dest = p->u.ioreq.data & (~0UL >> (64-(s*8)));
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} else
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} else
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panic_vm(vcpu);
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panic_vm(vcpu, "Unhandled mmio access returned!\n");
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out:
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out:
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local_irq_restore(psr);
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local_irq_restore(psr);
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return ;
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return ;
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@ -324,7 +314,9 @@ void emulate_io_inst(struct kvm_vcpu *vcpu, u64 padr, u64 ma)
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return;
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return;
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} else {
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} else {
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inst_type = -1;
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inst_type = -1;
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panic_vm(vcpu);
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panic_vm(vcpu, "Unsupported MMIO access instruction! \
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Bunld[0]=0x%lx, Bundle[1]=0x%lx\n",
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bundle.i64[0], bundle.i64[1]);
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}
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}
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size = 1 << size;
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size = 1 << size;
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@ -335,7 +327,7 @@ void emulate_io_inst(struct kvm_vcpu *vcpu, u64 padr, u64 ma)
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if (inst_type == SL_INTEGER)
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if (inst_type == SL_INTEGER)
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vcpu_set_gr(vcpu, inst.M1.r1, data, 0);
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vcpu_set_gr(vcpu, inst.M1.r1, data, 0);
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else
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else
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panic_vm(vcpu);
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panic_vm(vcpu, "Unsupported instruction type!\n");
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}
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}
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vcpu_increment_iip(vcpu);
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vcpu_increment_iip(vcpu);
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@ -527,7 +527,8 @@ void reflect_interruption(u64 ifa, u64 isr, u64 iim,
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vector = vec2off[vec];
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vector = vec2off[vec];
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if (!(vpsr & IA64_PSR_IC) && (vector != IA64_DATA_NESTED_TLB_VECTOR)) {
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if (!(vpsr & IA64_PSR_IC) && (vector != IA64_DATA_NESTED_TLB_VECTOR)) {
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panic_vm(vcpu);
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panic_vm(vcpu, "Interruption with vector :0x%lx occurs "
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"with psr.ic = 0\n", vector);
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return;
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return;
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}
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}
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@ -586,7 +587,7 @@ static void set_pal_call_result(struct kvm_vcpu *vcpu)
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vcpu_set_gr(vcpu, 10, p->u.pal_data.ret.v1, 0);
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vcpu_set_gr(vcpu, 10, p->u.pal_data.ret.v1, 0);
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vcpu_set_gr(vcpu, 11, p->u.pal_data.ret.v2, 0);
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vcpu_set_gr(vcpu, 11, p->u.pal_data.ret.v2, 0);
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} else
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} else
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panic_vm(vcpu);
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panic_vm(vcpu, "Mis-set for exit reason!\n");
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}
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}
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static void set_sal_call_data(struct kvm_vcpu *vcpu)
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static void set_sal_call_data(struct kvm_vcpu *vcpu)
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@ -614,7 +615,7 @@ static void set_sal_call_result(struct kvm_vcpu *vcpu)
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vcpu_set_gr(vcpu, 10, p->u.sal_data.ret.r10, 0);
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vcpu_set_gr(vcpu, 10, p->u.sal_data.ret.r10, 0);
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vcpu_set_gr(vcpu, 11, p->u.sal_data.ret.r11, 0);
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vcpu_set_gr(vcpu, 11, p->u.sal_data.ret.r11, 0);
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} else
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} else
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panic_vm(vcpu);
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panic_vm(vcpu, "Mis-set for exit reason!\n");
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}
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}
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void kvm_ia64_handle_break(unsigned long ifa, struct kvm_pt_regs *regs,
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void kvm_ia64_handle_break(unsigned long ifa, struct kvm_pt_regs *regs,
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@ -680,7 +681,7 @@ static void generate_exirq(struct kvm_vcpu *vcpu)
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vpsr = VCPU(vcpu, vpsr);
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vpsr = VCPU(vcpu, vpsr);
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isr = vpsr & IA64_PSR_RI;
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isr = vpsr & IA64_PSR_RI;
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if (!(vpsr & IA64_PSR_IC))
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if (!(vpsr & IA64_PSR_IC))
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panic_vm(vcpu);
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panic_vm(vcpu, "Trying to inject one IRQ with psr.ic=0\n");
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reflect_interruption(0, isr, 0, 12, regs); /* EXT IRQ */
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reflect_interruption(0, isr, 0, 12, regs); /* EXT IRQ */
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}
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}
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@ -1651,7 +1651,8 @@ void vcpu_set_psr(struct kvm_vcpu *vcpu, unsigned long val)
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* Otherwise panic
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* Otherwise panic
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*/
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*/
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if (val & (IA64_PSR_PK | IA64_PSR_IS | IA64_PSR_VM))
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if (val & (IA64_PSR_PK | IA64_PSR_IS | IA64_PSR_VM))
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panic_vm(vcpu);
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panic_vm(vcpu, "Only support guests with vpsr.pk =0 \
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& vpsr.is=0\n");
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/*
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/*
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* For those IA64_PSR bits: id/da/dd/ss/ed/ia
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* For those IA64_PSR bits: id/da/dd/ss/ed/ia
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@ -2104,7 +2105,7 @@ void kvm_init_all_rr(struct kvm_vcpu *vcpu)
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if (is_physical_mode(vcpu)) {
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if (is_physical_mode(vcpu)) {
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if (vcpu->arch.mode_flags & GUEST_PHY_EMUL)
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if (vcpu->arch.mode_flags & GUEST_PHY_EMUL)
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panic_vm(vcpu);
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panic_vm(vcpu, "Machine Status conflicts!\n");
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ia64_set_rr((VRN0 << VRN_SHIFT), vcpu->arch.metaphysical_rr0);
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ia64_set_rr((VRN0 << VRN_SHIFT), vcpu->arch.metaphysical_rr0);
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ia64_dv_serialize_data();
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ia64_dv_serialize_data();
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@ -2153,10 +2154,70 @@ int vmm_entry(void)
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return 0;
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return 0;
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}
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}
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void panic_vm(struct kvm_vcpu *v)
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static void kvm_show_registers(struct kvm_pt_regs *regs)
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{
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{
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struct exit_ctl_data *p = &v->arch.exit_data;
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unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri;
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struct kvm_vcpu *vcpu = current_vcpu;
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if (vcpu != NULL)
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printk("vcpu 0x%p vcpu %d\n",
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vcpu, vcpu->vcpu_id);
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printk("psr : %016lx ifs : %016lx ip : [<%016lx>]\n",
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regs->cr_ipsr, regs->cr_ifs, ip);
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printk("unat: %016lx pfs : %016lx rsc : %016lx\n",
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regs->ar_unat, regs->ar_pfs, regs->ar_rsc);
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printk("rnat: %016lx bspstore: %016lx pr : %016lx\n",
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regs->ar_rnat, regs->ar_bspstore, regs->pr);
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printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n",
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regs->loadrs, regs->ar_ccv, regs->ar_fpsr);
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printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd);
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printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0,
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regs->b6, regs->b7);
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printk("f6 : %05lx%016lx f7 : %05lx%016lx\n",
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regs->f6.u.bits[1], regs->f6.u.bits[0],
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regs->f7.u.bits[1], regs->f7.u.bits[0]);
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printk("f8 : %05lx%016lx f9 : %05lx%016lx\n",
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regs->f8.u.bits[1], regs->f8.u.bits[0],
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regs->f9.u.bits[1], regs->f9.u.bits[0]);
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printk("f10 : %05lx%016lx f11 : %05lx%016lx\n",
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regs->f10.u.bits[1], regs->f10.u.bits[0],
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regs->f11.u.bits[1], regs->f11.u.bits[0]);
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printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1,
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regs->r2, regs->r3);
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printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8,
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regs->r9, regs->r10);
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printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11,
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regs->r12, regs->r13);
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printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14,
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regs->r15, regs->r16);
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printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17,
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regs->r18, regs->r19);
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printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20,
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regs->r21, regs->r22);
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printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23,
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regs->r24, regs->r25);
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printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26,
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regs->r27, regs->r28);
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printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29,
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regs->r30, regs->r31);
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}
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void panic_vm(struct kvm_vcpu *v, const char *fmt, ...)
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{
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va_list args;
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char buf[256];
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struct kvm_pt_regs *regs = vcpu_regs(v);
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struct exit_ctl_data *p = &v->arch.exit_data;
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va_start(args, fmt);
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vsnprintf(buf, sizeof(buf), fmt, args);
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va_end(args);
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printk(buf);
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kvm_show_registers(regs);
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p->exit_reason = EXIT_REASON_VM_PANIC;
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p->exit_reason = EXIT_REASON_VM_PANIC;
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vmm_transition(v);
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vmm_transition(v);
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/*Never to return*/
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/*Never to return*/
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@ -737,7 +737,7 @@ void kvm_init_vtlb(struct kvm_vcpu *v);
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void kvm_init_vhpt(struct kvm_vcpu *v);
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void kvm_init_vhpt(struct kvm_vcpu *v);
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void thash_init(struct thash_cb *hcb, u64 sz);
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void thash_init(struct thash_cb *hcb, u64 sz);
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void panic_vm(struct kvm_vcpu *v);
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void panic_vm(struct kvm_vcpu *v, const char *fmt, ...);
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extern u64 ia64_call_vsa(u64 proc, u64 arg1, u64 arg2, u64 arg3,
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extern u64 ia64_call_vsa(u64 proc, u64 arg1, u64 arg2, u64 arg3,
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u64 arg4, u64 arg5, u64 arg6, u64 arg7);
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u64 arg4, u64 arg5, u64 arg6, u64 arg7);
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@ -20,6 +20,7 @@
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*/
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*/
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#include<linux/kernel.h>
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#include<linux/module.h>
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#include<linux/module.h>
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#include<asm/fpswa.h>
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#include<asm/fpswa.h>
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