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KVM: VMX: Fix the spelling of CPU_BASED_USE_TSC_OFFSETTING
The mis-spelling is found by checkpatch.pl, so fix them. Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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parent
4e2a0bc56a
commit
5e3d394fdd
5 changed files with 10 additions and 10 deletions
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@ -20,7 +20,7 @@
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* Definitions of Primary Processor-Based VM-Execution Controls.
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*/
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#define CPU_BASED_INTR_WINDOW_EXITING 0x00000004
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#define CPU_BASED_USE_TSC_OFFSETING 0x00000008
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#define CPU_BASED_USE_TSC_OFFSETTING 0x00000008
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#define CPU_BASED_HLT_EXITING 0x00000080
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#define CPU_BASED_INVLPG_EXITING 0x00000200
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#define CPU_BASED_MWAIT_EXITING 0x00000400
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@ -3230,7 +3230,7 @@ enum nvmx_vmentry_status nested_vmx_enter_non_root_mode(struct kvm_vcpu *vcpu,
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}
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enter_guest_mode(vcpu);
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if (vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETING)
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if (vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETTING)
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vcpu->arch.tsc_offset += vmcs12->tsc_offset;
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if (prepare_vmcs02(vcpu, vmcs12, &exit_qual))
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@ -3294,7 +3294,7 @@ enum nvmx_vmentry_status nested_vmx_enter_non_root_mode(struct kvm_vcpu *vcpu,
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* 26.7 "VM-entry failures during or after loading guest state".
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*/
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vmentry_fail_vmexit_guest_mode:
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if (vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETING)
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if (vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETTING)
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vcpu->arch.tsc_offset -= vmcs12->tsc_offset;
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leave_guest_mode(vcpu);
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@ -4209,7 +4209,7 @@ void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 exit_reason,
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if (nested_cpu_has_preemption_timer(vmcs12))
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hrtimer_cancel(&to_vmx(vcpu)->nested.preemption_timer);
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if (vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETING)
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if (vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETTING)
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vcpu->arch.tsc_offset -= vmcs12->tsc_offset;
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if (likely(!vmx->fail)) {
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@ -6016,7 +6016,7 @@ void nested_vmx_setup_ctls_msrs(struct nested_vmx_msrs *msrs, u32 ept_caps,
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CPU_BASED_ALWAYSON_WITHOUT_TRUE_MSR;
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msrs->procbased_ctls_high &=
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CPU_BASED_INTR_WINDOW_EXITING |
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CPU_BASED_NMI_WINDOW_EXITING | CPU_BASED_USE_TSC_OFFSETING |
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CPU_BASED_NMI_WINDOW_EXITING | CPU_BASED_USE_TSC_OFFSETTING |
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CPU_BASED_HLT_EXITING | CPU_BASED_INVLPG_EXITING |
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CPU_BASED_MWAIT_EXITING | CPU_BASED_CR3_LOAD_EXITING |
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CPU_BASED_CR3_STORE_EXITING |
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@ -1716,7 +1716,7 @@ static u64 vmx_read_l1_tsc_offset(struct kvm_vcpu *vcpu)
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struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
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if (is_guest_mode(vcpu) &&
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(vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETING))
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(vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETTING))
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return vcpu->arch.tsc_offset - vmcs12->tsc_offset;
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return vcpu->arch.tsc_offset;
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@ -1734,7 +1734,7 @@ static u64 vmx_write_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
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* to the newly set TSC to get L2's TSC.
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*/
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if (is_guest_mode(vcpu) &&
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(vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETING))
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(vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETTING))
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g_tsc_offset = vmcs12->tsc_offset;
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trace_kvm_write_tsc_offset(vcpu->vcpu_id,
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@ -2353,7 +2353,7 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf,
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CPU_BASED_CR3_STORE_EXITING |
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CPU_BASED_UNCOND_IO_EXITING |
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CPU_BASED_MOV_DR_EXITING |
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CPU_BASED_USE_TSC_OFFSETING |
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CPU_BASED_USE_TSC_OFFSETTING |
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CPU_BASED_MWAIT_EXITING |
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CPU_BASED_MONITOR_EXITING |
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CPU_BASED_INVLPG_EXITING |
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@ -19,7 +19,7 @@
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* Definitions of Primary Processor-Based VM-Execution Controls.
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*/
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#define CPU_BASED_INTR_WINDOW_EXITING 0x00000004
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#define CPU_BASED_USE_TSC_OFFSETING 0x00000008
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#define CPU_BASED_USE_TSC_OFFSETTING 0x00000008
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#define CPU_BASED_HLT_EXITING 0x00000080
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#define CPU_BASED_INVLPG_EXITING 0x00000200
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#define CPU_BASED_MWAIT_EXITING 0x00000400
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@ -98,7 +98,7 @@ static void l1_guest_code(struct vmx_pages *vmx_pages)
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prepare_vmcs(vmx_pages, l2_guest_code,
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&l2_guest_stack[L2_GUEST_STACK_SIZE]);
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control = vmreadz(CPU_BASED_VM_EXEC_CONTROL);
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control |= CPU_BASED_USE_MSR_BITMAPS | CPU_BASED_USE_TSC_OFFSETING;
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control |= CPU_BASED_USE_MSR_BITMAPS | CPU_BASED_USE_TSC_OFFSETTING;
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vmwrite(CPU_BASED_VM_EXEC_CONTROL, control);
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vmwrite(TSC_OFFSET, TSC_OFFSET_VALUE);
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