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KVM: ARM: fix the size of TTBCR_{T0SZ,T1SZ} masks
The T{0,1}SZ fields of TTBCR are 3 bits wide when using the long descriptor format. Likewise, the T0SZ field of the HTCR is 3-bits. KVM currently defines TTBCR_T{0,1}SZ as 3, not 7. The T0SZ mask is used to calculate the value for the HTCR, both to pick out TTBCR.T0SZ and mask off the equivalent field in the HTCR during read-modify-write. The incorrect mask size causes the (UNKNOWN) reset value of HTCR.T0SZ to leak in to the calculated HTCR value. Linux will hang when initializing KVM if HTCR's reset value has bit 2 set (sometimes the case on A7/TC2) Fixing T0SZ allows A7 cores to boot and T1SZ is also fixed for completeness. Signed-off-by: Jonathan Austin <jonathan.austin@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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1 changed files with 2 additions and 2 deletions
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@ -95,12 +95,12 @@
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#define TTBCR_IRGN1 (3 << 24)
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#define TTBCR_EPD1 (1 << 23)
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#define TTBCR_A1 (1 << 22)
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#define TTBCR_T1SZ (3 << 16)
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#define TTBCR_T1SZ (7 << 16)
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#define TTBCR_SH0 (3 << 12)
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#define TTBCR_ORGN0 (3 << 10)
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#define TTBCR_IRGN0 (3 << 8)
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#define TTBCR_EPD0 (1 << 7)
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#define TTBCR_T0SZ 3
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#define TTBCR_T0SZ (7 << 0)
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#define HTCR_MASK (TTBCR_T0SZ | TTBCR_IRGN0 | TTBCR_ORGN0 | TTBCR_SH0)
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/* Hyp System Trap Register */
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