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iommu/vt-d: Enforce PASID devTLB field mask
Set proper masks to avoid invalid input spillover to reserved bits. Signed-off-by: Liu Yi L <yi.l.liu@intel.com> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Link: https://lore.kernel.org/r/20200724014925.15523-2-baolu.lu@linux.intel.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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1 changed files with 2 additions and 2 deletions
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@ -381,8 +381,8 @@ enum {
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#define QI_DEV_EIOTLB_ADDR(a) ((u64)(a) & VTD_PAGE_MASK)
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#define QI_DEV_EIOTLB_ADDR(a) ((u64)(a) & VTD_PAGE_MASK)
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#define QI_DEV_EIOTLB_SIZE (((u64)1) << 11)
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#define QI_DEV_EIOTLB_SIZE (((u64)1) << 11)
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#define QI_DEV_EIOTLB_GLOB(g) ((u64)g)
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#define QI_DEV_EIOTLB_GLOB(g) ((u64)(g) & 0x1)
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#define QI_DEV_EIOTLB_PASID(p) (((u64)p) << 32)
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#define QI_DEV_EIOTLB_PASID(p) ((u64)((p) & 0xfffff) << 32)
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#define QI_DEV_EIOTLB_SID(sid) ((u64)((sid) & 0xffff) << 16)
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#define QI_DEV_EIOTLB_SID(sid) ((u64)((sid) & 0xffff) << 16)
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#define QI_DEV_EIOTLB_QDEP(qd) ((u64)((qd) & 0x1f) << 4)
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#define QI_DEV_EIOTLB_QDEP(qd) ((u64)((qd) & 0x1f) << 4)
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#define QI_DEV_EIOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) | \
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#define QI_DEV_EIOTLB_PFSID(pfsid) (((u64)(pfsid & 0xf) << 12) | \
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