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mmc: sdhci-esdhc-imx: correct pre_div for imx6q
According to spec, the pre_div for imx6q should be 1, or the biggest clock rate we can get is a half of host clock rate. This may cause we can not get the proper clock rate as we want. e.g. if the desired clock is 200Mhz, however, the host clock is 200Mhz too, then it causes the actual clock we get is 100Mhz due to pre_div is 2. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
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@ -510,6 +510,9 @@ static inline void esdhc_pltfm_set_clock(struct sdhci_host *host,
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goto out;
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}
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if (is_imx6q_usdhc(imx_data))
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pre_div = 1;
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temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL);
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temp &= ~(ESDHC_CLOCK_IPGEN | ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN
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| ESDHC_CLOCK_MASK);
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