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MIPS: Support 64-byte D-cache line size
Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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3807ef3f61
commit
605b7ef7b7
2 changed files with 13 additions and 0 deletions
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@ -399,6 +399,7 @@ __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16)
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__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32)
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__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32)
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__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32)
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__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64)
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__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64)
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__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64)
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__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128)
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@ -100,6 +100,12 @@ static inline void r4k_blast_dcache_page_dc32(unsigned long addr)
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blast_dcache32_page(addr);
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}
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static inline void r4k_blast_dcache_page_dc64(unsigned long addr)
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{
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R4600_HIT_CACHEOP_WAR_IMPL;
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blast_dcache64_page(addr);
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}
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static void __cpuinit r4k_blast_dcache_page_setup(void)
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{
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unsigned long dc_lsize = cpu_dcache_line_size();
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@ -110,6 +116,8 @@ static void __cpuinit r4k_blast_dcache_page_setup(void)
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r4k_blast_dcache_page = blast_dcache16_page;
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else if (dc_lsize == 32)
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r4k_blast_dcache_page = r4k_blast_dcache_page_dc32;
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else if (dc_lsize == 64)
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r4k_blast_dcache_page = r4k_blast_dcache_page_dc64;
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}
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static void (* r4k_blast_dcache_page_indexed)(unsigned long addr);
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@ -124,6 +132,8 @@ static void __cpuinit r4k_blast_dcache_page_indexed_setup(void)
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r4k_blast_dcache_page_indexed = blast_dcache16_page_indexed;
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else if (dc_lsize == 32)
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r4k_blast_dcache_page_indexed = blast_dcache32_page_indexed;
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else if (dc_lsize == 64)
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r4k_blast_dcache_page_indexed = blast_dcache64_page_indexed;
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}
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static void (* r4k_blast_dcache)(void);
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@ -138,6 +148,8 @@ static void __cpuinit r4k_blast_dcache_setup(void)
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r4k_blast_dcache = blast_dcache16;
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else if (dc_lsize == 32)
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r4k_blast_dcache = blast_dcache32;
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else if (dc_lsize == 64)
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r4k_blast_dcache = blast_dcache64;
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}
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/* force code alignment (used for TX49XX_ICACHE_INDEX_INV_WAR) */
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