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tools: lib: perf: Implement riscv mmap support
riscv now supports mmaping hardware counters so add what's needed to take advantage of that in libperf. Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Ian Rogers <irogers@google.com>
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@ -392,6 +392,72 @@ static u64 read_perf_counter(unsigned int counter)
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static u64 read_timestamp(void) { return read_sysreg(cntvct_el0); }
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/* __riscv_xlen contains the witdh of the native base integer, here 64-bit */
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#elif defined(__riscv) && __riscv_xlen == 64
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/* TODO: implement rv32 support */
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#define CSR_CYCLE 0xc00
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#define CSR_TIME 0xc01
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#define csr_read(csr) \
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({ \
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register unsigned long __v; \
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__asm__ __volatile__ ("csrr %0, %1" \
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: "=r" (__v) \
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: "i" (csr) : ); \
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__v; \
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})
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static unsigned long csr_read_num(int csr_num)
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{
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#define switchcase_csr_read(__csr_num, __val) {\
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case __csr_num: \
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__val = csr_read(__csr_num); \
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break; }
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#define switchcase_csr_read_2(__csr_num, __val) {\
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switchcase_csr_read(__csr_num + 0, __val) \
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switchcase_csr_read(__csr_num + 1, __val)}
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#define switchcase_csr_read_4(__csr_num, __val) {\
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switchcase_csr_read_2(__csr_num + 0, __val) \
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switchcase_csr_read_2(__csr_num + 2, __val)}
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#define switchcase_csr_read_8(__csr_num, __val) {\
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switchcase_csr_read_4(__csr_num + 0, __val) \
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switchcase_csr_read_4(__csr_num + 4, __val)}
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#define switchcase_csr_read_16(__csr_num, __val) {\
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switchcase_csr_read_8(__csr_num + 0, __val) \
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switchcase_csr_read_8(__csr_num + 8, __val)}
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#define switchcase_csr_read_32(__csr_num, __val) {\
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switchcase_csr_read_16(__csr_num + 0, __val) \
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switchcase_csr_read_16(__csr_num + 16, __val)}
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unsigned long ret = 0;
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switch (csr_num) {
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switchcase_csr_read_32(CSR_CYCLE, ret)
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default:
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break;
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}
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return ret;
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#undef switchcase_csr_read_32
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#undef switchcase_csr_read_16
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#undef switchcase_csr_read_8
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#undef switchcase_csr_read_4
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#undef switchcase_csr_read_2
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#undef switchcase_csr_read
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}
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static u64 read_perf_counter(unsigned int counter)
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{
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return csr_read_num(CSR_CYCLE + counter);
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}
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static u64 read_timestamp(void)
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{
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return csr_read_num(CSR_TIME);
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}
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#else
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static u64 read_perf_counter(unsigned int counter __maybe_unused) { return 0; }
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static u64 read_timestamp(void) { return 0; }
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