From 60f7bb824133ee3820b94957c89e2321fd5aec3f Mon Sep 17 00:00:00 2001 From: Sasha Neftin Date: Mon, 22 Jun 2020 10:20:30 +0300 Subject: [PATCH] igc: Add Receive Descriptor Minimum Threshold Count to clear HW counters The statistics of this register are being tracked, however, the register was inadvertently missed when implementing igc_clear_hw_cntrs_base(). The register is clear on read, so add it to the function so that the register is cleared when requested so the tracked count is accurate. Signed-off-by: Sasha Neftin Tested-by: Aaron Brown Signed-off-by: Tony Nguyen --- drivers/net/ethernet/intel/igc/igc_mac.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ethernet/intel/igc/igc_mac.c b/drivers/net/ethernet/intel/igc/igc_mac.c index 2d9ca3e1bdde..3a618e69514e 100644 --- a/drivers/net/ethernet/intel/igc/igc_mac.c +++ b/drivers/net/ethernet/intel/igc/igc_mac.c @@ -308,6 +308,7 @@ void igc_clear_hw_cntrs_base(struct igc_hw *hw) rd32(IGC_TLPIC); rd32(IGC_RLPIC); rd32(IGC_HGPTC); + rd32(IGC_RXDMTC); rd32(IGC_HGORCL); rd32(IGC_HGORCH); rd32(IGC_HGOTCL);