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arm: Use the plat_nand default partition parser
Use the default partition parser, cmdlinepart, provided by the plat_nand driver. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Alexander Clouter <alex@digriz.org.uk> Acked-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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f2e5a24480
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60f8291003
11 changed files with 0 additions and 33 deletions
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@ -82,8 +82,6 @@ static int snappercl15_nand_dev_ready(struct mtd_info *mtd)
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return !!(__raw_readw(NAND_CTRL_ADDR(chip)) & SNAPPERCL15_NAND_RDY);
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}
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static const char *snappercl15_nand_part_probes[] = {"cmdlinepart", NULL};
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static struct mtd_partition snappercl15_nand_parts[] = {
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{
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.name = "Kernel",
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@ -100,7 +98,6 @@ static struct mtd_partition snappercl15_nand_parts[] = {
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static struct platform_nand_data snappercl15_nand_data = {
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.chip = {
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.nr_chips = 1,
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.part_probe_types = snappercl15_nand_part_probes,
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.partitions = snappercl15_nand_parts,
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.nr_partitions = ARRAY_SIZE(snappercl15_nand_parts),
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.options = NAND_NO_AUTOINCR,
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@ -105,8 +105,6 @@ static int ts72xx_nand_device_ready(struct mtd_info *mtd)
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return !!(__raw_readb(addr) & 0x20);
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}
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static const char *ts72xx_nand_part_probes[] = { "cmdlinepart", NULL };
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#define TS72XX_BOOTROM_PART_SIZE (SZ_16K)
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#define TS72XX_REDBOOT_PART_SIZE (SZ_2M + SZ_1M)
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@ -134,7 +132,6 @@ static struct platform_nand_data ts72xx_nand_data = {
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.nr_chips = 1,
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.chip_offset = 0,
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.chip_delay = 15,
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.part_probe_types = ts72xx_nand_part_probes,
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.partitions = ts72xx_nand_parts,
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.nr_partitions = ARRAY_SIZE(ts72xx_nand_parts),
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},
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@ -60,8 +60,6 @@ static struct platform_device ixdp425_flash = {
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#if defined(CONFIG_MTD_NAND_PLATFORM) || \
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defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
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const char *part_probes[] = { "cmdlinepart", NULL };
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static struct mtd_partition ixdp425_partitions[] = {
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{
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.name = "ixp400 NAND FS 0",
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@ -101,7 +99,6 @@ static struct platform_nand_data ixdp425_flash_nand_data = {
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.nr_chips = 1,
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.chip_delay = 30,
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.options = NAND_NO_AUTOINCR,
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.part_probe_types = part_probes,
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.partitions = ixdp425_partitions,
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.nr_partitions = ARRAY_SIZE(ixdp425_partitions),
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},
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@ -206,14 +206,11 @@ static int nand_dev_ready(struct mtd_info *mtd)
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return gpio_get_value(FSAMPLE_NAND_RB_GPIO_PIN);
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}
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static const char *part_probes[] = { "cmdlinepart", NULL };
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static struct platform_nand_data nand_data = {
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.chip = {
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.nr_chips = 1,
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.chip_offset = 0,
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.options = NAND_SAMSUNG_LP_OPTIONS,
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.part_probe_types = part_probes,
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},
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.ctrl = {
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.cmd_ctrl = nand_cmd_ctl,
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@ -200,8 +200,6 @@ static int h2_nand_dev_ready(struct mtd_info *mtd)
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return gpio_get_value(H2_NAND_RB_GPIO_PIN);
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}
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static const char *h2_part_probes[] = { "cmdlinepart", NULL };
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static struct platform_nand_data h2_nand_platdata = {
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.chip = {
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.nr_chips = 1,
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@ -209,7 +207,6 @@ static struct platform_nand_data h2_nand_platdata = {
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.nr_partitions = ARRAY_SIZE(h2_nand_partitions),
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.partitions = h2_nand_partitions,
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.options = NAND_SAMSUNG_LP_OPTIONS,
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.part_probe_types = h2_part_probes,
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},
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.ctrl = {
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.cmd_ctrl = h2_nand_cmd_ctl,
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@ -202,8 +202,6 @@ static int nand_dev_ready(struct mtd_info *mtd)
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return gpio_get_value(H3_NAND_RB_GPIO_PIN);
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}
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static const char *part_probes[] = { "cmdlinepart", NULL };
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static struct platform_nand_data nand_platdata = {
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.chip = {
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.nr_chips = 1,
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@ -211,7 +209,6 @@ static struct platform_nand_data nand_platdata = {
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.nr_partitions = ARRAY_SIZE(nand_partitions),
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.partitions = nand_partitions,
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.options = NAND_SAMSUNG_LP_OPTIONS,
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.part_probe_types = part_probes,
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},
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.ctrl = {
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.cmd_ctrl = nand_cmd_ctl,
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@ -164,14 +164,11 @@ static int nand_dev_ready(struct mtd_info *mtd)
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return gpio_get_value(P2_NAND_RB_GPIO_PIN);
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}
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static const char *part_probes[] = { "cmdlinepart", NULL };
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static struct platform_nand_data nand_data = {
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.chip = {
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.nr_chips = 1,
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.chip_offset = 0,
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.options = NAND_SAMSUNG_LP_OPTIONS,
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.part_probe_types = part_probes,
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},
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.ctrl = {
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.cmd_ctrl = nand_cmd_ctl,
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@ -245,8 +245,6 @@ static void ts78xx_ts_nand_read_buf(struct mtd_info *mtd,
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readsb(io_base, buf, len);
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}
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const char *ts_nand_part_probes[] = { "cmdlinepart", NULL };
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static struct mtd_partition ts78xx_ts_nand_parts[] = {
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{
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.name = "mbr",
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@ -271,7 +269,6 @@ static struct mtd_partition ts78xx_ts_nand_parts[] = {
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static struct platform_nand_data ts78xx_ts_nand_data = {
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.chip = {
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.nr_chips = 1,
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.part_probe_types = ts_nand_part_probes,
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.partitions = ts78xx_ts_nand_parts,
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.nr_partitions = ARRAY_SIZE(ts78xx_ts_nand_parts),
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.chip_delay = 15,
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@ -679,8 +679,6 @@ static struct mtd_partition balloon3_partition_info[] = {
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},
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};
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static const char *balloon3_part_probes[] = { "cmdlinepart", NULL };
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struct platform_nand_data balloon3_nand_pdata = {
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.chip = {
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.nr_chips = 4,
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@ -688,7 +686,6 @@ struct platform_nand_data balloon3_nand_pdata = {
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.nr_partitions = ARRAY_SIZE(balloon3_partition_info),
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.partitions = balloon3_partition_info,
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.chip_delay = 50,
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.part_probe_types = balloon3_part_probes,
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},
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.ctrl = {
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.hwcontrol = 0,
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@ -338,8 +338,6 @@ static struct mtd_partition em_x270_partition_info[] = {
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},
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};
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static const char *em_x270_part_probes[] = { "cmdlinepart", NULL };
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struct platform_nand_data em_x270_nand_platdata = {
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.chip = {
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.nr_chips = 1,
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@ -347,7 +345,6 @@ struct platform_nand_data em_x270_nand_platdata = {
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.nr_partitions = ARRAY_SIZE(em_x270_partition_info),
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.partitions = em_x270_partition_info,
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.chip_delay = 20,
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.part_probe_types = em_x270_part_probes,
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},
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.ctrl = {
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.hwcontrol = 0,
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@ -268,8 +268,6 @@ static struct mtd_partition palmtx_partition_info[] = {
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},
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};
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static const char *palmtx_part_probes[] = { "cmdlinepart", NULL };
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struct platform_nand_data palmtx_nand_platdata = {
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.chip = {
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.nr_chips = 1,
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@ -277,7 +275,6 @@ struct platform_nand_data palmtx_nand_platdata = {
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.nr_partitions = ARRAY_SIZE(palmtx_partition_info),
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.partitions = palmtx_partition_info,
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.chip_delay = 20,
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.part_probe_types = palmtx_part_probes,
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},
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.ctrl = {
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.cmd_ctrl = palmtx_nand_cmd_ctl,
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