The last dependency for enabling multiplatform support for omap2+ is now

finally gone with commit 62e4d357 (ARM: 7609/1: disable errata work-arounds
 which access secure registers) that was preventing booting omap4.
 
 Note that make uImage will no longer work properly because of unspecified
 load address, so uImage needs to be created manually with:
 
 $ mkimage -A arm -O linux -T kernel -C none -a 0x80008000 -e 0x80008000 \
 	-n "Linux" -d zImage-omap2plus uImage-omap2plus
 
 You can also boot minimal vexpress configuration using qemu with:
 
 $ qemu-system-arm -machine vexpress-a9 -m 1024 -net nic -net user -serial stdio \
 	-append "console=ttyAMA0,115200n8 rw root=/dev/mmcblk0p2 rootwait" \
 	-kernel zImage-omap2plus -initrd initrd.img -sd rootfs.img
 
 Please note that some custom defconfigs now need to be updated to include
 the following options:
 
 CONFIG_ARCH_MULTIPLATFORM=y
 CONFIG_ARCH_MULTI_V7=y
 CONFIG_ARCH_OMAP2PLUS=y
 
 And possibly also:
 
 CONFIG_ARCH_MULTI_V6=y
 
 Updating is needed at least for RMK's minimal allnoconfig files.
 
 And if you need DEBUG_LL for earlyprintk, you now have to select the
 debug port manually with Kconfig.
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Merge tag 'omap-for-v3.9/multiplatform-enable-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/multiplatform

From Tony Lindgren:
The last dependency for enabling multiplatform support for omap2+ is now
finally gone with commit 62e4d357 (ARM: 7609/1: disable errata work-arounds
which access secure registers) that was preventing booting omap4.

Note that make uImage will no longer work properly because of unspecified
load address, so uImage needs to be created manually with:

$ mkimage -A arm -O linux -T kernel -C none -a 0x80008000 -e 0x80008000 \
	-n "Linux" -d zImage-omap2plus uImage-omap2plus

You can also boot minimal vexpress configuration using qemu with:

$ qemu-system-arm -machine vexpress-a9 -m 1024 -net nic -net user -serial stdio \
	-append "console=ttyAMA0,115200n8 rw root=/dev/mmcblk0p2 rootwait" \
	-kernel zImage-omap2plus -initrd initrd.img -sd rootfs.img

Please note that some custom defconfigs now need to be updated to include
the following options:

CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_V7=y
CONFIG_ARCH_OMAP2PLUS=y

And possibly also:

CONFIG_ARCH_MULTI_V6=y

Updating is needed at least for RMK's minimal allnoconfig files.

And if you need DEBUG_LL for earlyprintk, you now have to select the
debug port manually with Kconfig.

* tag 'omap-for-v3.9/multiplatform-enable-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Remove now obsolete uncompress.h and debug-macro.S
  ARM: OMAP2+: Add minimal support for booting vexpress
  ARM: OMAP2+: Enable ARCH_MULTIPLATFORM support
  ARM: OMAP2+: Disable code that currently does not work with multiplaform
  ARM: OMAP2+: Add multiplatform debug_ll support
  ARM: OMAP: Fix dmaengine init for multiplatform
  ARM: OMAP: Fix i2c cmdline initcall for multiplatform
  ARM: OMAP2+: Use omap initcalls
  ARM: OMAP2+: Limit omap initcalls to omap only on multiplatform kernels

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-01-11 12:09:44 -08:00
commit 6130133248
51 changed files with 314 additions and 370 deletions

View file

@ -937,17 +937,24 @@ config ARCH_DAVINCI
help
Support for TI's DaVinci platform.
config ARCH_OMAP
bool "TI OMAP"
config ARCH_OMAP1
bool "TI OMAP1"
depends on MMU
select ARCH_HAS_CPUFREQ
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_OMAP
select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP
select CLKSRC_MMIO
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_CHIP
select HAVE_CLK
select HAVE_IDE
select IRQ_DOMAIN
select NEED_MACH_IO_H if PCCARD
select NEED_MACH_MEMORY_H
help
Support for TI's OMAP platform (OMAP1/2/3/4).
Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
config ARCH_VT8500_SINGLE
bool "VIA/WonderMedia 85xx"

View file

@ -291,6 +291,13 @@ choice
Say Y here if you want kernel low-level debugging support
on MVEBU based platforms.
config DEBUG_OMAP2PLUS_UART
bool "Kernel low-level debugging messages via OMAP2PLUS UART"
depends on ARCH_OMAP2PLUS
help
Say Y here if you want kernel low-level debugging support
on OMAP2PLUS based platforms.
config DEBUG_PICOXCELL_UART
depends on ARCH_PICOXCELL
bool "Use PicoXcell UART for low-level debug"
@ -459,6 +466,54 @@ config DEBUG_IMX6Q_UART_PORT
Choose UART port on which kernel low-level debug messages
should be output.
choice
prompt "Low-level debug console UART"
depends on DEBUG_OMAP2PLUS_UART
config DEBUG_OMAP2UART1
bool "OMAP2/3/4 UART1 (omap2/3 sdp boards and some omap3 boards)"
help
This covers at least h4, 2430sdp, 3430sdp, 3630sdp,
omap3 torpedo and 3530 lv som.
config DEBUG_OMAP2UART2
bool "OMAP2/3/4 UART2"
config DEBUG_OMAP2UART3
bool "OMAP2 UART3 (n8x0)"
config DEBUG_OMAP3UART3
bool "OMAP3 UART3 (most omap3 boards)"
help
This covers at least cm_t3x, beagle, crane, devkit8000,
igep00x0, ldp, n900, n9(50), pandora, overo, touchbook,
and 3517evm.
config DEBUG_OMAP4UART3
bool "OMAP4/5 UART3 (omap4 blaze, panda, omap5 sevm)"
config DEBUG_OMAP3UART4
bool "OMAP36XX UART4"
config DEBUG_OMAP4UART4
bool "OMAP4/5 UART4"
config DEBUG_TI81XXUART1
bool "TI81XX UART1 (ti8148evm)"
config DEBUG_TI81XXUART2
bool "TI81XX UART2"
config DEBUG_TI81XXUART3
bool "TI81XX UART3 (ti8168evm)"
config DEBUG_AM33XXUART1
bool "AM33XX UART1"
config DEBUG_ZOOM_UART
bool "Zoom2/3 UART"
endchoice
choice
prompt "Low-level debug console UART"
depends on DEBUG_LL && DEBUG_TEGRA_UART
@ -501,6 +556,7 @@ config DEBUG_LL_INCLUDE
DEBUG_IMX6Q_UART
default "debug/highbank.S" if DEBUG_HIGHBANK_UART
default "debug/mvebu.S" if DEBUG_MVEBU_UART
default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART
default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
default "debug/socfpga.S" if DEBUG_SOCFPGA_UART
default "debug/sunxi.S" if DEBUG_SUNXI_UART0 || DEBUG_SUNXI_UART1

View file

@ -20,9 +20,10 @@ CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_OMAP=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_OMAP_RESET_CLOCKS=y
CONFIG_OMAP_MUX_DEBUG=y
CONFIG_ARCH_VEXPRESS_CA9X4=y
CONFIG_ARM_THUMBEE=y
CONFIG_ARM_ERRATA_411920=y
CONFIG_NO_HZ=y
@ -121,6 +122,8 @@ CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_8250_DETECT_IRQ=y
CONFIG_SERIAL_8250_RSA=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C_CHARDEV=y
CONFIG_SPI=y
@ -194,6 +197,7 @@ CONFIG_USB_ZERO=m
CONFIG_MMC=y
CONFIG_MMC_UNSAFE_RESUME=y
CONFIG_SDIO_UART=y
CONFIG_MMC_ARMMMCI=y
CONFIG_MMC_OMAP=y
CONFIG_MMC_OMAP_HS=y
CONFIG_RTC_CLASS=y

View file

@ -1,5 +1,4 @@
/* arch/arm/mach-omap2/include/mach/debug-macro.S
*
/*
* Debugging macro include header
*
* Copyright (C) 1994-1999 Russell King
@ -13,7 +12,49 @@
#include <linux/serial_reg.h>
#include <mach/serial.h>
/* OMAP2 serial ports */
#define OMAP2_UART1_BASE 0x4806a000
#define OMAP2_UART2_BASE 0x4806c000
#define OMAP2_UART3_BASE 0x4806e000
/* OMAP3 serial ports */
#define OMAP3_UART1_BASE OMAP2_UART1_BASE
#define OMAP3_UART2_BASE OMAP2_UART2_BASE
#define OMAP3_UART3_BASE 0x49020000
#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */
#define OMAP3_UART4_AM35XX_BASE 0x4809E000 /* Only on AM35xx */
/* OMAP4 serial ports */
#define OMAP4_UART1_BASE OMAP2_UART1_BASE
#define OMAP4_UART2_BASE OMAP2_UART2_BASE
#define OMAP4_UART3_BASE 0x48020000
#define OMAP4_UART4_BASE 0x4806e000
/* TI81XX serial ports */
#define TI81XX_UART1_BASE 0x48020000
#define TI81XX_UART2_BASE 0x48022000
#define TI81XX_UART3_BASE 0x48024000
/* AM3505/3517 UART4 */
#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */
/* AM33XX serial port */
#define AM33XX_UART1_BASE 0x44E09000
/* OMAP5 serial ports */
#define OMAP5_UART1_BASE OMAP2_UART1_BASE
#define OMAP5_UART2_BASE OMAP2_UART2_BASE
#define OMAP5_UART3_BASE OMAP4_UART3_BASE
#define OMAP5_UART4_BASE OMAP4_UART4_BASE
#define OMAP5_UART5_BASE 0x48066000
#define OMAP5_UART6_BASE 0x48068000
/* External port on Zoom2/3 */
#define ZOOM_UART_BASE 0x10000000
#define ZOOM_UART_VIRT 0xfa400000
#define OMAP_PORT_SHIFT 2
#define ZOOM_PORT_SHIFT 1
#define UART_OFFSET(addr) ((addr) & 0x00ffffff)
@ -23,12 +64,6 @@ omap_uart_virt: .word 0
omap_uart_lsr: .word 0
.popsection
/*
* Note that this code won't work if the bootloader passes
* a wrong machine ID number in r1. To debug, just hardcode
* the desired UART phys and virt addresses temporarily into
* the omap_uart_phys and omap_uart_virt above.
*/
.macro addruart, rp, rv, tmp
/* Use omap_uart_phys/virt if already configured */
@ -43,74 +78,64 @@ omap_uart_lsr: .word 0
cmpne \rv, #0
bne 100f @ already configured
/* Check the debug UART configuration set in uncompress.h */
mov \rp, pc
ldr \rv, =OMAP_UART_INFO_OFS
and \rp, \rp, #0xff000000
ldr \rp, [\rp, \rv]
/* Select the UART to use based on the UART1 scratchpad value */
cmp \rp, #0 @ no port configured?
beq 21f @ if none, try to use UART1
cmp \rp, #OMAP2UART1 @ OMAP2/3/4UART1
beq 21f @ configure OMAP2/3/4UART1
cmp \rp, #OMAP2UART2 @ OMAP2/3/4UART2
beq 22f @ configure OMAP2/3/4UART2
cmp \rp, #OMAP2UART3 @ only on 24xx
beq 23f @ configure OMAP2UART3
cmp \rp, #OMAP3UART3 @ only on 34xx
beq 33f @ configure OMAP3UART3
cmp \rp, #OMAP4UART3 @ only on 44xx/54xx
beq 43f @ configure OMAP4/5UART3
cmp \rp, #OMAP3UART4 @ only on 36xx
beq 34f @ configure OMAP3UART4
cmp \rp, #OMAP4UART4 @ only on 44xx/54xx
beq 44f @ configure OMAP4/5UART4
cmp \rp, #TI81XXUART1 @ ti81Xx UART offsets different
beq 81f @ configure UART1
cmp \rp, #TI81XXUART2 @ ti81Xx UART offsets different
beq 82f @ configure UART2
cmp \rp, #TI81XXUART3 @ ti81Xx UART offsets different
beq 83f @ configure UART3
cmp \rp, #AM33XXUART1 @ AM33XX UART offsets different
beq 84f @ configure UART1
cmp \rp, #ZOOM_UART @ only on zoom2/3
beq 95f @ configure ZOOM_UART
/* Configure the UART offset from the phys/virt base */
21: mov \rp, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4
#ifdef CONFIG_DEBUG_OMAP2UART1
mov \rp, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4
b 98f
22: mov \rp, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4
#endif
#ifdef CONFIG_DEBUG_OMAP2UART2
mov \rp, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4
b 98f
23: mov \rp, #UART_OFFSET(OMAP2_UART3_BASE)
#endif
#ifdef CONFIG_DEBUG_OMAP2UART3
mov \rp, #UART_OFFSET(OMAP2_UART3_BASE)
b 98f
33: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
#endif
#ifdef CONFIG_DEBUG_OMAP3UART3
mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
add \rp, \rp, #0x00fb0000
add \rp, \rp, #0x00006000 @ OMAP3_UART3_BASE
b 98f
34: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
#endif
#ifdef CONFIG_DEBUG_OMAP4UART3
mov \rp, #UART_OFFSET(OMAP4_UART3_BASE)
b 98f
#endif
#ifdef CONFIG_DEBUG_OMAP3UART4
mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
add \rp, \rp, #0x00fb0000
add \rp, \rp, #0x00028000 @ OMAP3_UART4_BASE
b 98f
43: mov \rp, #UART_OFFSET(OMAP4_UART3_BASE)
#endif
#ifdef CONFIG_DEBUG_OMAP4UART4
mov \rp, #UART_OFFSET(OMAP4_UART4_BASE)
b 98f
44: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE)
#endif
#ifdef CONFIG_DEBUG_TI81XXUART1
mov \rp, #UART_OFFSET(TI81XX_UART1_BASE)
b 98f
81: mov \rp, #UART_OFFSET(TI81XX_UART1_BASE)
#endif
#ifdef CONFIG_DEBUG_TI81XXUART2
mov \rp, #UART_OFFSET(TI81XX_UART2_BASE)
b 98f
82: mov \rp, #UART_OFFSET(TI81XX_UART2_BASE)
#endif
#ifdef CONFIG_DEBUG_TI81XXUART3
mov \rp, #UART_OFFSET(TI81XX_UART3_BASE)
b 98f
83: mov \rp, #UART_OFFSET(TI81XX_UART3_BASE)
b 98f
84: ldr \rp, =AM33XX_UART1_BASE
#endif
#ifdef CONFIG_DEBUG_AM33XXUART1
ldr \rp, =AM33XX_UART1_BASE
and \rp, \rp, #0x00ffffff
b 97f
95: ldr \rp, =ZOOM_UART_BASE
#endif
#ifdef CONFIG_DEBUG_ZOOM_UART
ldr \rp, =ZOOM_UART_BASE
str \rp, [\tmp, #0] @ omap_uart_phys
ldr \rp, =ZOOM_UART_VIRT
str \rp, [\tmp, #4] @ omap_uart_virt
mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT)
str \rp, [\tmp, #8] @ omap_uart_lsr
#endif
b 10b
/* AM33XX: Store both phys and virt address for the uart */

View file

@ -24,7 +24,7 @@
#include <linux/init.h>
#include <linux/device.h>
#include <linux/io.h>
#include <linux/dma-mapping.h>
#include <linux/omap-dma.h>
#include <mach/tc.h>
@ -270,11 +270,17 @@ static u32 configure_dma_errata(void)
return errata;
}
static const struct platform_device_info omap_dma_dev_info = {
.name = "omap-dma-engine",
.id = -1,
.dma_mask = DMA_BIT_MASK(32),
};
static int __init omap1_system_dma_init(void)
{
struct omap_system_dma_plat_info *p;
struct omap_dma_dev_attr *d;
struct platform_device *pdev;
struct platform_device *pdev, *dma_pdev;
int ret;
pdev = platform_device_alloc("omap_dma_system", 0);
@ -380,8 +386,16 @@ static int __init omap1_system_dma_init(void)
dma_common_ch_start = CPC;
dma_common_ch_end = COLOR;
dma_pdev = platform_device_register_full(&omap_dma_dev_info);
if (IS_ERR(dma_pdev)) {
ret = PTR_ERR(dma_pdev);
goto exit_release_pdev;
}
return ret;
exit_release_pdev:
platform_device_del(pdev);
exit_release_chan:
kfree(d->chan);
exit_release_d:

View file

@ -91,3 +91,9 @@ int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *pdata,
return platform_device_register(pdev);
}
static int __init omap_i2c_cmdline(void)
{
return omap_register_i2c_bus_cmdline();
}
subsys_initcall(omap_i2c_cmdline);

View file

@ -1,3 +1,26 @@
config ARCH_OMAP
bool
config ARCH_OMAP2PLUS
bool "TI OMAP2/3/4/5 SoCs with device tree support" if (ARCH_MULTI_V6 || ARCH_MULTI_V7)
select ARCH_HAS_CPUFREQ
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_OMAP
select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP
select CLKSRC_MMIO
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_CHIP
select HAVE_CLK
select OMAP_DM_TIMER
select PINCTRL
select PROC_DEVICETREE if PROC_FS
select SPARSE_IRQ
select USE_OF
help
Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
if ARCH_OMAP2PLUS
menu "TI OMAP2/3/4 Specific Features"
@ -397,7 +420,7 @@ config OMAP3_SDRC_AC_TIMING
config OMAP4_ERRATA_I688
bool "OMAP4 errata: Async Bridge Corruption"
depends on ARCH_OMAP4
depends on ARCH_OMAP4 && !ARCH_MULTIPLATFORM
select ARCH_HAS_BARRIERS
help
If a data is stalled inside asynchronous bridge because of back

View file

@ -2,6 +2,9 @@
# Makefile for the linux kernel.
#
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \
-I$(srctree)/arch/arm/plat-omap/include
# Common support
obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o gpmc.o timer.o pm.o \
common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \

View file

@ -494,7 +494,7 @@ static int __init beagle_opp_init(void)
}
return 0;
}
device_initcall(beagle_opp_init);
omap_device_initcall(beagle_opp_init);
static void __init omap3_beagle_init(void)
{

View file

@ -18,6 +18,7 @@
#include <video/omapdss.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include "soc.h"
#include "board-rx51.h"
#include "mux.h"
@ -85,5 +86,5 @@ static int __init rx51_video_init(void)
return 0;
}
subsys_initcall(rx51_video_init);
omap_subsys_initcall(rx51_video_init);
#endif /* defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) */

View file

@ -52,6 +52,6 @@ static int __init omap2xxx_clk_arch_init(void)
return ret;
}
arch_initcall(omap2xxx_clk_arch_init);
omap_arch_initcall(omap2xxx_clk_arch_init);

View file

@ -94,6 +94,6 @@ static int __init omap3xxx_clk_arch_init(void)
return ret;
}
arch_initcall(omap3xxx_clk_arch_init);
omap_arch_initcall(omap3xxx_clk_arch_init);

View file

@ -68,7 +68,7 @@ static int __init omap3_l3_init(void)
return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
}
postcore_initcall(omap3_l3_init);
omap_postcore_initcall(omap3_l3_init);
static int __init omap4_l3_init(void)
{
@ -103,7 +103,7 @@ static int __init omap4_l3_init(void)
return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
}
postcore_initcall(omap4_l3_init);
omap_postcore_initcall(omap4_l3_init);
#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
@ -734,4 +734,4 @@ static int __init omap2_init_devices(void)
return 0;
}
arch_initcall(omap2_init_devices);
omap_arch_initcall(omap2_init_devices);

View file

@ -27,7 +27,7 @@
#include <linux/module.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/omap-dma.h>
#include "soc.h"
@ -288,9 +288,26 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
return 0;
}
static const struct platform_device_info omap_dma_dev_info = {
.name = "omap-dma-engine",
.id = -1,
.dma_mask = DMA_BIT_MASK(32),
};
static int __init omap2_system_dma_init(void)
{
return omap_hwmod_for_each_by_class("dma",
struct platform_device *pdev;
int res;
res = omap_hwmod_for_each_by_class("dma",
omap2_system_dma_init_dev, NULL);
if (res)
return res;
pdev = platform_device_register_full(&omap_dma_dev_info);
if (IS_ERR(pdev))
return PTR_ERR(pdev);
return res;
}
arch_initcall(omap2_system_dma_init);
omap_arch_initcall(omap2_system_dma_init);

View file

@ -62,6 +62,6 @@ static int __init omap_init_drm(void)
}
arch_initcall(omap_init_drm);
omap_arch_initcall(omap_init_drm);
#endif

View file

@ -47,4 +47,4 @@ static int __init emu_init(void)
return 0;
}
subsys_initcall(emu_init);
omap_subsys_initcall(emu_init);

View file

@ -89,7 +89,7 @@ static int __init omap_init_vrfb(void)
return 0;
}
arch_initcall(omap_init_vrfb);
omap_arch_initcall(omap_init_vrfb);
#endif
#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
@ -113,6 +113,6 @@ static int __init omap_init_fb(void)
return platform_device_register(&omap_fb_device);
}
arch_initcall(omap_init_fb);
omap_arch_initcall(omap_init_fb);
#endif

View file

@ -23,6 +23,7 @@
#include <linux/of.h>
#include <linux/platform_data/gpio-omap.h>
#include "soc.h"
#include "omap_hwmod.h"
#include "omap_device.h"
#include "omap-pm.h"
@ -147,7 +148,7 @@ static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
/*
* gpio_init needs to be done before
* machine_init functions access gpio APIs.
* Hence gpio_init is a postcore_initcall.
* Hence gpio_init is a omap_postcore_initcall.
*/
static int __init omap2_gpio_init(void)
{
@ -157,4 +158,4 @@ static int __init omap2_gpio_init(void)
return omap_hwmod_for_each_by_class("gpio", omap2_gpio_dev_init, NULL);
}
postcore_initcall(omap2_gpio_init);
omap_postcore_initcall(omap2_gpio_init);

View file

@ -1205,7 +1205,7 @@ static __exit void gpmc_exit(void)
}
postcore_initcall(gpmc_init);
omap_postcore_initcall(gpmc_init);
module_exit(gpmc_exit);
static int __init omap_gpmc_init(void)
@ -1225,7 +1225,7 @@ static int __init omap_gpmc_init(void)
return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
}
postcore_initcall(omap_gpmc_init);
omap_postcore_initcall(omap_gpmc_init);
static irqreturn_t gpmc_handle_irq(int irq, void *dev)
{

View file

@ -27,6 +27,7 @@
#include <linux/err.h>
#include <linux/platform_device.h>
#include "soc.h"
#include "omap_hwmod.h"
#include "omap_device.h"
#include "hdq1w.h"
@ -93,4 +94,4 @@ static int __init omap_init_hdq(void)
return 0;
}
arch_initcall(omap_init_hdq);
omap_arch_initcall(omap_init_hdq);

View file

@ -57,4 +57,4 @@ static int __init hwspinlocks_init(void)
return retval;
}
/* early board code might need to reserve specific hwspinlock instances */
postcore_initcall(hwspinlocks_init);
omap_postcore_initcall(hwspinlocks_init);

View file

@ -185,3 +185,8 @@ int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
return PTR_RET(pdev);
}
static int __init omap_i2c_cmdline(void)
{
return omap_register_i2c_bus_cmdline();
}
omap_subsys_initcall(omap_i2c_cmdline);

View file

@ -8,20 +8,6 @@
* GNU General Public License for more details.
*/
/*
* Memory entry used for the DEBUG_LL UART configuration, relative to
* start of RAM. See also uncompress.h and debug-macro.S.
*
* Note that using a memory location for storing the UART configuration
* has at least two limitations:
*
* 1. Kernel uncompress code cannot overlap OMAP_UART_INFO as the
* uncompress code could then partially overwrite itself
* 2. We assume printascii is called at least once before paging_init,
* and addruart has a chance to read OMAP_UART_INFO
*/
#define OMAP_UART_INFO_OFS 0x3ffc
/* OMAP2 serial ports */
#define OMAP2_UART1_BASE 0x4806a000
#define OMAP2_UART2_BASE 0x4806c000
@ -68,29 +54,6 @@
#define OMAP24XX_BASE_BAUD (48000000/16)
/*
* DEBUG_LL port encoding stored into the UART1 scratchpad register by
* decomp_setup in uncompress.h
*/
#define OMAP2UART1 21
#define OMAP2UART2 22
#define OMAP2UART3 23
#define OMAP3UART1 OMAP2UART1
#define OMAP3UART2 OMAP2UART2
#define OMAP3UART3 33
#define OMAP3UART4 34 /* Only on 36xx */
#define OMAP4UART1 OMAP2UART1
#define OMAP4UART2 OMAP2UART2
#define OMAP4UART3 43
#define OMAP4UART4 44
#define TI81XXUART1 81
#define TI81XXUART2 82
#define TI81XXUART3 83
#define AM33XXUART1 84
#define OMAP5UART3 OMAP4UART3
#define OMAP5UART4 OMAP4UART4
#define ZOOM_UART 95 /* Only on zoom2/3 */
#ifndef __ASSEMBLER__
struct omap_board_data;

View file

@ -1,176 +0,0 @@
/*
* arch/arm/plat-omap/include/mach/uncompress.h
*
* Serial port stubs for kernel decompress status messages
*
* Initially based on:
* linux-2.4.15-rmk1-dsplinux1.6/arch/arm/plat-omap/include/mach1510/uncompress.h
* Copyright (C) 2000 RidgeRun, Inc.
* Author: Greg Lonnon <glonnon@ridgerun.com>
*
* Rewritten by:
* Author: <source@mvista.com>
* 2004 (c) MontaVista Software, Inc.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#include <linux/types.h>
#include <linux/serial_reg.h>
#include <asm/memory.h>
#include <asm/mach-types.h>
#include <mach/serial.h>
#define MDR1_MODE_MASK 0x07
volatile u8 *uart_base;
int uart_shift;
/*
* Store the DEBUG_LL uart number into memory.
* See also debug-macro.S, and serial.c for related code.
*/
static void set_omap_uart_info(unsigned char port)
{
/*
* Get address of some.bss variable and round it down
* a la CONFIG_AUTO_ZRELADDR.
*/
u32 ram_start = (u32)&uart_shift & 0xf8000000;
u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS);
*uart_info = port;
}
static void putc(int c)
{
if (!uart_base)
return;
/* Check for UART 16x mode */
if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0)
return;
while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE))
barrier();
uart_base[UART_TX << uart_shift] = c;
}
static inline void flush(void)
{
}
/*
* Macros to configure UART1 and debug UART
*/
#define _DEBUG_LL_ENTRY(mach, dbg_uart, dbg_shft, dbg_id) \
if (machine_is_##mach()) { \
uart_base = (volatile u8 *)(dbg_uart); \
uart_shift = (dbg_shft); \
port = (dbg_id); \
set_omap_uart_info(port); \
break; \
}
#define DEBUG_LL_OMAP2(p, mach) \
_DEBUG_LL_ENTRY(mach, OMAP2_UART##p##_BASE, OMAP_PORT_SHIFT, \
OMAP2UART##p)
#define DEBUG_LL_OMAP3(p, mach) \
_DEBUG_LL_ENTRY(mach, OMAP3_UART##p##_BASE, OMAP_PORT_SHIFT, \
OMAP3UART##p)
#define DEBUG_LL_OMAP4(p, mach) \
_DEBUG_LL_ENTRY(mach, OMAP4_UART##p##_BASE, OMAP_PORT_SHIFT, \
OMAP4UART##p)
#define DEBUG_LL_OMAP5(p, mach) \
_DEBUG_LL_ENTRY(mach, OMAP5_UART##p##_BASE, OMAP_PORT_SHIFT, \
OMAP5UART##p)
/* Zoom2/3 shift is different for UART1 and external port */
#define DEBUG_LL_ZOOM(mach) \
_DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART)
#define DEBUG_LL_TI81XX(p, mach) \
_DEBUG_LL_ENTRY(mach, TI81XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
TI81XXUART##p)
#define DEBUG_LL_AM33XX(p, mach) \
_DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
AM33XXUART##p)
static inline void arch_decomp_setup(void)
{
int port = 0;
/*
* Initialize the port based on the machine ID from the bootloader.
* Note that we're using macros here instead of switch statement
* as machine_is functions are optimized out for the boards that
* are not selected.
*/
do {
/* omap2 based boards using UART1 */
DEBUG_LL_OMAP2(1, omap_2430sdp);
DEBUG_LL_OMAP2(1, omap_apollon);
DEBUG_LL_OMAP2(1, omap_h4);
/* omap2 based boards using UART3 */
DEBUG_LL_OMAP2(3, nokia_n800);
DEBUG_LL_OMAP2(3, nokia_n810);
DEBUG_LL_OMAP2(3, nokia_n810_wimax);
/* omap3 based boards using UART1 */
DEBUG_LL_OMAP2(1, omap3evm);
DEBUG_LL_OMAP3(1, omap_3430sdp);
DEBUG_LL_OMAP3(1, omap_3630sdp);
DEBUG_LL_OMAP3(1, omap3530_lv_som);
DEBUG_LL_OMAP3(1, omap3_torpedo);
/* omap3 based boards using UART3 */
DEBUG_LL_OMAP3(3, cm_t35);
DEBUG_LL_OMAP3(3, cm_t3517);
DEBUG_LL_OMAP3(3, cm_t3730);
DEBUG_LL_OMAP3(3, craneboard);
DEBUG_LL_OMAP3(3, devkit8000);
DEBUG_LL_OMAP3(3, igep0020);
DEBUG_LL_OMAP3(3, igep0030);
DEBUG_LL_OMAP3(3, nokia_rm680);
DEBUG_LL_OMAP3(3, nokia_rm696);
DEBUG_LL_OMAP3(3, nokia_rx51);
DEBUG_LL_OMAP3(3, omap3517evm);
DEBUG_LL_OMAP3(3, omap3_beagle);
DEBUG_LL_OMAP3(3, omap3_pandora);
DEBUG_LL_OMAP3(3, omap_ldp);
DEBUG_LL_OMAP3(3, overo);
DEBUG_LL_OMAP3(3, touchbook);
/* omap4 based boards using UART3 */
DEBUG_LL_OMAP4(3, omap_4430sdp);
DEBUG_LL_OMAP4(3, omap4_panda);
/* omap5 based boards using UART3 */
DEBUG_LL_OMAP5(3, omap5_sevm);
/* zoom2/3 external uart */
DEBUG_LL_ZOOM(omap_zoom2);
DEBUG_LL_ZOOM(omap_zoom3);
/* TI8168 base boards using UART3 */
DEBUG_LL_TI81XX(3, ti8168evm);
/* TI8148 base boards using UART1 */
DEBUG_LL_TI81XX(1, ti8148evm);
/* AM33XX base boards using UART1 */
DEBUG_LL_AM33XX(1, am335xevm);
} while (0);
}
/*
* nothing to do
*/
#define arch_decomp_wdog()

View file

@ -23,6 +23,7 @@
#include <linux/omap-dma.h>
#include "soc.h"
#include "omap_device.h"
/*
@ -118,4 +119,4 @@ static int __init omap2_mcbsp_init(void)
return 0;
}
arch_initcall(omap2_mcbsp_init);
omap_arch_initcall(omap2_mcbsp_init);

View file

@ -61,7 +61,7 @@ static int __init omap_iommu_init(void)
return omap_hwmod_for_each_by_class("mmu", omap_iommu_dev_init, NULL);
}
/* must be ready before omap3isp is probed */
subsys_initcall(omap_iommu_init);
omap_subsys_initcall(omap_iommu_init);
static void __exit omap_iommu_exit(void)
{

View file

@ -13,6 +13,7 @@
#include <linux/clk.h>
#include <linux/io.h>
#include "soc.h"
#include "common.h"
#include "prm2xxx.h"
@ -62,4 +63,4 @@ static int __init omap2xxx_common_look_up_clks_for_reset(void)
return 0;
}
core_initcall(omap2xxx_common_look_up_clks_for_reset);
omap_core_initcall(omap2xxx_common_look_up_clks_for_reset);

View file

@ -225,7 +225,7 @@ static int __init omap_l2_cache_init(void)
return 0;
}
early_initcall(omap_l2_cache_init);
omap_early_initcall(omap_l2_cache_init);
#endif
void __iomem *omap4_get_sar_ram_base(void)
@ -253,7 +253,7 @@ static int __init omap4_sar_ram_init(void)
return 0;
}
early_initcall(omap4_sar_ram_init);
omap_early_initcall(omap4_sar_ram_init);
static struct of_device_id irq_match[] __initdata = {
{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },

View file

@ -89,6 +89,7 @@
#include <linux/of.h>
#include <linux/notifier.h>
#include "soc.h"
#include "omap_device.h"
#include "omap_hwmod.h"
@ -1259,7 +1260,7 @@ static int __init omap_device_init(void)
bus_register_notifier(&platform_bus_type, &platform_nb);
return 0;
}
core_initcall(omap_device_init);
omap_core_initcall(omap_device_init);
/**
* omap_device_late_idle - idle devices without drivers
@ -1297,4 +1298,4 @@ static int __init omap_device_late_init(void)
bus_for_each_dev(&platform_bus_type, NULL, NULL, omap_device_late_idle);
return 0;
}
late_initcall(omap_device_late_init);
omap_late_initcall(omap_device_late_init);

View file

@ -3303,7 +3303,7 @@ static int __init omap_hwmod_setup_all(void)
return 0;
}
core_initcall(omap_hwmod_setup_all);
omap_core_initcall(omap_hwmod_setup_all);
/**
* omap_hwmod_enable - enable an omap_hwmod

View file

@ -63,7 +63,7 @@ static int __init omap4430_phy_power_down(void)
return 0;
}
early_initcall(omap4430_phy_power_down);
omap_early_initcall(omap4430_phy_power_down);
void am35x_musb_reset(void)
{

View file

@ -168,4 +168,4 @@ int __init omap3_opp_init(void)
return r;
}
device_initcall(omap3_opp_init);
omap_device_initcall(omap3_opp_init);

View file

@ -177,4 +177,4 @@ int __init omap4_opp_init(void)
ARRAY_SIZE(omap446x_opp_def_list));
return r;
}
device_initcall(omap4_opp_init);
omap_device_initcall(omap4_opp_init);

View file

@ -279,6 +279,6 @@ static int __init pm_dbg_init(void)
return 0;
}
arch_initcall(pm_dbg_init);
omap_arch_initcall(pm_dbg_init);
#endif

View file

@ -336,7 +336,7 @@ static int __init omap2_common_pm_init(void)
return 0;
}
postcore_initcall(omap2_common_pm_init);
omap_postcore_initcall(omap2_common_pm_init);
int __init omap2_common_pm_late_init(void)
{

View file

@ -89,4 +89,4 @@ static int __init omap_init_pmu(void)
return omap2_init_pmu(oh_num, oh_names);
}
subsys_initcall(omap_init_pmu);
omap_subsys_initcall(omap_init_pmu);

View file

@ -427,7 +427,7 @@ static int __init omap3xxx_prm_late_init(void)
return ret;
}
subsys_initcall(omap3xxx_prm_late_init);
omap_subsys_initcall(omap3xxx_prm_late_init);
static void __exit omap3xxx_prm_exit(void)
{

View file

@ -665,7 +665,7 @@ static int __init omap44xx_prm_late_init(void)
return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup);
}
subsys_initcall(omap44xx_prm_late_init);
omap_subsys_initcall(omap44xx_prm_late_init);
static void __exit omap44xx_prm_exit(void)
{

View file

@ -254,7 +254,7 @@ static int __init omap_serial_early_init(void)
return 0;
}
core_initcall(omap_serial_early_init);
omap_core_initcall(omap_serial_early_init);
/**
* omap_serial_init_port() - initialize single serial port

View file

@ -58,4 +58,4 @@ static int __init sr_class3_init(void)
pr_info("SmartReflex Class3 initialized\n");
return sr_register_class(&class3_data);
}
late_initcall(sr_class3_init);
omap_late_initcall(sr_class3_init);

View file

@ -42,6 +42,9 @@
#undef MULTI_OMAP2
#undef OMAP_NAME
#ifdef CONFIG_ARCH_MULTIPLATFORM
#define MULTI_OMAP2
#endif
#ifdef CONFIG_SOC_OMAP2420
# ifdef OMAP_NAME
# undef MULTI_OMAP2
@ -112,6 +115,11 @@ int omap_type(void);
*/
unsigned int omap_rev(void);
static inline int soc_is_omap(void)
{
return omap_rev() != 0;
}
/*
* Get the CPU revision for OMAP devices
*/
@ -465,5 +473,26 @@ static inline unsigned int omap4_has_ ##feat(void) \
OMAP4_HAS_FEATURE(perf_silicon, PERF_SILICON)
/*
* We need to make sure omap initcalls don't run when
* multiplatform kernels are booted on other SoCs.
*/
#define omap_initcall(level, fn) \
static int __init __used __##fn(void) \
{ \
if (!soc_is_omap()) \
return 0; \
return fn(); \
} \
level(__##fn);
#define omap_early_initcall(fn) omap_initcall(early_initcall, fn)
#define omap_core_initcall(fn) omap_initcall(core_initcall, fn)
#define omap_postcore_initcall(fn) omap_initcall(postcore_initcall, fn)
#define omap_arch_initcall(fn) omap_initcall(arch_initcall, fn)
#define omap_subsys_initcall(fn) omap_initcall(subsys_initcall, fn)
#define omap_device_initcall(fn) omap_initcall(device_initcall, fn)
#define omap_late_initcall(fn) omap_initcall(late_initcall, fn)
#endif /* __ASSEMBLY__ */

View file

@ -742,7 +742,7 @@ static int __init omap2_dm_timer_init(void)
return 0;
}
arch_initcall(omap2_dm_timer_init);
omap_arch_initcall(omap2_dm_timer_init);
/**
* omap2_override_clocksource - clocksource override with user configuration

View file

@ -130,4 +130,4 @@ static int __init omap_init_wdt(void)
dev_name, oh->name);
return 0;
}
subsys_initcall(omap_init_wdt);
omap_subsys_initcall(omap_init_wdt);

View file

@ -5,36 +5,6 @@ menu "TI OMAP Common Features"
config ARCH_OMAP_OTG
bool
choice
prompt "OMAP System Type"
default ARCH_OMAP2PLUS
config ARCH_OMAP1
bool "TI OMAP1"
select CLKDEV_LOOKUP
select CLKSRC_MMIO
select GENERIC_IRQ_CHIP
select HAVE_IDE
select IRQ_DOMAIN
select NEED_MACH_IO_H if PCCARD
select NEED_MACH_MEMORY_H
help
"Systems based on omap7xx, omap15xx or omap16xx"
config ARCH_OMAP2PLUS
bool "TI OMAP2/3/4"
select CLKDEV_LOOKUP
select GENERIC_IRQ_CHIP
select OMAP_DM_TIMER
select PINCTRL
select PROC_DEVICETREE if PROC_FS
select SPARSE_IRQ
select USE_OF
help
"Systems based on OMAP2, OMAP3, OMAP4 or OMAP5"
endchoice
comment "OMAP Feature Selections"
config OMAP_DEBUG_DEVICES
@ -118,7 +88,7 @@ config OMAP_MUX_WARNINGS
config OMAP_MBOX_FWK
tristate "Mailbox framework support"
depends on ARCH_OMAP
depends on ARCH_OMAP && !ARCH_MULTIPLATFORM
help
Say Y here if you want to use OMAP Mailbox framework support for
DSP, IVA1.0 and IVA2 in OMAP1/2/3.

View file

@ -2,6 +2,8 @@
# Makefile for the linux kernel.
#
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-omap/include
# Common support
obj-y := sram.o dma.o counter_32k.o
obj-m :=

View file

@ -68,7 +68,7 @@ __setup("i2c_bus=", omap_i2c_bus_setup);
* Register busses defined in command line but that are not registered with
* omap_register_i2c_bus from board initialization code.
*/
static int __init omap_register_i2c_bus_cmdline(void)
int __init omap_register_i2c_bus_cmdline(void)
{
int i, err = 0;
@ -83,7 +83,6 @@ static int __init omap_register_i2c_bus_cmdline(void)
out:
return err;
}
subsys_initcall(omap_register_i2c_bus_cmdline);
/**
* omap_register_i2c_bus - register I2C bus with device descriptors

View file

@ -32,6 +32,7 @@ int omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
extern int omap_register_i2c_bus(int bus_id, u32 clkrate,
struct i2c_board_info const *info,
unsigned len);
extern int omap_register_i2c_bus_cmdline(void);
#else
static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
struct i2c_board_info const *info,
@ -39,6 +40,11 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
{
return 0;
}
static inline int omap_register_i2c_bus_cmdline(void)
{
return 0;
}
#endif
struct omap_hwmod;

View file

@ -38,7 +38,10 @@
#include <crypto/internal/hash.h>
#include <linux/omap-dma.h>
#ifdef CONFIG_ARCH_OMAP1
#include <mach/irqs.h>
#endif
#define SHA_REG_DIGEST(x) (0x00 + ((x) * 0x04))
#define SHA_REG_DIN(x) (0x1C + ((x) * 0x04))

View file

@ -661,32 +661,14 @@ bool omap_dma_filter_fn(struct dma_chan *chan, void *param)
}
EXPORT_SYMBOL_GPL(omap_dma_filter_fn);
static struct platform_device *pdev;
static const struct platform_device_info omap_dma_dev_info = {
.name = "omap-dma-engine",
.id = -1,
.dma_mask = DMA_BIT_MASK(32),
};
static int omap_dma_init(void)
{
int rc = platform_driver_register(&omap_dma_driver);
if (rc == 0) {
pdev = platform_device_register_full(&omap_dma_dev_info);
if (IS_ERR(pdev)) {
platform_driver_unregister(&omap_dma_driver);
rc = PTR_ERR(pdev);
}
}
return rc;
return platform_driver_register(&omap_dma_driver);
}
subsys_initcall(omap_dma_init);
static void __exit omap_dma_exit(void)
{
platform_device_unregister(pdev);
platform_driver_unregister(&omap_dma_driver);
}
module_exit(omap_dma_exit);

View file

@ -291,7 +291,7 @@ config IR_TTUSBIR
config IR_RX51
tristate "Nokia N900 IR transmitter diode"
depends on OMAP_DM_TIMER && LIRC
depends on OMAP_DM_TIMER && LIRC && !ARCH_MULTIPLATFORM
---help---
Say Y or M here if you want to enable support for the IR
transmitter diode built in the Nokia N900 (RX51) device.

View file

@ -4,7 +4,7 @@
menuconfig TIDSPBRIDGE
tristate "DSP Bridge driver"
depends on ARCH_OMAP3
depends on ARCH_OMAP3 && !ARCH_MULTIPLATFORM
select OMAP_MBOX_FWK
help
DSP/BIOS Bridge is designed for platforms that contain a GPP and